CA1035470A - Mode de fabrication d'un circuit integre a semiconducteurs - Google Patents

Mode de fabrication d'un circuit integre a semiconducteurs

Info

Publication number: CA1035470A
Authority: CA; Canada
Prior art keywords: manufacturing; semiconductor circuit; integrated semiconductor; integrated; circuit
Prior art date: 1974-09-10
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired

Application number

CA234,787A

Other languages

English (en)

Inventor

Jean P. Rioult

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Koninklijke Philips NV

Original Assignee

Philips Gloeilampenfabrieken NV

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1974-09-10

Filing date

1975-09-04

Publication date

1978-07-25

1975-09-04 Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV

1978-07-25 Application granted granted Critical

1978-07-25 Publication of CA1035470A publication Critical patent/CA1035470A/fr

Status Expired legal-status Critical Current

Links

Classifications

- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes

CA234,787A 1974-09-10 1975-09-04 Mode de fabrication d'un circuit integre a semiconducteurs Expired CA1035470A (fr)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
FR7430623A FR2284981A1 (fr)	1974-09-10	1974-09-10	Procede d'obtention d'un circuit integre semiconducteur

Publications (1)

Publication Number	Publication Date
CA1035470A true CA1035470A (fr)	1978-07-25

Family

ID=9142928

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
CA234,787A Expired CA1035470A (fr)	1974-09-10	1975-09-04	Mode de fabrication d'un circuit integre a semiconducteurs

Country Status (10)

Country	Link
JP (1)	JPS5744017B2 (fr)
AT (1)	AT359562B (fr)
CA (1)	CA1035470A (fr)
CH (1)	CH591163A5 (fr)
DE (1)	DE2538264C3 (fr)
FR (1)	FR2284981A1 (fr)
GB (1)	GB1518988A (fr)
IT (1)	IT1042339B (fr)
NL (1)	NL7510427A (fr)
SE (1)	SE415421B (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5496775A (en) *	1978-01-17	1979-07-31	Hitachi Ltd	Method of forming circuit
FR2535525A1 (fr) *	1982-10-29	1984-05-04	Western Electric Co	Procede de fabrication de circuits integres comportant des couches isolantes minces
JPH053192A (ja) *	1991-10-25	1993-01-08	Matsushita Electron Corp	半導体集積回路

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3979768A (en) *	1966-03-23	1976-09-07	Hitachi, Ltd.	Semiconductor element having surface coating comprising silicon nitride and silicon oxide films
FR1536321A (fr) *	1966-06-30	1968-08-10	Texas Instruments Inc	Contacts ohmiques pour des dispositifs à semi-conducteurs
FR1531852A (fr) *	1966-07-15	1968-07-05	Itt	Procédé de masquage de la surface d'un support
US3474310A (en) *	1967-02-03	1969-10-21	Hitachi Ltd	Semiconductor device having a sulfurtreated silicon compound thereon and a method of making the same
US3442012A (en) *	1967-08-03	1969-05-06	Teledyne Inc	Method of forming a flip-chip integrated circuit
DE2059116C3 (de) *	1970-12-01	1974-11-21	Siemens Ag, 1000 Berlin Und 8000 Muenchen	Verfahren zur Herstellung eines Halbleiterbauelementes
GB1363815A (en) *	1971-12-06	1974-08-21	Tektronix Inc	Semiconductor device and method of producing same
JPS4960870A (fr) *	1972-10-16	1974-06-13

1974
- 1974-09-10 FR FR7430623A patent/FR2284981A1/fr active Granted
1975
- 1975-08-28 DE DE2538264A patent/DE2538264C3/de not_active Expired
- 1975-09-04 NL NL7510427A patent/NL7510427A/xx not_active Application Discontinuation
- 1975-09-04 CA CA234,787A patent/CA1035470A/fr not_active Expired
- 1975-09-05 CH CH1153875A patent/CH591163A5/xx not_active IP Right Cessation
- 1975-09-05 IT IT26982/75A patent/IT1042339B/it active
- 1975-09-05 GB GB36624/75A patent/GB1518988A/en not_active Expired
- 1975-09-06 JP JP50107586A patent/JPS5744017B2/ja not_active Expired
- 1975-09-08 AT AT692075A patent/AT359562B/de not_active IP Right Cessation
- 1975-09-08 SE SE7509970A patent/SE415421B/xx unknown

Also Published As

Publication number	Publication date
DE2538264B2 (de)	1981-04-30
ATA692075A (de)	1980-04-15
DE2538264A1 (de)	1976-03-18
CH591163A5 (fr)	1977-09-15
AT359562B (de)	1980-11-25
IT1042339B (it)	1980-01-30
JPS5744017B2 (fr)	1982-09-18
SE7509970L (sv)	1976-03-11
FR2284981A1 (fr)	1976-04-09
NL7510427A (nl)	1976-03-12
JPS5153491A (fr)	1976-05-11
AU8461075A (en)	1977-03-17
DE2538264C3 (de)	1982-01-14
GB1518988A (en)	1978-07-26
FR2284981B1 (fr)	1978-11-24
SE415421B (sv)	1980-09-29

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