CA1292326C - Alignement des conducteurs de boitiers de circuits integres ceramique - Google Patents
Alignement des conducteurs de boitiers de circuits integres ceramiqueInfo
- Publication number
- CA1292326C CA1292326C CA000592906A CA592906A CA1292326C CA 1292326 C CA1292326 C CA 1292326C CA 000592906 A CA000592906 A CA 000592906A CA 592906 A CA592906 A CA 592906A CA 1292326 C CA1292326 C CA 1292326C
- Authority
- CA
- Canada
- Prior art keywords
- leads
- package
- braze
- lead frame
- alignment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/479—Leadframes on or in insulating or insulated package substrates, interposers, or redistribution layers
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16191488A | 1988-02-29 | 1988-02-29 | |
| US161,914 | 1988-02-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1292326C true CA1292326C (fr) | 1991-11-19 |
Family
ID=22583341
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000592906A Expired - Fee Related CA1292326C (fr) | 1988-02-29 | 1989-02-27 | Alignement des conducteurs de boitiers de circuits integres ceramique |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0357759A1 (fr) |
| JP (1) | JPH02501179A (fr) |
| CA (1) | CA1292326C (fr) |
| WO (1) | WO1989008324A1 (fr) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998030072A1 (fr) * | 1996-12-30 | 1998-07-09 | Derochemont L Pierre Doing Bus | Structures de cablage composites en ceramique pour dispositifs a semi-conducteur et procedes de fabrication |
| US6323549B1 (en) | 1996-08-29 | 2001-11-27 | L. Pierre deRochemont | Ceramic composite wiring structures for semiconductor devices and method of manufacture |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4289922A (en) * | 1979-09-04 | 1981-09-15 | Plessey Incorporated | Integrated circuit package and lead frame |
| GB2079534A (en) * | 1980-07-02 | 1982-01-20 | Fairchild Camera Instr Co | Package for semiconductor devices |
| US4626478A (en) * | 1984-03-22 | 1986-12-02 | Unitrode Corporation | Electronic circuit device components having integral spacers providing uniform thickness bonding film |
| JPS613434A (ja) * | 1984-06-15 | 1986-01-09 | Ricoh Co Ltd | 半導体装置の製造方法 |
-
1989
- 1989-02-22 WO PCT/US1989/000727 patent/WO1989008324A1/fr not_active Ceased
- 1989-02-22 JP JP1503311A patent/JPH02501179A/ja active Pending
- 1989-02-22 EP EP89903582A patent/EP0357759A1/fr not_active Ceased
- 1989-02-27 CA CA000592906A patent/CA1292326C/fr not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| WO1989008324A1 (fr) | 1989-09-08 |
| JPH02501179A (ja) | 1990-04-19 |
| EP0357759A1 (fr) | 1990-03-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4987475A (en) | Alignment of leads for ceramic integrated circuit packages | |
| US7507606B2 (en) | Semiconductor device and method of manufacturing the same | |
| US7019388B2 (en) | Semiconductor device | |
| US6777262B2 (en) | Method of packaging a semiconductor device having gull-wing leads with thinner end portions | |
| JP4095827B2 (ja) | 半導体装置 | |
| US5637914A (en) | Lead frame and semiconductor device encapsulated by resin | |
| US5075760A (en) | Semiconductor device package assembly employing flexible tape | |
| EP0163856B1 (fr) | Procédé de fabrication d'un support de cadre d'interconnexions pour une puce à circuit intégré | |
| WO1989008324A1 (fr) | Alignement des fils conducteurs dans des boitiers de circuits integres en ceramique | |
| JP2000286367A (ja) | 半導体装置 | |
| EP0279683A2 (fr) | Dispositif semi-conducteur et son procédé de fabrication | |
| JP4747188B2 (ja) | 半導体装置の製造方法 | |
| JPH08264705A (ja) | 半導体装置及びそれを用いた実装構造及び実装方法 | |
| JPH0471340B2 (fr) | ||
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| JPH01119045A (ja) | リードフレーム | |
| JPH0472389B2 (fr) | ||
| JP2000114447A (ja) | 半導体装置製造用のリードフレーム、およびこれにより製造された半導体装置 | |
| JPH0661412A (ja) | 樹脂封止型半導体装置およびその製造方法 | |
| JPH09213859A (ja) | 半導体装置の製造方法 | |
| JP2001135769A (ja) | 半導体装置の製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKLA | Lapsed |