CN114709253A - Reverse conducting insulated gate bipolar transistor with Schottky super barrier auxiliary gate integrated on anode - Google Patents
Reverse conducting insulated gate bipolar transistor with Schottky super barrier auxiliary gate integrated on anode Download PDFInfo
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- CN114709253A CN114709253A CN202210330190.8A CN202210330190A CN114709253A CN 114709253 A CN114709253 A CN 114709253A CN 202210330190 A CN202210330190 A CN 202210330190A CN 114709253 A CN114709253 A CN 114709253A
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Abstract
The invention discloses a reverse conducting type insulated gate bipolar transistor with an anode integrated with Schottky super barrier auxiliary gates, which comprises an anode contact region (1), a heavily doped second conduction type anode region (2), a first conduction type anode buffer region (3), a first conduction type drift region (4), a second conduction type cathode well region (5), a heavily doped first conduction type cathode region (6), a heavily doped second conduction type cathode region (7), a cathode contact region (8), a grid dielectric layer (9), a grid contact region (10), an anode auxiliary grid dielectric layer (13), an anode auxiliary gate contact region (14) and an anode Schottky contact region (15); the invention can eliminate the negative resistance effect when the device is conducted, improve the working stability of the device and obtain better compromise relation between on-state loss and off-state loss; the reverse conduction capability of the device is realized.
Description
Technical Field
The invention relates to the field of conductance modulation type high-voltage power devices in the technical field of semiconductor power electronic devices, in particular to a reverse-conducting insulated gate bipolar transistor with an anode integrated with a Schottky super barrier auxiliary gate.
Background
An Insulated Gate Bipolar Transistor (IGBT) has the advantages of simple driving, large current capability and high voltage endurance capability, but the turn-off speed of the IGBT is much slower than that of a Double-diffused metal-oxide-semiconductor effect transistor (DMOS), so that the switching loss of the IGBT is large, which affects the application of the IGBT in a power electronic system.
Methods for increasing the turn-off speed of an IGBT device to reduce switching loss mainly include three types:
firstly, the service life of non-equilibrium carriers in a drift region is reduced, and the recombination rate is increased so as to improve the turn-off speed. In fact, while the lifetime of the non-equilibrium carriers in the drift region is reduced, the total number of the non-equilibrium carriers is also reduced, which leads to the increase of the on-resistance, so the method has the problem of the compromise between the off-speed and the on-resistance;
secondly, the injection level of minority carriers from the anode to the drift region is controlled so as to achieve the compromise between on-resistance and off-time;
and thirdly, an unbalanced carrier extraction channel is provided in the anode region, and the total number of unbalanced carriers in the drift region is rapidly reduced during turn-off so as to improve the turn-off speed of the device. The structure of the non-equilibrium carrier extraction channel generally affects the minority carrier injection efficiency, i.e., affects the total number of non-equilibrium carriers in the drift region during conduction, and thus affects the on-resistance. In addition, during the forward opening process of the device, due to the conversion of carriers from the DMOS conduction mode to the IGBT conduction mode, a negative resistance effect is likely to occur during the conduction process.
With respect to the method for improving the turn-off speed of the IGBT device by providing an unbalanced carrier extraction channel in the anode region, the more typical device structures in the prior art include a conventional anode short circuit structure as shown in fig. 1, an anode auxiliary gate as shown in fig. 2, an integrated super barrier rectifier anode structure as shown in fig. 3, a self-driven anode auxiliary gate structure as shown in fig. 4, and the like. In the existing structure, the forward conduction capability of the device is weak, a complex external driving circuit is required, or the reverse conduction performance cannot be realized, and in addition, the compromise relationship between the on-state loss and the off-state loss needs to be further optimized.
Disclosure of Invention
The invention aims to provide a reverse conducting type insulated gate bipolar transistor with an anode integrated with a Schottky super barrier auxiliary gate, which comprises an anode contact region, a heavily doped second conduction type anode region, a first conduction type anode buffer region, a first conduction type drift region, a second conduction type cathode well region, a heavily doped first conduction type cathode region, a heavily doped second conduction type cathode region, a cathode contact region, a grid dielectric layer, a grid contact region, an anode auxiliary gate dielectric layer, an anode auxiliary gate contact region and an anode Schottky contact region.
The first conductive type drift region covers the first conductive type anode buffer region.
The second conductive type cathode well region covers the first conductive type drift region.
The heavily doped cathode region of the first conductivity type and the heavily doped cathode region of the second conductivity type cover the second conductivity type cathode well region.
The cathode contact region covers the heavily doped second conductive type cathode region.
The grid dielectric layer covers the second conductive type cathode well region.
The grid electrode contact area covers the grid electrode dielectric layer.
The heavily doped second conductive type anode region covers under the first conductive type anode buffer region.
The anode auxiliary gate dielectric layer covers part of the surface below the first conduction type anode buffer area. The anode auxiliary gate contact area covers under the anode auxiliary gate dielectric layer.
The anode contact region covers under the second conductive type anode region.
The anode Schottky contact region covers under the anode auxiliary gate contact region, and the anode Schottky contact region also covers part of the surface under the first conductive type anode buffer region.
And the anode contact region and the anode Schottky contact region jointly lead out an anode electrode.
The anode contact area and the anode Schottky contact area are arranged in parallel at intervals.
The second conductive type cathode well region covers part of the surface above the first conductive type drift region.
The heavily doped cathode region of the first conductivity type and the heavily doped cathode region of the second conductivity type cover part of the surface above the cathode well region of the second conductivity type.
The cathode contact region also covers part of the surface above the heavily doped first conductive type cathode region.
The grid dielectric layer also covers part of the surface above the heavily doped first conduction type cathode region and part of the surface above the first conduction type drift region.
The grid dielectric layer covers part of the surface above the second conductive type cathode well region.
The heavily doped second conductive type anode region covers part of the surface below the first conductive type anode buffer region.
Preferably, the anode contact region and the anode schottky contact region contact each other.
Preferably, the anode contact region and the anode schottky contact region do not contact each other.
The reverse conducting insulated gate bipolar transistor with the Schottky super barrier auxiliary gate integrated on the anode comprises an anode contact region, a heavily doped second conduction type anode region, a first conduction type anode buffer region, a first conduction type drift region, a second conduction type cathode well region, a heavily doped first conduction type cathode region, a heavily doped second conduction type cathode region, a cathode contact region, a grid dielectric layer, a grid contact region, an anode auxiliary gate dielectric layer and an anode Schottky contact region.
The first conductive type drift region covers the first conductive type anode buffer region.
The second conductive type cathode well region covers the first conductive type drift region.
The heavily doped cathode region of the first conductivity type and the heavily doped cathode region of the second conductivity type cover the second conductivity type cathode well region.
The cathode contact region covers the heavily doped second conductive type cathode region.
The grid dielectric layer covers the second conductive type cathode well region.
The grid electrode contact area covers the grid electrode dielectric layer.
The heavily doped second conductive type anode region covers the first conductive type anode buffer region.
The anode auxiliary gate dielectric layer covers part of the surface below the first conduction type anode buffer area.
The anode contact region covers under the second conductive type anode region.
The anode Schottky contact region covers under the anode auxiliary gate dielectric layer, and also covers part of the surface under the first conductive type anode buffer region.
And the anode contact region and the anode Schottky contact region jointly lead out an anode electrode.
The anode contact area and the anode Schottky contact area are arranged in parallel at intervals.
The second conductive type cathode well region covers part of the surface above the first conductive type drift region.
The heavily doped cathode region of the first conductivity type and the heavily doped cathode region of the second conductivity type cover part of the surface above the cathode well region of the second conductivity type.
The cathode contact region also covers part of the surface above the heavily doped first conductive type cathode region.
The grid dielectric layer also covers part of the surface above the heavily doped first conduction type cathode region and part of the surface above the first conduction type drift region.
The grid dielectric layer covers part of the surface above the second conductive type cathode well region.
The heavily doped second conductive type anode region covers part of the surface below the first conductive type anode buffer region.
Preferably, the anode contact region and the anode schottky contact region contact each other.
Preferably, the anode contact region and the anode schottky contact region do not contact each other.
The technical effects of the present invention are undoubted, and the present invention has the following advantages:
1) the insulated gate bipolar transistor of the anode integrated Schottky super barrier auxiliary gate adopts a design structure of an anode integrated Schottky super barrier self-driven auxiliary gate;
2) compared with a conventional short-circuit anode IGBT device, an auxiliary grid anode IGBT device, an integrated super-barrier rectifier anode IGBT device, a self-driven anode auxiliary grid IGBT device and the like in the prior art, the insulated gate bipolar transistor with the anode integrated with the Schottky super-barrier auxiliary grid can eliminate the negative resistance effect when the device is switched on the premise of ensuring the smaller switching-off time of the device, improve the working stability of the device and obtain better compromise relation between on-state loss and off-state loss; realizing the reverse conduction capability of the device; in addition, the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, and the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
3) According to the insulated gate bipolar transistor with the anode integrated with the Schottky super barrier auxiliary gate, the design structure of the anode integrated with the Schottky super barrier self-driving auxiliary gate is adopted, on the premise that the turn-off time of a device is short, the negative resistance effect of the device during conduction can be eliminated, the working stability of the device is improved, and the better compromise relation between the conduction state loss and the turn-off state loss is obtained; the reverse conduction capability of the device is realized; in addition, the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, and the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
Drawings
FIG. 1 is a schematic diagram of a prior art shorted anode device;
FIG. 2 is a schematic diagram of an auxiliary gate anode device in the prior art;
FIG. 3 is a schematic diagram of an integrated super barrier rectifier anode device in the prior art;
FIG. 4 is a schematic diagram of a self-driven anode auxiliary gate device in the prior art;
fig. 5 is a schematic structural diagram of an IGBT device according to an embodiment 3 of the present invention;
fig. 6 is a structural view of an IGBT device according to the present invention in embodiment 4;
fig. 7 is a schematic structural diagram of an IGBT device according to an embodiment 5 of the present invention;
fig. 8 is a schematic structural diagram of an IGBT device according to an embodiment 6 of the present invention;
in the figure: the semiconductor device comprises an anode contact region 1, a heavily doped second conductive type anode region 2, a first conductive type anode buffer region 3, a first conductive type drift region 4, a second conductive type cathode well region 5, a heavily doped first conductive type cathode region 6, a heavily doped second conductive type cathode region 7, a cathode contact region 8, a grid dielectric layer 9, a grid contact region 10, a second conductive type anode well region 11, a heavily doped first conductive type anode region 12, an anode auxiliary grid dielectric layer 13, an anode auxiliary grid contact region 14 and an anode Schottky contact region 15.
Detailed Description
The present invention is further illustrated by the following examples, but it should not be construed that the scope of the above-described subject matter is limited to the following examples. Various substitutions and alterations can be made without departing from the technical idea of the invention and the scope of the invention is covered by the present invention according to the common technical knowledge and the conventional means in the field.
Example 1:
a reverse conducting insulated gate bipolar transistor with an anode integrated with a Schottky super barrier auxiliary gate comprises an anode contact region 1, a heavily doped second conduction type anode region 2, a first conduction type anode buffer region 3, a first conduction type drift region 4, a second conduction type cathode well region 5, a heavily doped first conduction type cathode region 6, a heavily doped second conduction type cathode region 7, a cathode contact region 8, a grid dielectric layer 9, a grid contact region 10, an anode auxiliary grid dielectric layer 13, an anode auxiliary grid contact region 14 and an anode Schottky contact region 15.
The first conductive type drift region 4 covers the first conductive type anode buffer region 3.
The second conductive type cathode well region 5 covers the first conductive type drift region 4.
The heavily doped cathode region 6 of the first conductivity type and the heavily doped cathode region 7 of the second conductivity type cover the cathode well region 5 of the second conductivity type.
The cathode contact region 8 covers the heavily doped second conductive type cathode region 7.
The gate dielectric layer 9 covers the second conductive type cathode well region 5.
The gate contact region 10 covers the gate dielectric layer 9.
The heavily doped second conductive type anode region 2 covers under the first conductive type anode buffer region 3.
The anode auxiliary gate dielectric layer 13 covers a portion of the surface under the first conductive type anode buffer region 3. The anode auxiliary gate contact region 14 covers the anode auxiliary gate dielectric layer 13.
The anode contact region 1 is covered under the second conductive type anode region 2.
The anode schottky contact region 15 covers the anode auxiliary gate contact region 14, and the anode schottky contact region 15 also covers a portion of the surface under the first conductive type anode buffer region 3.
The anode contact region 1 and the anode Schottky contact region 15 jointly lead out an anode electrode.
The anode contact region 1 and the anode Schottky contact region 15 are arranged in parallel at intervals.
The second conductive type cathode well region 5 covers a part of the surface above the first conductive type drift region 4.
The heavily doped cathode region 6 of the first conductivity type and the heavily doped cathode region 7 of the second conductivity type cover part of the surface above the cathode well region 5 of the second conductivity type.
The cathode contact region 8 also covers a portion of the surface above the heavily doped first conductivity type cathode region 6.
The gate dielectric layer 9 also covers part of the surface above the heavily doped first conductivity type cathode region 6 and part of the surface above the first conductivity type drift region 4.
The gate dielectric layer 9 covers a part of the surface above the second conductive type cathode well region 5.
The heavily doped second conductive type anode region 2 covers part of the surface under the first conductive type anode buffer region 3.
The anode contact region 1 and the anode schottky contact region 15 are in contact with each other.
Example 2:
a reverse conducting type insulated gate bipolar transistor with an anode integrated with a Schottky super barrier auxiliary gate comprises an anode contact region 1, a heavily doped second conduction type anode region 2, a first conduction type anode buffer region 3, a first conduction type drift region 4, a second conduction type cathode well region 5, a heavily doped first conduction type cathode region 6, a heavily doped second conduction type cathode region 7, a cathode contact region 8, a grid dielectric layer 9, a grid contact region 10, an anode auxiliary grid dielectric layer 13 and an anode Schottky contact region 15.
The first conductive type drift region 4 covers the first conductive type anode buffer region 3.
The second conductive type cathode well region 5 covers the first conductive type drift region 4.
The heavily doped cathode region 6 of the first conductivity type and the heavily doped cathode region 7 of the second conductivity type cover the cathode well region 5 of the second conductivity type.
The cathode contact region 8 covers the heavily doped second conductive type cathode region 7.
The gate dielectric layer 9 covers the second conductive type cathode well region 5.
The gate contact region 10 covers the gate dielectric layer 9.
The heavily doped second conductive type anode region 2 covers under the first conductive type anode buffer region 3.
The anode auxiliary gate dielectric layer 13 covers a portion of the surface under the first conductive type anode buffer region 3.
The anode contact region 1 is covered under the second conductive type anode region 2.
The anode schottky contact region 15 covers the anode auxiliary gate dielectric layer 13, and the anode schottky contact region 15 also covers part of the surface below the first conductive type anode buffer region 3.
The anode contact area 1 and the anode Schottky contact area 15 jointly lead out an anode electrode.
The anode contact region 1 and the anode Schottky contact region 15 are arranged in parallel at intervals.
The second conductive type cathode well region 5 covers a part of the surface above the first conductive type drift region 4.
The heavily doped cathode region 6 of the first conductivity type and the heavily doped cathode region 7 of the second conductivity type cover part of the surface above the cathode well region 5 of the second conductivity type.
The cathode contact region 8 also covers a portion of the surface above the heavily doped first conductivity type cathode region 6.
The gate dielectric layer 9 also covers part of the surface above the heavily doped first conductivity type cathode region 6 and part of the surface above the first conductivity type drift region 4.
The gate dielectric layer 9 covers a part of the surface above the second conductive type cathode well region 5.
The heavily doped second conductive type anode region 2 covers part of the surface under the first conductive type anode buffer region 3.
The anode contact region 1 and the anode schottky contact region 15 do not contact each other.
Example 3:
the first conductivity type is selected to be N-type and the second conductivity type is selected to be P-type.
As shown in fig. 5, an anode integrated schottky super barrier auxiliary gate reverse conducting igbt includes an anode contact region 1, an anode P + region 2, an N-type buffer region 3, an N-type drift region 4, a P-type cathode well region 5, a cathode N + region 6, a cathode P + region 7, a cathode contact region 8, a gate dielectric layer 9, a gate contact region 10, an anode auxiliary gate dielectric layer 13, an anode auxiliary gate contact region 14, and an anode schottky contact region 15;
the N-type drift region 4 covers the N-type buffer region 3;
the P-type cathode well region 5 covers part of the surface above the N-type drift region 4; the cathode N + region 6 and the cathode P + region 7 cover part of the surface above the P-type cathode well region 5; the cathode contact region 8 covers the cathode P + region 7, and the cathode contact region 8 also covers part of the surface of the cathode N + region 6;
the grid dielectric layer 9 covers part of the surface above the P-type cathode well region 5, and the grid dielectric layer 9 also covers part of the surface above the cathode N + region 6 and part of the surface above the N-type drift region 4; the grid electrode contact region 10 covers the grid electrode dielectric layer 9;
the anode P + region 2 covers part of the surface under the N-type buffer region 3;
the anode auxiliary gate dielectric layer 13 covers part of the surface below the N-type buffer region 3; the anode auxiliary gate contact region 14 covers under the anode auxiliary gate dielectric layer 13;
the anode contact region 1 covers under the anode P + region 2; the anode Schottky contact region 15 covers under the anode auxiliary gate contact region 14, and the anode Schottky contact region 15 also covers part of the surface under the N-type buffer region 3; an anode electrode is led out from the anode contact region 1 and the anode Schottky contact region 15 together;
the anode contact region 1 and the anode Schottky contact region 15 are arranged in parallel at intervals; the anode contact region 1 and the anode schottky contact region 15 are in contact with each other.
The insulated gate bipolar transistor with the anode integrated with the schottky super barrier auxiliary gate provided by the embodiment can eliminate the negative resistance effect when the device is switched on the premise of ensuring the smaller switching-off time of the device, improve the working stability of the device and obtain a better compromise relationship between on-state loss and off-state loss; the reverse conduction capability of the device is realized; in addition, the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, and the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
Example 4:
the first conductivity type is selected to be N-type and the second conductivity type is selected to be P-type.
As shown in fig. 6, an anode integrated schottky super barrier auxiliary gate reverse conducting igbt includes an anode contact region 1, an anode P + region 2, an N-type buffer region 3, an N-type drift region 4, a P-type cathode well region 5, a cathode N + region 6, a cathode P + region 7, a cathode contact region 8, a gate dielectric layer 9, a gate contact region 10, an anode auxiliary gate dielectric layer 13, an anode auxiliary gate contact region 14, and an anode schottky contact region 15;
the N-type drift region 4 covers the N-type buffer region 3;
the P-type cathode well region 5 covers part of the surface above the N-type drift region 4; the cathode N + region 6 and the cathode P + region 7 cover partial surfaces above the P-type cathode well region 5; the cathode contact region 8 covers the cathode P + region 7, and the cathode contact region 8 also covers part of the surface of the cathode N + region 6;
the grid dielectric layer 9 covers part of the surface of the P-type cathode well region 5, and the grid dielectric layer 9 also covers part of the surface of the cathode N + region 6 and part of the surface of the N-type drift region 4; the grid electrode contact region 10 covers the grid electrode dielectric layer 9;
the anode P + region 2 covers part of the surface under the N-type buffer region 3;
the anode auxiliary gate dielectric layer 13 covers part of the surface below the N-type buffer region 3; the anode auxiliary gate contact region 14 covers under the anode auxiliary gate dielectric layer 13;
the anode contact region 1 covers under the anode P + region 2; the anode Schottky contact region 15 covers under the anode auxiliary gate contact region 14, and the anode Schottky contact region 15 also covers part of the surface under the N-type buffer region 3; an anode electrode is led out from the anode contact region 1 and the anode Schottky contact region 15 together;
the anode contact region 1 and the anode Schottky contact region 15 are arranged in parallel at intervals; the anode contact region 1 and the anode schottky contact region 15 do not contact each other.
The insulated gate bipolar transistor with the anode integrated with the schottky super barrier auxiliary gate provided by the embodiment can eliminate the negative resistance effect when the device is switched on the premise of ensuring the smaller switching-off time of the device, improve the working stability of the device and obtain a better compromise relationship between on-state loss and off-state loss; the reverse conduction capability of the device is realized; in addition, the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, and the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
Example 5:
the first conductivity type is selected to be N-type and the second conductivity type is selected to be P-type.
As shown in fig. 7, the reverse conducting type insulated gate bipolar transistor with the schottky super barrier auxiliary gate integrated on the anode comprises an anode contact region 1, an anode P + region 2, an N-type buffer region 3, an N-type drift region 4, a P-type cathode well region 5, a cathode N + region 6, a cathode P + region 7, a cathode contact region 8, a gate dielectric layer 9, a gate contact region 10, an anode auxiliary gate dielectric layer 13 and an anode schottky contact region 15;
the N-type drift region 4 covers the N-type buffer region 3;
the P-type cathode well region 5 covers part of the surface above the N-type drift region 4; the cathode N + region 6 and the cathode P + region 7 cover partial surfaces above the P-type cathode well region 5; the cathode contact region 8 covers the cathode P + region 7, and the cathode contact region 8 also covers part of the surface of the cathode N + region 6;
the grid dielectric layer 9 covers part of the surface above the P-type cathode well region 5, and the grid dielectric layer 9 also covers part of the surface above the cathode N + region 6 and part of the surface above the N-type drift region 4; the grid electrode contact region 10 covers the grid electrode dielectric layer 9;
the anode P + region 2 covers part of the surface under the N-type buffer region 3;
the anode auxiliary gate dielectric layer 13 covers part of the surface below the N-type buffer region 3;
the anode contact region 1 covers under the anode P + region 2; the anode Schottky contact region 15 covers under the anode auxiliary gate dielectric layer 13, and the anode Schottky contact region 15 also covers part of the surface under the N-type buffer region 3; an anode electrode is led out from the anode contact region 1 and the anode Schottky contact region 15 together;
the anode contact region 1 and the anode Schottky contact region 15 are arranged in parallel at intervals; the anode contact region 1 and the anode schottky contact region 15 are in contact with each other.
The insulated gate bipolar transistor with the anode integrated with the schottky super barrier auxiliary gate provided by the embodiment can eliminate the negative resistance effect when the device is switched on the premise of ensuring the smaller switching-off time of the device, improve the working stability of the device and obtain a better compromise relationship between on-state loss and off-state loss; the reverse conduction capability of the device is realized; in addition, the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, and the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
Example 6:
the first conductivity type is selected to be N-type and the second conductivity type is selected to be P-type.
As shown in fig. 8, an anode integrated schottky super barrier auxiliary gate reverse conducting igbt includes an anode contact region 1, an anode P + region 2, an N-type buffer region 3, an N-type drift region 4, a P-type cathode well region 5, a cathode N + region 6, a cathode P + region 7, a cathode contact region 8, a gate dielectric layer 9, a gate contact region 10, an anode auxiliary gate dielectric layer 13, and an anode schottky contact region 15;
the N-type drift region 4 covers the N-type buffer region 3;
the P-type cathode well region 5 covers part of the surface above the N-type drift region 4; the cathode N + region 6 and the cathode P + region 7 cover partial surfaces above the P-type cathode well region 5; the cathode contact region 8 covers the cathode P + region 7, and the cathode contact region 8 also covers part of the surface of the cathode N + region 6;
the grid dielectric layer 9 covers part of the surface above the P-type cathode well region 5, and the grid dielectric layer 9 also covers part of the surface above the cathode N + region 6 and part of the surface above the N-type drift region 4; the grid electrode contact region 10 covers the grid electrode dielectric layer 9;
the anode P + region 2 covers part of the surface under the N-type buffer region 3;
the anode auxiliary gate dielectric layer 13 covers part of the surface below the N-type buffer region 3;
the anode contact region 1 covers under the anode P + region 2; the anode Schottky contact region 15 covers the lower part of the anode auxiliary gate dielectric layer 13, and the anode Schottky contact region 15 also covers the partial surface of the lower part of the N-type buffer region 3; an anode electrode is led out from the anode contact region 1 and the anode Schottky contact region 15 together;
the anode contact region 1 and the anode Schottky contact region 15 are arranged in parallel at intervals; the anode contact region 1 and the anode schottky contact region 15 do not contact each other.
The insulated gate bipolar transistor with the anode integrated with the schottky super barrier auxiliary gate provided by the embodiment can eliminate the negative resistance effect when the device is switched on the premise of ensuring the smaller switching-off time of the device, improve the working stability of the device and obtain a better compromise relationship between on-state loss and off-state loss; the reverse conduction capability of the device is realized; in addition, the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, and the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
Claims (7)
1. The utility model provides a reverse conducting type insulated gate bipolar transistor of super barrier auxiliary gate of positive pole integrated schottky which characterized in that: the solar cell comprises an anode contact region (1), a heavily doped second conduction type anode region (2), a first conduction type anode buffer region (3), a first conduction type drift region (4), a second conduction type cathode well region (5), a heavily doped first conduction type cathode region (6), a heavily doped second conduction type cathode region (7), a cathode contact region (8), a grid dielectric layer (9), a grid contact region (10), an anode auxiliary grid dielectric layer (13), an anode auxiliary grid contact region (14) and an anode Schottky contact region (15).
The first conductive type drift region (4) covers the first conductive type anode buffer region (3);
the second conductive type cathode well region (5) covers the first conductive type drift region (4);
the second conductive type cathode well region (5) covers part of the surface above the first conductive type drift region (4);
the heavily doped first conduction type cathode region (6) and the heavily doped second conduction type cathode region (7) cover part of the surface above the second conduction type cathode well region (5);
the cathode contact region (8) covers the heavily doped second conductive type cathode region (7);
the grid dielectric layer (9) covers part of the surface above the second conduction type cathode well region (5);
the grid electrode contact region (10) covers the grid electrode dielectric layer (9);
the heavily doped second conductive type anode region (2) covers the partial surface below the first conductive type anode buffer region (3);
the anode auxiliary gate dielectric layer (13) covers part of the surface below the first conduction type anode buffer area (3);
the anode auxiliary gate contact area (14) covers under the anode auxiliary gate dielectric layer (13);
the anode contact area (1) covers under the second conductive type anode area (2);
the anode Schottky contact region (15) covers under the anode auxiliary gate contact region (14);
an anode electrode is led out from the anode contact region (1) and the anode Schottky contact region (15) together;
the anode contact areas (1) and the anode Schottky contact areas (15) are arranged in parallel at intervals.
2. The utility model provides a reverse conducting type insulated gate bipolar transistor of super barrier auxiliary gate of positive pole integrated schottky which characterized in that: the transistor comprises an anode contact region (1), a heavily doped second conduction type anode region (2), a first conduction type anode buffer region (3), a first conduction type drift region (4), a second conduction type cathode well region (5), a heavily doped first conduction type cathode region (6), a heavily doped second conduction type cathode region (7), a cathode contact region (8), a grid dielectric layer (9), a grid contact region (10), an anode auxiliary grid dielectric layer (13) and an anode Schottky contact region (15);
the first conductive type drift region (4) covers the first conductive type anode buffer region (3);
the second conduction type cathode well region (5) covers the first conduction type drift region (4);
the second conductive type cathode well region (5) covers part of the surface above the first conductive type drift region (4);
the heavily doped cathode region (6) of the first conduction type and the heavily doped cathode region (7) of the second conduction type cover part of the surface above the cathode well region (5) of the second conduction type;
the cathode contact region (8) covers the heavily doped second conductive type cathode region (7);
the grid dielectric layer (9) covers part of the surface above the second conduction type cathode well region (5);
the grid electrode contact region (10) covers the grid electrode dielectric layer (9);
the heavily doped second conductive type anode region (2) covers the partial surface below the first conductive type anode buffer region (3);
the anode auxiliary gate dielectric layer (13) covers part of the surface below the first conductive type anode buffer area (3);
the anode contact area (1) covers under the second conductive type anode area (2);
the anode Schottky contact region (15) covers under the anode auxiliary gate dielectric layer (13);
an anode electrode is led out from the anode contact region (1) and the anode Schottky contact region (15) together;
the anode contact areas (1) and the anode Schottky contact areas (15) are arranged in parallel at intervals.
3. The reverse conducting type Insulated Gate Bipolar Transistor (IGBT) with the Schottky super barrier auxiliary gate integrated on the anode as claimed in claim 1 or 2, wherein: the cathode contact region (8) also covers part of the surface above the heavily doped cathode region (6) of the first conductivity type.
4. The reverse conducting type Insulated Gate Bipolar Transistor (IGBT) with the Schottky super barrier auxiliary gate integrated on the anode as claimed in claim 1 or 2, wherein: the grid dielectric layer (9) is also covered on the partial surface above the heavily doped first conduction type cathode region (6) and the partial surface above the first conduction type drift region (4).
5. The reverse conducting type Insulated Gate Bipolar Transistor (IGBT) with the Schottky super barrier auxiliary gate integrated on the anode as claimed in claim 1 or 2, wherein: the anode Schottky contact region (15) is also covered on part of the surface below the first conductive type anode buffer region (3).
6. The reverse conducting type Insulated Gate Bipolar Transistor (IGBT) with the Schottky super barrier auxiliary gate integrated on the anode as claimed in claim 1 or 2, wherein: the anode contact region (1) and the anode Schottky contact region (15) are in contact with each other.
7. The anode-integrated schottky super barrier assisted bipolar transistor of claim 1 or 2, wherein: the anode contact region (1) and the anode Schottky contact region (15) are not in contact with each other.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003174168A (en) * | 2001-12-05 | 2003-06-20 | Shindengen Electric Mfg Co Ltd | Insulated gate bipolar transistor and method of manufacturing the same |
| US20140084337A1 (en) * | 2012-09-24 | 2014-03-27 | Kabushiki Kaisha Toshiba | Semiconductor device |
| US20140225126A1 (en) * | 2011-08-02 | 2014-08-14 | Rohm Co., Ltd. | Semiconductor device, and manufacturing method for same |
| CN106783991A (en) * | 2017-02-20 | 2017-05-31 | 重庆大学 | A kind of quick insulated gate bipolar transistor |
| CN109065607A (en) * | 2018-08-20 | 2018-12-21 | 电子科技大学 | A kind of bipolar-type power semiconductor device and preparation method thereof |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003174168A (en) * | 2001-12-05 | 2003-06-20 | Shindengen Electric Mfg Co Ltd | Insulated gate bipolar transistor and method of manufacturing the same |
| US20140225126A1 (en) * | 2011-08-02 | 2014-08-14 | Rohm Co., Ltd. | Semiconductor device, and manufacturing method for same |
| US20140084337A1 (en) * | 2012-09-24 | 2014-03-27 | Kabushiki Kaisha Toshiba | Semiconductor device |
| CN106783991A (en) * | 2017-02-20 | 2017-05-31 | 重庆大学 | A kind of quick insulated gate bipolar transistor |
| CN109065607A (en) * | 2018-08-20 | 2018-12-21 | 电子科技大学 | A kind of bipolar-type power semiconductor device and preparation method thereof |
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