JP2003174168A - Insulated gate bipolar transistor and method of manufacturing the same - Google Patents

Abstract

[PROBLEMS] To provide an IGBT further improved in high-speed switching characteristics while keeping on-resistance low. A the N ^- one surface of the type semiconductor substrate, an insulating gate transistor for switching a current flowing in the thickness direction of the semiconductor substrate, the other surface of said semiconductor substrate, said insulated gate transistor An insulated gate bipolar transistor having a Schottky junction for injecting holes into the semiconductor substrate to cause conductivity modulation when the semiconductor substrate is turned on, and partially opened on the other surface of the semiconductor substrate. An insulating film is formed, and a drain electrode is further formed on the surface side of the insulating film, so that a Schottky junction between the semiconductor substrate and the drain electrode is formed in a region where the insulating film is opened. An insulated gate bipolar transistor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulated gate bipolar transistor.
tor, hereinafter referred to as "IGBT". ) And its manufacturing method. More specifically, the present invention relates to an IGBT having improved high-speed switching characteristics while maintaining a low on-resistance, and a method for manufacturing the same.

[0002]

2. Description of the Related Art An IGBT is a power transistor having both high speed switching characteristics of a power MOSFET and low on-resistance characteristics of a bipolar transistor. Figure 20
Among these IGBTs, is a so-called PN junction type IGBT.
It is a fragmentary sectional view of T. As shown in FIG. 20, this IGBT 810 has a MOSFET structure in the upper part and a bipolar transistor structure in the lower part.

The structure of this IGBT with reference to FIG.
The operation will be described. This IGBT810 is P⁺this
On the Kuta layer 812, N⁺Buffer layers 814A and N^-Dori
Soft layer 814B is formed (these are collectively referred to as
It is called “N base layer” 814. ). And this N^-Do
DSA (Double Diffusion) is formed on the surface of the lift layer 814B.
The self-alignment method is used so that the surface is exposed.
A well region 816 is formed. Furthermore, this P-way
N in such a way that the surface is exposed in the region 816. ⁺Emi
The drain region 818 is formed. And P-well area
SiO on the surface of the area 816₂Thin gate insulating film 8
Gate electrode 8 made of polysilicon or the like via 22
24 are formed. This gate electrode 824 is
Across the area 816, N⁺From the emitter region 818
N^-It is arranged so as to reach the drift layer 814B.
It Check the surface of the P-well region directly below the gate electrode 824.
It is called a channel formation region 820. N⁺Emitter region 818
And the P-well region 816 are shorted on the surface.
An electrode 828 is formed, and the emitter electrode 828 is
It is connected to the mitter terminal E. This emitter electrode 82
8 is insulated from the gate electrode 824 by an interlayer insulating film 826.
ing. The gate electrode 824 is connected to the gate terminal G
There is. P⁺The collector electrode 8 is formed on the surface of the collector layer 812.
30 is formed, and the collector electrode 830 is
It is connected to child C.

The IGBT 810 is turned on by applying a positive voltage equal to or more than a threshold value to the gate terminal G with respect to the emitter terminal E while applying a positive voltage to the collector terminal C with respect to the emitter electrode E. That is, when a positive voltage above the threshold is applied to the gate terminal G, the MOSF
Similarly to ET, the channel formation region 8 of the P well region 816
Is inverted channel is formed on the 20 surface of the through the inversion channel from the N ⁺ emitter region 818 N ^- base layer 814
Electrons flow inside. Then, correspondingly, holes are injected from the P ⁺ collector layer 812 into the N base layer 814, and the P ⁺ collector layer 812 and the N ⁺ buffer layer 814 are injected.
The PN junction of the A (N ⁻ base layer 814) is in a forward bias state, and the N ⁻ base layer 814 causes conductivity modulation. Therefore, in the IGBT 810, the N ⁻ drift layer 814B, which is originally set to have a high resistance, has a low resistance due to conductivity modulation, so that the ON resistance is low even in a high breakdown voltage element.

On the other hand, the IGBT 810 is turned off by setting the voltage applied to the gate terminal G with respect to the emitter terminal E to a voltage below a threshold value. That is, when the voltage applied to the gate terminal G becomes equal to or lower than the threshold value, the inversion channel disappears in the channel formation region 820, and N
⁺ The inflow of electrons from the emitter region 818 is stopped. However, there are still electrons in the N ^- base layer 814. Most of the holes accumulated in the N ⁻ base layer 814 pass through the P well region 816 and flow into the emitter electrode 826, but some of them recombine with the electrons existing in the N ⁻ base layer 814 and disappear. When all the holes accumulated in the N ⁻ base layer 814 disappear, the element enters the blocking state,
Turn off is complete.

However, since holes are minority carriers, it takes time to eliminate them, and it is not easy to shorten the turn-off time. That is, this PN junction type IGBT exhibits excellent characteristics that the ON voltage is low because conductivity modulation occurs at the time of turn-on, but it takes a long time to eliminate the holes at the time of turn-off, so the turn-off time becomes long and high-speed switching occurs. It has the drawback of inferior properties.

As a method of shortening the turn-off time, a method of shortening the carrier lifetime by doping a semiconductor substrate with a lifetime killer such as gold or irradiating it with an electron beam or neutron has been proposed. . However, these methods are not preferable because the degree of conductivity modulation at the time of turn-on is greatly reduced, the voltage drop during conduction is large, and the lifetime is long at high temperatures.

Therefore, in order to solve the above-mentioned drawbacks of the IGBT, a so-called Schottky junction type IGBT having a structure different from that of the above-mentioned PN junction type IGBT.
Has been proposed (Japanese Patent Laid-Open No. 61-150280). FIG. 21 is a partial cross-sectional view of this Schottky junction type IGBT. As shown in FIG. 21, this Schottky junction type IGBT 910 also has a MOSFET structure in the upper part and a bipolar transistor structure in the lower part, like the PN junction type IGBT 810.

FIG. 22 shows a Schottky junction type IGBT.
It is a figure which shows the structure of one surface (henceforth an "element surface".) Of 910. As shown in FIG. 22, the active area AR is formed on the element surface of the IGBT 910.
And a fixed potential diffusion region DR arranged so as to surround the active region, and a guard ring region GR formed around the chip and also arranged so as to surround the active region.
And a gate pad region GP used for connection to the outside are formed.

23 and 24 show the active area A of FIG.
It is the elements on larger scale of C part in R. FIG. 23 shows an example in which a large number of unit cells (well regions 916 and source regions 918) of a large number of IGBTs formed in an island shape are arranged vertically and horizontally, and in FIG. 24, a large number of IGBTs formed in a stripe shape are formed. An example in which a large number of unit cells (well region 916 and source region 918) are arranged in the lateral direction is shown. 23 and 24, other surface structures such as the gate electrode are omitted.

The structure and operation of the Schottky junction type IGBT will be described with reference to FIG. The Schottky junction type IGBT 910 has a DSA on the surface of the N ⁻ layer 914.
Method to expose the surface of the P-well region 91.
6 is formed. Furthermore, this P well region 916
An N ⁺ source region (also referred to as an N ⁺ emitter region) 918 is formed therein so that its surface is exposed. A gate electrode 924 made of polysilicon or the like is formed on the surface of the P well region 916 via a thin gate insulating film 922 such as SiO ₂ . The gate electrode 924, straddling the P-well region 916, N ⁺
It is arranged so as to reach the N ⁻ layer 914 from the source region 918. The surface of the P well region directly below the gate electrode 924 is referred to as a channel formation region 920. A source electrode (sometimes called an emitter electrode) 928 so that the N ⁺ source region 918 and the P well region 916 are short-circuited on the surface.
Is formed, and the source electrode 928 is connected to the source terminal S. The source electrode 928 is the gate electrode 92.
4 is insulated by an interlayer insulating film 926. The gate electrode 924 is connected to the gate terminal G. N ^- layer 914
A drain electrode (also referred to as a collector electrode) 930 made of a film of “a metal that forms a Schottky junction by coming into contact with the N ⁻ layer 914” is formed on the other surface of the drain electrode 930. It is connected to the drain terminal D.

This Schottky junction type IGBT 910
The operation is basically the same as the operation of the PN junction type IGBT 810 described above.
While holes are injected through the PN junction in T810, this Schottky junction type IGBT910
The difference is that holes are injected via the Schottky junction. Therefore, the hole injection amount is at a low level as compared with the above-mentioned PN junction type IGBT 810, and the number of holes remaining at turn-off can be reduced. As a result, the conventional PN junction type IG
The turn-off time is further shortened compared to the BT810, and the characteristics of high-speed switching are improved.

[0013]

However, even in this Schottky junction type IGBT, further improvement in high-speed switching characteristics is required in order to improve the inverter characteristics of the products to which the IGBT is applied. Therefore, it is an object of the present invention to provide an IGBT having an improved high-speed switching characteristic while keeping the ON resistance low.

[0014]

(1) An insulated gate bipolar transistor of the present invention is an insulated gate for switching a current flowing in the thickness direction of an N ⁻ type semiconductor substrate on one surface thereof. Has a transistor,
An insulated gate bipolar transistor having a Schottky junction for injecting holes into the semiconductor substrate to cause conductivity modulation on the other surface of the semiconductor substrate when the insulated gate transistor is turned on. An insulating film that is partially opened is formed on the other surface of the substrate, and a drain electrode is further formed on the surface side of the insulating film, so that the semiconductor substrate is formed in the region where the insulating film is opened. And a Schottky junction is formed by the drain electrode and the drain electrode.

As shown in FIG. 20, the PN junction type IGBT has a PNP bipolar transistor composed of a P ⁺ collector layer 812, an N base layer 814 and a P well region 816. P ⁺ collector layer 8 which is an emitter in a bipolar transistor
Holes are injected from 12 to the N base layer 814. On the other hand, the Schottky junction type IGBT is shown in FIG.
As shown in FIG. 6, since it has a bipolar transistor composed of the drain electrode 930, the N ⁻ type semiconductor substrate 914 and the P well region 916, the drain electrode 930 corresponding to the emitter of this bipolar transistor is provided.
Holes are injected into the N ⁻ type semiconductor substrate 914 from.

FIG. 1 is a diagram showing a partial cross-sectional view of the IGBT of the present invention. As shown in FIG. 1, the IGB of the present invention
Since the T110 is a so-called Schottky junction type IGBT, the conventional Schottky junction type IGBT 910 is used.
In the same manner as in the above case, since the bipolar transistor including the drain electrode 130, the N ⁻ type semiconductor substrate 114, and the P well region 116 is provided, the drain electrode 130 corresponding to the emitter of the bipolar transistor is connected to the N ⁻ type Holes are injected into the semiconductor body 114.

Here, the IGBT 110 of the present invention is different from the conventional Schottky junction type IGBT in the structure of the other surface of the semiconductor substrate. That is, the conventional Schottky junction type IGBT 910 has a structure in which the other surface is entirely covered with the drain electrode, whereas the IGBT 110 of the present invention has a part of the other surface. In this structure, an insulating film having an opening is formed, and a drain electrode is further formed on the surface side of this insulating film.

Therefore, the conventional Schottky junction type I
In the IGBT 910, holes are injected from the entire surface of the drain electrode, whereas in the IGBT 110 of the present invention, holes are injected only from the region where the insulating film is opened. Therefore, the bipolar transistor in the IGBT 110 of the present invention is the conventional Schottky junction type IG.
This is a bipolar transistor smaller than the bipolar transistor in BT910. Therefore, I of the present invention
The conventional Schottky junction type IGBT 9 is added to the GBT 110.
When the same amount of collector current I _C as in the case of 10 is passed, the current density becomes high. Then, since the current amplification factor h _FE becomes lower, the tail current becomes smaller than in the conventional case. Therefore, the time until the remaining amount of holes at the time of turn-off becomes equal to or less than the reference value is shortened, and as a result, the turn-off time is shortened. On the other hand, at turn-on, conductivity is modulated by hole injection from the Schottky junction, so the on-resistance is kept low. Therefore, the IGBT of the present invention is an excellent IGBT in which high-speed switching characteristics are improved while maintaining low on-resistance.
It becomes T.

(2) In the insulated gate bipolar transistor of the present invention, a large number of insulated gate transistors for switching the current flowing in the thickness direction of the semiconductor substrate are formed on one surface of the N ⁻ type semiconductor substrate. Schottky junction having an active region and a non-active region for injecting holes into the semiconductor substrate when the insulated gate transistor is turned on to cause conductivity modulation on the other surface of the semiconductor substrate. An insulating gate bipolar transistor having: a partially opened insulating film is formed on at least a region corresponding to an active region of the other surface of the semiconductor substrate, and a surface side of the insulating film is formed. Further, a drain electrode is formed on the semiconductor substrate and the drain in the region where the insulating film is opened. Wherein the Schottky junction due to the electrode is formed.

In the IGBT of the present invention, an insulating film that is partially opened is formed in at least the active region, and a drain electrode is further formed on the surface side of this insulating film, so that the insulating film is formed. A Schottky junction is formed by the semiconductor substrate and the drain electrode in the opened region. Therefore, the IGBT of the present invention is
At least in the region corresponding to the active region, the same effect as that of the IGBT described in (1) above is obtained.

(3) In the insulated gate bipolar transistor according to (1) or (2), the insulating film is formed on the outer peripheral portion of the other surface of the semiconductor substrate on the semiconductor substrate side of the drain electrode. It is preferable that the second insulating film formed in the same step as above is formed, and that the drain electrode does not extend to the outer end portion of the outer peripheral portion.

According to this structure, since the drain electrode does not extend to the outer end of the outer peripheral portion, when the wafer is diced into chips, the metal forming the drain electrode is separated from the side surface of the chip (dicing). It is possible to reliably prevent it from going around the surface). As a result, the IGBT has extremely little leakage at the Schottky junction surface. Further, since the second insulating film can be formed in the same step as the insulating film, the process is not complicated.

(4) In the insulated gate bipolar transistor described in (3) above, in the region where the second insulating film is formed, the semiconductor substrate is prevented from coming into contact with the drain electrode, and , An N ⁺ region is formed so as to be exposed at a side surface of the semiconductor substrate, and the semiconductor substrate is prevented from coming into contact with the drain electrode in the region where the second insulating film is formed, Moreover, it is preferable that the P region is formed so as not to be exposed on the side surface of the semiconductor substrate.

According to this structure, in the region where the second insulating film is formed, the semiconductor substrate is formed with the N ⁺ region so as to be exposed at the side surface of the semiconductor substrate. Since the inversion layer on the surface of is stopped at this N ⁺ region, the channel current can be reduced.

Further, according to this structure, in the region where the second insulating film is formed, the P region is formed in the semiconductor substrate so as not to be exposed on the side surface of the semiconductor substrate. The depletion layer of the key junction spreads and P
Since it reaches the region and further spreads so as to cover the P region integrally with the depletion layer of the P region, the electric field strength at the end of the second insulating film is weakened. Therefore, even if a voltage of opposite polarity is applied between the source terminal and the drain terminal by mistake, the breakdown voltage can be ensured and the element can be prevented from being broken. IG with excellent so-called reverse connection protection function
It becomes BT. Moreover, since the P region and the drain electrode are not in contact with each other, there is no part that constitutes a normal PN junction type IGBT. Therefore, there is no increase in switching loss due to a long turn-off time.

(5) In the insulated gate bipolar transistor according to any one of (1) to (4), the semiconductor substrate is made of silicon, and at least the semiconductor substrate is selected from the metals constituting the drain electrode. The contacting portion is preferably platinum, gold, vanadium, aluminum or molybdenum.

With this structure, the Schottky junction is reliably formed because the semiconductor substrate made of N ^-- type silicon comes into contact with these metals.

(6) In the insulated gate bipolar transistor according to any one of (1) to (5), an inorganic insulating film or an organic insulating film is used as the insulating film and the second insulating film. You can As the inorganic insulating film, a SiO ₂ film or a Si ₃ N ₄ film can be preferably used from the viewpoints of insulating properties, chemical stability, heat resistance, etc., and polyimide is preferably used from the same viewpoint as the organic insulating film. Can be used. Among these, a SiO ₂ film that emits less gas can be particularly preferably used.

(7) An insulated gate bipolar transistor according to the present invention is the method for producing an insulated gate bipolar transistor according to (1) or (2) above,
(A) a semiconductor substrate preparing step of preparing an N ^- type semiconductor substrate; (b) an insulating gate transistor forming step of forming an insulating gate transistor on one surface of the semiconductor substrate; and (c) the other of the semiconductor substrates. A semiconductor substrate forming step of forming an N ^- type semiconductor substrate by thinning the semiconductor substrate by surface-processing the surface side of the semiconductor substrate, and (d) partially opening the other surface of the semiconductor substrate. The method is characterized by including an insulating film forming step of forming an insulating film, and (e) a metal film forming step of forming a metal film forming a drain electrode on the other surface of the semiconductor substrate.

Therefore, in the method of manufacturing the IGBT of the present invention, before the metal film forming step in the general Schottky junction type IGBT manufacturing step, the insulating film partially opened on the other surface of the semiconductor substrate. This is a simple method in which only an insulating film forming step for forming a film is added. As described above, it is possible to manufacture an IGBT having an improved high-speed switching characteristic by further shortening the turn-off time while maintaining a low on-resistance while using a simple method.

(8) The method for producing an insulated gate bipolar transistor according to the present invention is the method for producing an insulated gate bipolar transistor according to (3) above,
(A) a semiconductor substrate preparing step of preparing an N ^- type semiconductor substrate; (b) an insulating gate transistor forming step of forming an insulating gate transistor on one surface of the semiconductor substrate; and (c) the other of the semiconductor substrates. A semiconductor substrate forming step of forming an N ^- type semiconductor substrate by thinning the semiconductor substrate by surface-processing the surface side of the semiconductor substrate, and (d) partially opening the other surface of the semiconductor substrate. An insulating film forming step of forming an insulating film and a second insulating film,
(E) a metal film forming step of forming a metal film forming a drain electrode on the other surface of the semiconductor substrate, and (f) a metal forming the drain electrode on the outer peripheral portion of the other surface of the semiconductor substrate. And a metal film removing step of removing the film.

Therefore, the IGBT manufacturing method of the present invention is characterized in that in the IGBT manufacturing process described in (7) above,
A second insulating film is formed at the same time in the insulating film forming step, and after the metal film forming step, a metal film removing step of removing the metal film forming the drain electrode on the outer peripheral portion of the other surface of the semiconductor substrate is performed. It's an easy way to add it. Although it is a simple method as described above, it has the following effect in addition to the effect that the method for manufacturing an insulated gate bipolar transistor described in (7) has.

That is, when the wafer is diced into chips, it is possible to reliably prevent the metal forming the drain electrode from wrapping around the chip side surface (dicing surface). It is possible to manufacture an IGBT with less leakage.

(9) The method for manufacturing an insulated gate bipolar transistor according to the present invention is the method for manufacturing an insulated gate bipolar transistor according to (4) above,
(A) a semiconductor substrate preparing step of preparing an N ^- type semiconductor substrate; (b) an insulating gate transistor forming step of forming an insulating gate transistor on one surface of the semiconductor substrate; and (c) the other of the semiconductor substrates. From the viewpoint of chemical stability and heat resistance, a semiconductor substrate forming step of forming an N ⁻ type semiconductor substrate by thinning the semiconductor substrate by surface-processing the surface side of (d) A P region forming step of forming a P region at a predetermined position on the other surface, and (e) an N region at a predetermined position on the other surface of the semiconductor substrate.
And N ⁺ region forming step of forming a region ^+, (f) the other surface of the semiconductor substrate, partially apertured insulating film and the second
And (g) a metal film forming step of forming a metal film constituting a drain electrode on the other surface of the semiconductor substrate, and (h) another semiconductor film forming step. A metal film removing step of removing the metal film forming the drain electrode in the outer peripheral portion of the surface.

Therefore, the manufacturing method of the IGBT of the present invention
In the manufacturing process of the IGBT described in (8) above,
Before the insulating film forming step, the other surface of the semiconductor substrate is
A P region forming step of forming a P region at a fixed position, and a semiconductor substrate
N in place on the other surface of the body ⁺N forming a region⁺region
It is a simple method that only needs to add a forming step. This
Insulation described in (8) above, though it is a simple method
Effects of manufacturing method of gate type bipolar transistor
In addition to the fruit, it has the following effects.

That is, due to the action of the N ⁺ region formed in the semiconductor substrate, the inversion layer on the surface of the semiconductor substrate becomes this N + region.
Since it is stopped at the region, the channel current can be reduced. Further, due to the action of the P region formed on the semiconductor substrate, the breakdown voltage can be secured even when a voltage of opposite polarity is applied between the source terminal and the drain terminal by mistake, and the breakdown of the element is prevented. be able to. The IGBT has an excellent so-called reverse connection protection function. Moreover, since the P region and the drain electrode are not in contact with each other, a normal PN
There is no part that constitutes a junction type IGBT. Therefore, there is no increase in switching loss due to a long turn-off time.

In the method for manufacturing an insulated gate bipolar transistor according to any one of (7) to (9), the surface processing method in the semiconductor substrate forming step includes grinding and polishing, grinding and CMP, Grinding and etching, and etching methods can be preferably used.

Further, in the method of manufacturing an insulated gate bipolar transistor according to any one of (7) to (9), (a) to (e) (or (a) to (f) or (a)). Although it is preferable to carry out the steps in the order of (h), it is not always necessary to carry out the steps in this order. For example, one step (eg, source electrode forming step) of the insulated gate transistor forming step of (b) or two or more steps can be performed after the step (c). Also,
In the method for manufacturing an insulated gate bipolar transistor described in (9), (d) and (e) can be interchanged.

[0039]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings.

(First Embodiment) FIG. 1 is a diagram showing a partial cross-sectional view of an IGBT according to a first embodiment of the present invention. Figure 1
21 corresponds to FIG. 21, which is a cross-sectional view of a conventional IGBT 910. Further, FIG. 2 shows the IGBT 1 according to the first embodiment.
It is a figure which shows the structure of the other surface of 10 (henceforth "the back surface"). Further, FIG. 3 is a partially enlarged view of a portion D in FIG.
It is a partially expanded view which shows the 1st structure example of the back surface of GBT.
The IGBT 110 according to the first embodiment will be described with reference to FIGS. 1, 2, and 3.

As shown in FIG. 1, since the IGBT 110 according to the first embodiment is a Schottky junction type IGBT, it is basically a conventional Schottky junction type IG.
It has the same structure as the BT910. Therefore, the IGBT 110 of the present invention has a bipolar transistor composed of the drain electrode 130, the N ⁻ type semiconductor substrate 114, and the P well region 116, and the drain electrode 130 to N corresponding to the emitter of the bipolar transistor are provided. Holes are injected into the ⁻ type semiconductor substrate 114.

Here, the IGBT 110 according to the first embodiment.
However, what is different from the conventional Schottky junction type IGBT 910 is the structure of the other surface of the semiconductor substrate 114.
That is, the conventional Schottky junction type IGBT 910.
Then, the other surface is entirely covered with the drain electrode 930.
In contrast to the structure of the IGBT 110 according to the first embodiment, a partially opened insulating film 132 is formed on the other surface, and the surface of this insulating film 132 is covered with It has a structure in which a drain electrode 130 is further formed on the side.

In the IGBT 110 according to the first embodiment, the insulating film 132 is formed over the entire active region, but in an enlarged view, as shown in FIG. In this case, it is formed as an insulating film which is partially opened.

Therefore, the conventional Schottky junction type I
In the IGBT 910, holes are injected from the entire surface of the drain electrode, whereas in the IGBT 110 according to the first embodiment, holes are injected only from the region where the insulating film 132 is opened. Therefore, the IGBT according to the first embodiment
The bipolar transistor in 110 is a smaller bipolar transistor than the bipolar transistor in the conventional Schottky junction type IGBT 910. Therefore, as shown in FIG. 4, when the same collector current (for example, 5 A (ampere)) as in the case of the conventional Schottky junction type IGBT 910 is applied to the IGBT 110 according to the first embodiment, the current density becomes higher. Since it becomes higher, the current amplification factor (h _FE ) becomes lower. Therefore, as shown in FIG. 5, the tail current becomes smaller than that in the conventional case. Therefore, the time until the remaining amount of holes at the time of turn-off becomes equal to or less than the reference value is shortened, and as a result, the turn-off time is shortened. on the other hand,
At turn-on, conductivity is modulated by hole injection from the Schottky junction, so the on-resistance is kept low. Therefore, the IGBT according to the first embodiment is an excellent IGBT in which the high-speed switching characteristics are improved while keeping the ON resistance low.

6 and 7 show the IGBT according to the first embodiment.
It is a figure which shows the manufacturing process of T110. A method of manufacturing the IGBT according to the first embodiment will be described with reference to FIGS. 6 and 7.

The method of manufacturing the IGBT 110 according to the first embodiment has the following steps (a) to (e). (A) Semiconductor Substrate Preparation Step First, the N ⁻ type semiconductor substrate 108 is prepared. (B) Insulated Gate Transistor Forming Step Next, an insulated gate transistor is formed in the active region AR on the element surface of the semiconductor substrate 108 by using the DSA method or the like. (C) Semiconductor Base Forming Step Next, the back surface side of the semiconductor substrate 108 is ground and polished to thin the semiconductor substrate, and the N ⁻ type semiconductor base 1 is formed.
14 is formed. (D) Insulating Film Forming Step Next, the insulating film 132 that is partially opened is formed on the back surface of the semiconductor substrate 108. (E) Metal film forming step Next, on the back surface of the semiconductor substrate 108, platinum, molybdenum,
The drain electrode 130 is formed by sequentially stacking thin films of titanium, nickel, and silver.

Through the above manufacturing steps, the IGBT 110 according to the first embodiment as shown in FIG. 1 was obtained. As described above, this manufacturing method is a typical Schottky junction type IG.
This is a simple method in which, before the metal film forming step in the BT manufacturing step, an insulating film forming step of forming an insulating film partially opened on the back surface of the semiconductor substrate is added. As described above, it is possible to manufacture an IGBT having an improved high-speed switching characteristic by further shortening the turn-off time while maintaining a low on-resistance while using a simple method.

FIG. 8 shows the IGBT 110 according to the first embodiment.
It is a partially enlarged view showing a second structural example of the other surface of FIG.
In FIG. 8, the broken line indicates the unit cell on the element surface of the IGBT 110 according to the second structural example. As shown in FIG. 8, in this second structural example, an island-shaped insulating film is formed between each unit cell. When the characteristics of the IGBT according to the second structure example were evaluated, it was found that the ON resistance was low, the turn-off time was short, and the high-speed switching characteristics were improved, as in the case of the first structure example.

FIG. 9 shows the IGBT 110 according to the first embodiment.
It is a partial enlarged view showing the 3rd example of construction of the other surface of.
In FIG. 9, a broken line indicates a unit cell on the element surface of the IGBT 110 according to the third structural example. As shown in FIG. 9, this third structural example has a pattern structure opposite to that of the first structural example. In the insulating film of this structural example,
The openings are formed so as to be arranged in an island shape. When the characteristics of the IGBT according to the third structure example were evaluated, as in the first structure example and the second structure example, the on-resistance was low, the turn-off time was short, and the high-speed switching characteristics were improved. I understood it.

FIG. 10 shows the IGBT 11 according to the first embodiment.
It is a figure which shows the 4th structural example of the other surface of 0. Figure 9
In the figure, the broken line indicates the unit cell on the element surface of the IGBT 110 according to the fourth structural example. As shown in FIG. 9, in the fourth structural example, stripe-shaped insulating films are provided separately from each other corresponding to each unit cell formed in a stripe shape. I according to the fourth structural example
When the characteristics of the GBT were evaluated, it was found that the ON resistance was low, the turn-off time was short, and the high-speed switching characteristics were improved, as in the case of the first to third structural examples.

(Embodiment 2) FIG. 11 is a diagram for explaining a back surface structure of an IGBT according to Embodiment 2 of the present invention, and FIG. 12 is a sectional view taken along line AA of FIG.
FIG. 3 is a cross-sectional view of the IGBT according to the present invention. FIG. 13 shows B of FIG.
FIG. 7 is a cross-sectional view of the IGBT according to the second embodiment taken along line -B. The IGBT 210 according to the second embodiment will be described with reference to FIGS. 11, 12, and 13.

As shown in FIG. 11, I of the second embodiment
The GBT 210 includes an active region AR, a fixed potential diffusion region DR formed on both sides of the active region AR, a guard ring GR arranged around the chip, and a central portion on an element surface of an N ⁻ type semiconductor substrate 214. The gate pad region GP is formed in the same area as that of the conventional Schottky junction type IGBT 910. Note that in FIG. 11, the structure formed on the element surface is also partially shown for reference. In addition, the IGBT 210 according to the second embodiment
Is formed with a partially opened insulating film 132 in a region corresponding to the active region on the back surface.
It has a structure in which a drain electrode 130 is further formed on the surface side of 32, and this point is the same as the IGBT 110 according to the first embodiment.

However, the IGBT according to the second embodiment
210 includes a second insulating film 233 formed in the same process as the insulating film 232 on the semiconductor substrate side of the drain electrode 230 on the outer periphery of the back surface of the semiconductor substrate 214. It is characterized in that it is configured so as not to extend to the outer end portion of the outer peripheral portion. Therefore, when the wafer is diced into chips, the metal forming the drain electrode 230 is separated from the chip side surface 2.
It is possible to reliably prevent it from getting around 60 (dicing surface). As a result, the IGBT has extremely little leakage at the Schottky junction surface. In the second embodiment, the second insulating film 233 is the insulating film 232.
Since it can be formed in the same step, the process is not complicated.

Thus, the IGBT 2 according to the second embodiment
Similar to the IGBT 110 according to the first embodiment, 10 is an excellent IGBT in which the high-speed switching characteristics are improved while keeping the ON resistance low, and of course, an even more excellent IGBT with extremely little leakage at the Schottky junction surface.
Becomes

14 and 15 show I according to the second embodiment.
It is a figure which shows the manufacturing process of GBT210. The IGBT 210 according to the second embodiment with reference to FIGS. 14 and 15.
The manufacturing method of will be described.

The method of manufacturing the IGBT 210 according to the second embodiment has the following steps (a) to (f). (A) Semiconductor Substrate Preparation Step First, the N ⁻ type semiconductor substrate 208 is prepared. (B) Insulated Gate Transistor Forming Step Next, an insulated gate transistor is formed in the active region AR of the element surface of the semiconductor substrate 208 by using the DSA method or the like. (C) Semiconductor Base Forming Step Next, the back surface side of the semiconductor substrate 208 is ground and polished to thin the semiconductor substrate to form the N ⁻ type semiconductor base 2.
14 is formed. (D) Insulating Film Forming Step Next, the insulating film 232 and the second insulating film 233 which are partially opened are formed on the back surface of the semiconductor substrate 214. (E) Metal film forming step Next, the drain electrode 230 is formed on the back surface of the semiconductor substrate 214.
Forming a metal film. (F) Metal Film Removing Step Next, the metal film forming the drain electrode 230 is removed from the outer peripheral surface of the back surface of the semiconductor substrate 214.

Through the above manufacturing process, the IGBT 110 according to the second embodiment as shown in FIGS. 12 and 13 is obtained. As described above, according to this manufacturing method, in the manufacturing process of the IGBT according to the first embodiment, the second insulating film 233 is simultaneously formed in the insulating film forming step, and the semiconductor substrate 214 is formed after the metal film forming step. This is a simple method of adding a metal film removing step of removing the metal film forming the drain electrode 130 on the outer peripheral portion of the back surface. Although the method is simple as described above, the I
In addition to the effects of the GBT manufacturing method, the following effects are obtained.

That is, when the wafer is diced into chips, it is possible to reliably prevent the metal forming the drain electrode from wrapping around the side surface (dicing surface) of the chip. It is possible to manufacture an IGBT with less leakage.

(Third Embodiment) FIGS. 16 and 17 are sectional views of an IGBT according to a third embodiment. 16 is a diagram corresponding to FIG. 12 which is a cross-sectional view of the IGBT 210 according to the second embodiment, and FIG. 17 is an IGBT according to the second embodiment.
FIG. 14 is a view corresponding to FIG. 13, which is a cross-sectional view of 210. Figure 1
6 and FIG. 17, the IGBT according to the third embodiment
The T310 will be described.

As shown in FIGS. 16 and 17, the IGBT 310 according to the third embodiment is similar to the IG according to the second embodiment.
It has a structure very similar to BT210. That is, in the IGBT 310 according to the third embodiment, the insulating film 332 that is partially opened is formed in the region corresponding to the active region on the back surface, and the drain electrode 330 is further formed on the front surface side of the insulating film 332. It has a different structure. In addition, the IGBT 310 according to the third embodiment includes the semiconductor substrate 3
A second insulating film 333 formed in the same step as the insulating film 332 is formed on the semiconductor substrate side of the drain electrode 330 on the outer periphery of the back surface of the drain electrode 330, and the drain electrode 330 is formed on the outer end of the outer periphery. It is characterized in that it is configured so as not to extend to the part.

However, the IGBT according to the third embodiment
In the region 310 where the second insulating film 333 is formed, the N ⁺ region 336 is formed on the semiconductor substrate 314 so as not to contact the drain electrode 330 and to be exposed on the side surface 360 of the semiconductor substrate 314. Has been formed. Further, in the region where the second insulating film 333 is formed,
A P region 334 is formed in the semiconductor substrate 314 so as not to come into contact with the drain electrode 330 and not exposed at the side surface 360 of the semiconductor substrate 314.

[0062] Therefore, by the action of the N ⁺ region 336 formed in the semiconductor substrate 314, since the inversion layer on the surface of the semiconductor body 314 is stopped at this N ⁺ region 336, it is possible to reduce the channel current.

Further, due to the action of the P region 334 formed in the semiconductor substrate 314, the depletion layer of the Schottky junction spreads and reaches the P region, and further covers the P region together with the depletion layer of the P region. The electric field strength at the end of the second insulating film 333 is weakened. Therefore, even if a voltage of opposite polarity is applied between the source terminal and the drain terminal by mistake, the breakdown voltage can be ensured and the element can be prevented from being broken. The IGBT has an excellent so-called reverse connection protection function. Besides, P region 33
4 and the drain electrode 330 are not in contact with each other, there is no portion that constitutes a normal PN junction type IGBT. Therefore, there is no increase in switching loss due to a long turn-off time.

Thus, the IGBT 3 according to the third embodiment
Similar to the IGBT 210 according to the second embodiment, 10 is an excellent IGBT with extremely low Schottky junction surface leakage, in which the high-speed switching characteristics are further improved while keeping the ON resistance low, and the channel current is reduced. Excellent IGB with excellent reverse connection protection function
T.

18 and 19 show I according to the third embodiment.
It is a figure which shows the manufacturing process of GBT310. The IGBT 310 according to the third embodiment will be described with reference to FIGS. 18 and 19.
The manufacturing method of will be described.

The method of manufacturing the IGBT 310 according to the third embodiment has the following steps (a) to (h). (A) Semiconductor Substrate Preparation Step First, the N ⁻ type semiconductor substrate 308 is prepared. (B) Insulated Gate Transistor Forming Step Next, an insulated gate transistor is formed in the active region AR of the element surface of the semiconductor substrate 308 by using the DSA method or the like. (C) Semiconductor Base Forming Step Next, the back surface side of the semiconductor substrate 308 is ground and polished to thin the semiconductor substrate to form the N ⁻ type semiconductor base 3.
14 is formed. (D) P region forming step Next, the P region 33 is formed at a predetermined position on the back surface of the semiconductor substrate 308.
4 is formed. (E) N ⁺ Region Forming Step Next, the N ⁺ region 3 is formed at a predetermined position on the back surface of the semiconductor substrate 308.
36 is formed. (F) Insulating Film Forming Step Next, the insulating film 332 and the second insulating film 333 which are partially opened are formed on the back surface of the semiconductor substrate 314. (G) Metal film forming step Next, the drain electrode 330 is formed on the back surface of the semiconductor substrate 314.
Forming a metal film. (H) Metal Film Removal Step Next, the metal film forming the drain electrode 330 is removed from the outer periphery of the back surface of the semiconductor substrate 314.

Through the above steps, the IGBT 310 according to the third embodiment as shown in FIGS. 16 and 17 is obtained.
Thus, this manufacturing method is the same as the IGBT according to the second embodiment.
Before T manufacturing process definitive insulating film forming step, a P region forming step of forming a P region in a predetermined position of the back surface of the semiconductor substrate, N ⁺ region forming forming N ⁺ regions in a predetermined position of the back surface of the semiconductor substrate It is a simple method that only adds steps and. Although it is a simple method as described above, it has the following effects in addition to the effects of the method for manufacturing the IGBT according to the second embodiment.

That is, due to the action of the N ⁺ region formed in the semiconductor substrate, the inversion layer on the surface of the semiconductor substrate becomes the N ⁺ region.
Since it is stopped at the region, the channel current can be reduced. Further, due to the action of the P region formed on the semiconductor substrate, the breakdown voltage can be secured even when a voltage of opposite polarity is applied between the source terminal and the drain terminal by mistake, and the breakdown of the element is prevented. be able to. The IGBT has an excellent so-called reverse connection protection function. Moreover, since the P region and the drain electrode are not in contact with each other, a normal PN
There is no part that constitutes a junction type IGBT. Therefore, there is no increase in switching loss due to a long turn-off time.

[0069]

As described above, the IGBT of the present invention is used.
In the region where the insulating film is opened, a partially opened insulating film is formed on the other surface of the semiconductor substrate, and a drain electrode is further formed on the surface side of the insulating film. Since the Schottky junction is formed by the semiconductor substrate and the drain electrode, it is an excellent IGBT in which the ON resistance is kept low and the high speed switching characteristic is further improved. Further, in the IGBT of the present invention, an insulating film that is partially opened is formed in at least the active region of the other surface of the semiconductor substrate, and a drain electrode is further formed on the surface side of this insulating film. As a result, a Schottky junction is formed by the semiconductor substrate and the drain electrode in the region where the insulating film is opened, so that an excellent IGBT with further improved high-speed switching characteristics while keeping the on-resistance low. ing. Furthermore, according to the manufacturing method of the IGBT of the present invention, the excellent IG as described above is obtained.
The BT can be easily manufactured.

[Brief description of drawings]

FIG. 1 is a sectional view of an IGBT according to a first embodiment.

FIG. 2 is a diagram showing a back surface structure of the IGBT according to the first embodiment.

FIG. 3 is a partial enlarged view showing a first structure example of the back surface of the IGBT according to the first embodiment.

FIG. 4 is a diagram showing a current amplification factor of the IGBT according to the first embodiment.

FIG. 5 is a current waveform diagram when the IGBT according to the first embodiment is turned off.

FIG. 6 is a diagram showing a manufacturing process of the IGBT according to the first embodiment.

FIG. 7 is a diagram showing a manufacturing process of the IGBT according to the first embodiment.

FIG. 8 is a partial enlarged view showing a second structure example of the back surface of the IGBT according to the first embodiment.

FIG. 9 is a partially enlarged view showing a third structural example of the back surface of the IGBT according to the first embodiment.

FIG. 10 is a partial enlarged view showing a fourth structure example of the back surface of the IGBT according to the first embodiment.

FIG. 11 is a diagram for explaining the back surface structure of the IGBT according to the second embodiment.

FIG. 12 is a sectional view of an IGBT according to a second embodiment.

FIG. 13 is a sectional view of an IGBT according to a second embodiment.

FIG. 14 is a diagram showing a manufacturing process of the IGBT according to the second embodiment.

FIG. 15 is a diagram showing a manufacturing process of the IGBT according to the second embodiment.

FIG. 16 is a sectional view of an IGBT according to a third embodiment.

FIG. 17 is a sectional view of an IGBT according to a third embodiment.

FIG. 18 is a diagram showing a manufacturing process of the IGBT according to the third embodiment.

FIG. 19 is a diagram showing a manufacturing process of the IGBT according to the third embodiment.

FIG. 20 is a partial cross-sectional view of a conventional PN junction type IGBT.

FIG. 21 is a partial cross-sectional view of a conventional Schottky junction type IGBT.

FIG. 22 is a diagram showing a device surface structure of a conventional Schottky junction type IGBT.

23 is a partially enlarged view of a portion C in FIG.

24 is a partially enlarged view of a portion C in FIG.

[Explanation of symbols]

108 N ⁻ type semiconductor substrate 110, 210, 310 IGBT 114, 214, 314 N ⁻ Substrate 130, 230, 330 Drain electrode 231, 331 SiO ₂ film 132, 232, 332 SiO ₂ film 233, 333 SiO ₂ film 334 P region 336 N ⁺ regions 260, 360 Dicing surface AR Active region GR Guard ring region GP Gate pad region DR Fixed potential diffusion region

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 29/417 H01L 29/48 P 29/872 29/50 B

Claims (9)

[Claims] 1. An N ⁻ type semiconductor substrate has an insulated gate transistor on one surface thereof for switching a current flowing in a thickness direction of the semiconductor substrate, and the other surface of the semiconductor substrate has the insulated gate transistor. An insulated gate bipolar transistor having a Schottky junction for injecting holes into the semiconductor substrate to cause conductivity modulation when the transistor is turned on, wherein the other surface of the semiconductor substrate is partially opened. The insulating film is formed, and the drain electrode is further formed on the surface side of the insulating film to form a Schottky junction between the semiconductor substrate and the drain electrode in the region where the insulating film is opened. Insulated gate bipolar transistor characterized by the following. 2. An N ⁻ -type semiconductor substrate has, on one surface thereof, an active region in which a large number of insulated gate transistors for switching a current flowing in the thickness direction of the semiconductor substrate are formed, and an inactive region. Then, on the other surface of the semiconductor substrate, an insulated gate bipolar transistor having a Schottky junction for injecting holes into the semiconductor substrate to cause conductivity modulation when the insulated gate transistor is turned on, In at least a region corresponding to the active region of the other surface of the semiconductor substrate, a partially opened insulating film is formed, and a drain electrode is further formed on the surface side of this insulating film, A Schottky junction is formed by the semiconductor substrate and the drain electrode in a region where the insulating film is opened. A characteristic insulated gate bipolar transistor. 3. The insulated gate bipolar transistor according to claim 1, wherein an outer peripheral portion of the other surface of the semiconductor substrate is formed on the semiconductor substrate side of the drain electrode in the same step as the insulating film. An insulated gate bipolar transistor, wherein the drain electrode is formed so as not to extend to the outer end portion of the outer peripheral portion. 4. The insulated gate bipolar transistor according to claim 3, wherein in the region where the second insulating film is formed, the semiconductor substrate is prevented from coming into contact with the drain electrode and the semiconductor. The N ⁺ region is formed so as to be exposed on the side surface of the base body, and in the region where the second insulating film is formed, the semiconductor base body is prevented from coming into contact with the drain electrode, and An insulated gate bipolar transistor, wherein a P region is formed so as not to be exposed on the side surface of the semiconductor substrate. 5. The insulated gate bipolar transistor according to claim 1, wherein the semiconductor substrate is made of silicon, and at least a portion of the metal forming the drain electrode, which is in contact with the semiconductor substrate, An insulated gate bipolar transistor, which is platinum, gold, vanadium, aluminum or molybdenum. 6. The insulated gate bipolar transistor according to claim 1, wherein the insulating film and the second insulating film are an inorganic insulating film or an organic insulating film. Gate type bipolar transistor. 7. The method of manufacturing an insulated gate bipolar transistor according to claim 1, wherein (a) N ⁻
Semiconductor substrate preparation step of preparing a semiconductor substrate of a mold,
(B) an insulated gate transistor forming step of forming an insulated gate transistor on one surface of this semiconductor substrate,
(C) a semiconductor substrate forming step of thinning the semiconductor substrate by processing the other surface side of the semiconductor substrate to form an N ⁻ -type semiconductor substrate; and (d) the other surface of the semiconductor substrate. And (e) a metal film forming step of forming a metal film forming a drain electrode on the other surface of the semiconductor substrate. And a method of manufacturing an insulated gate bipolar transistor. 8. The method of manufacturing an insulated gate bipolar transistor according to claim 3, wherein (a) a semiconductor substrate preparing step of preparing an N ⁻ type semiconductor substrate, and (b) one of the semiconductor substrates. A step of forming an insulated gate transistor on the surface, and (c) a semiconductor for thinning the semiconductor substrate by processing the other surface side of the semiconductor substrate to form an N ⁻ type semiconductor substrate. A base forming step; (d) an insulating film forming step of forming a partially opened insulating film and a second insulating film on the other surface of the semiconductor base; and (e) the other of the semiconductor bases. A metal film forming step of forming a metal film forming a drain electrode on the surface, and (f) a metal removing the metal film forming the drain electrode on the outer peripheral portion of the other surface of the semiconductor substrate. Method of manufacturing an insulated gate bipolar transistor, characterized in that it comprises a removal step, the. 9. The method for manufacturing an insulated gate bipolar transistor according to claim 4, wherein: (a) a semiconductor substrate preparing step of preparing an N ⁻ type semiconductor substrate; and (b) one of the semiconductor substrates. A step of forming an insulated gate transistor on the surface, and (c) a semiconductor for thinning the semiconductor substrate by processing the other surface side of the semiconductor substrate to form an N ⁻ type semiconductor substrate. A substrate forming step; (d) a P region forming step of forming a P region at a predetermined position on the other surface of the semiconductor substrate; and (e) an N region forming at a predetermined position on the other surface of the semiconductor substrate.
And N ⁺ region forming step of forming a region ^+, (f) the other surface of the semiconductor substrate, partially apertured insulating film and the second
And (g) a metal film forming step of forming a metal film forming a drain electrode on the other surface of the semiconductor substrate, and (h) the other of the semiconductor substrate. A method of manufacturing an insulated gate bipolar transistor, comprising: a metal film removing step of removing a metal film forming the drain electrode in an outer peripheral portion of the surface.