CN114709253B - A reverse-conducting insulated gate bipolar transistor with anode-integrated Schottky super-barrier auxiliary gate - Google Patents
A reverse-conducting insulated gate bipolar transistor with anode-integrated Schottky super-barrier auxiliary gate Download PDFInfo
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- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
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- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
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- H—ELECTRICITY
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Abstract
本发明公开一种阳极集成肖特基超势垒辅助栅的逆导型绝缘栅双极型晶体管，包括阳极接触区(1)、重掺杂第二导电类型阳极区(2)、第一导电类型阳极缓冲区(3)、第一导电类型漂移区(4)、第二导电类型阴极阱区(5)、重掺杂第一导电类型阴极区(6)、重掺杂第二导电类型阴极区(7)、阴极接触区(8)、栅极介质层(9)、栅极接触区(10)、阳极辅助栅介质层(13)、阳极辅助栅接触区(14)和阳极肖特基接触区(15)；本发明可以消除器件导通时的负阻效应，提高器件的工作稳定性，获得更好的导通态损耗与关断态损耗之间的折衷关系；实现器件的逆向导通能力。
The invention discloses a reverse-conducting insulated gate bipolar transistor with an anode-integrated Schottky super-barrier auxiliary gate, comprising an anode contact region (1), a heavily doped second-conductivity-type anode region (2), a first-conductivity-type anode buffer region (3), a first-conductivity-type drift region (4), a second-conductivity-type cathode well region (5), a heavily doped first-conductivity-type cathode region (6), a heavily doped second-conductivity-type cathode region (7), a cathode contact region (8), a gate dielectric layer (9), a gate contact region (10), an anode-auxiliary gate dielectric layer (13), an anode-auxiliary gate contact region (14) and an anode Schottky contact region (15). The invention can eliminate the negative resistance effect when the device is turned on, improve the working stability of the device, obtain a better compromise relationship between on-state loss and off-state loss, and realize the reverse conduction capability of the device.
Description
Technical Field
The invention relates to the field of conductivity modulation type high-voltage power devices in the technical field of semiconductor power electronic devices, in particular to a reverse-conduction type insulated gate bipolar transistor with an anode integrated with a Schottky super barrier auxiliary gate.
Background
The insulated gate bipolar transistor (IGBT: lateralInsulatedGateBipolarTransistor) has the advantages of simple driving, large current capability and high voltage withstand capability, but the turn-off speed is far slower than that of a Double-diffused metal-oxide-semiconductor effect transistor (DMOS, double-diffusedMOSFET), so that the switching loss is larger, and the application of the edge gate bipolar transistor in a power electronic system is influenced.
Methods for improving the turn-off speed of an IGBT device and reducing the switching loss mainly comprise three types:
Firstly, the service life of unbalanced carriers in the drift region is reduced, and the recombination rate is increased so as to improve the turn-off speed. In fact, while the lifetime of the unbalanced carriers in the drift region is reduced, the total number of unbalanced carriers is also reduced, which leads to an increase in on-resistance, so that this method has a trade-off problem between the off-speed and the on-resistance;
Secondly, controlling the minority carrier injection level from the anode to the drift region to achieve a compromise between on-resistance and off-time;
And thirdly, providing an unbalanced carrier extraction channel in the anode region, and rapidly reducing the total number of unbalanced carriers in the drift region when the device is turned off so as to improve the turn-off speed of the device. The structure of the unbalanced carrier extraction channel generally affects the minority carrier injection efficiency, i.e. the total number of unbalanced carriers in the drift region when on, and thus the on-resistance. In addition, in the forward opening process of the device, negative resistance effect is easy to occur in the conducting process due to the conversion of carriers from a DMOS conducting mode to an IGBT conducting mode.
For the method of increasing the turn-off speed of an IGBT device by providing an unbalanced carrier extraction path in the anode region, a device structure typical in the prior art includes a conventional anode short circuit structure as shown in fig. 1, an anode auxiliary gate as shown in fig. 2, an integrated super barrier rectifier anode structure as shown in fig. 3, a self-driven anode auxiliary gate structure as shown in fig. 4, and the like. In the existing structure, either the forward conduction capability of the device is weak, or a complex external driving circuit is needed, or the reverse conduction performance cannot be realized, and in addition, the compromise relationship between the on-state loss and the off-state loss also needs to be further optimized.
Disclosure of Invention
The invention aims to provide a reverse-conduction insulated gate bipolar transistor with an anode integrated with a Schottky super barrier auxiliary gate, which comprises an anode contact region, a heavily doped second-conductivity-type anode region, a first-conductivity-type anode buffer region, a first-conductivity-type drift region, a second-conductivity-type cathode well region, a heavily doped first-conductivity-type cathode region, a heavily doped second-conductivity-type cathode region, a cathode contact region, a gate dielectric layer, a gate contact region, an anode auxiliary gate dielectric layer, an anode auxiliary gate contact region and an anode Schottky contact region.
The first conductivity type drift region overlies the first conductivity type anode buffer region.
The second conductivity type cathode well region overlies the first conductivity type drift region.
The heavily doped first conductivity type cathode region and the heavily doped second conductivity type cathode region overlie the second conductivity type cathode well region.
The cathode contact region overlies a heavily doped second conductivity type cathode region.
The gate dielectric layer covers the second conductivity type cathode well region.
The gate contact region overlies a gate dielectric layer.
The heavily doped second conductivity type anode region overlies the first conductivity type anode buffer region.
The anode auxiliary gate dielectric layer covers a portion of the surface of the first conductivity type anode buffer region. The anode auxiliary gate contact region covers the lower part of the anode auxiliary gate dielectric layer.
The anode contact region overlies the second conductivity type anode region.
The anode schottky contact region covers a portion of the surface of the anode buffer region of the first conductivity type.
The anode contact area and the anode Schottky contact area jointly lead out an anode electrode.
The anode contact areas and the anode Schottky contact areas are arranged in parallel at intervals.
The second conductivity type cathode well region covers a portion of the surface above the first conductivity type drift region.
The heavily doped first conductivity type cathode region and the heavily doped second conductivity type cathode region cover a portion of the surface above the second conductivity type cathode well region.
The cathode contact region also covers a portion of the surface above the heavily doped first conductivity type cathode region.
The gate dielectric layer also covers a portion of the surface over the heavily doped first conductivity type cathode region and a portion of the surface over the first conductivity type drift region.
The gate dielectric layer covers a portion of the surface above the second conductivity type cathode well region.
The heavily doped anode region of the second conductivity type covers a portion of the surface under the anode buffer region of the first conductivity type.
Preferably, the anode contact region and the anode schottky contact region are in contact with each other.
Preferably, the anode contact region and the anode schottky contact region do not contact each other.
The reverse-conduction insulated gate bipolar transistor comprises an anode contact region, a heavily doped second-conductivity-type anode region, a first-conductivity-type anode buffer region, a first-conductivity-type drift region, a second-conductivity-type cathode well region, a heavily doped first-conductivity-type cathode region, a heavily doped second-conductivity-type cathode region, a cathode contact region, a gate dielectric layer, a gate contact region, an anode auxiliary gate dielectric layer and an anode Schottky contact region.
The first conductivity type drift region overlies the first conductivity type anode buffer region.
The second conductivity type cathode well region overlies the first conductivity type drift region.
The heavily doped first conductivity type cathode region and the heavily doped second conductivity type cathode region overlie the second conductivity type cathode well region.
The cathode contact region overlies a heavily doped second conductivity type cathode region.
The gate dielectric layer covers the second conductivity type cathode well region.
The gate contact region overlies a gate dielectric layer.
The heavily doped second conductivity type anode region overlies the first conductivity type anode buffer region.
The anode auxiliary gate dielectric layer covers a portion of the surface of the first conductivity type anode buffer region.
The anode contact region overlies the second conductivity type anode region.
The anode Schottky contact area covers the lower part of the anode auxiliary gate dielectric layer, and the anode Schottky contact area also covers part of the surface below the first conductive type anode buffer area.
The anode contact area and the anode Schottky contact area jointly lead out an anode electrode.
The anode contact areas and the anode Schottky contact areas are arranged in parallel at intervals.
The second conductivity type cathode well region covers a portion of the surface above the first conductivity type drift region.
The heavily doped first conductivity type cathode region and the heavily doped second conductivity type cathode region cover a portion of the surface above the second conductivity type cathode well region.
The cathode contact region also covers a portion of the surface above the heavily doped first conductivity type cathode region.
The gate dielectric layer also covers a portion of the surface over the heavily doped first conductivity type cathode region and a portion of the surface over the first conductivity type drift region.
The gate dielectric layer covers a portion of the surface above the second conductivity type cathode well region.
The heavily doped anode region of the second conductivity type covers a portion of the surface under the anode buffer region of the first conductivity type.
Preferably, the anode contact region and the anode schottky contact region are in contact with each other.
Preferably, the anode contact region and the anode schottky contact region do not contact each other.
The technical effects of the invention are undoubtedly that the invention has the following advantages:
1) The insulated gate bipolar transistor of the anode integrated Schottky super barrier auxiliary gate adopts a design structure of the anode integrated Schottky super barrier self-driven auxiliary gate;
2) Compared with a conventional short-circuit anode IGBT device, an auxiliary grid anode IGBT device, an integrated super barrier rectifier anode IGBT device, a self-driven anode auxiliary grid IGBT device and the like in the prior art, the insulated gate bipolar transistor with the anode integrated with the Schottky super barrier auxiliary grid can eliminate the negative resistance effect when the device is conducted on the premise of ensuring the smaller turn-off time of the device, improve the working stability of the device and obtain a better trade-off relation between the on-state loss and the off-state loss; the reverse conduction capability of the device is realized; and the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, so that the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
3) The insulated gate bipolar transistor with the anode integrated Schottky super barrier auxiliary gate adopts the design structure of the anode integrated Schottky super barrier self-driven auxiliary gate, can eliminate the negative resistance effect when the device is conducted on the premise of ensuring smaller turn-off time of the device, improves the working stability of the device, and obtains better trade-off relation between on-state loss and off-state loss; the reverse conduction capability of the device is realized; and the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, so that the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
Drawings
Fig. 1 is a schematic structural diagram of a prior art shorted anode device;
FIG. 2 is a schematic diagram of an auxiliary gate anode device in the prior art;
FIG. 3 is a schematic diagram of an anode device of an integrated super barrier rectifier according to the prior art;
FIG. 4 is a schematic diagram of a self-driven anode auxiliary gate device in the prior art;
Fig. 5 is a schematic structural diagram of embodiment 3 of an IGBT device according to the present invention;
Fig. 6 is a structural view of embodiment 4 of an IGBT device provided by the invention;
Fig. 7 is a schematic structural diagram of embodiment 5 of an IGBT device according to the present invention;
Fig. 8 is a schematic structural diagram of embodiment 6 of an IGBT device according to the present invention;
in the figure: the anode contact region 1, the heavily doped second conductivity type anode region 2, the first conductivity type anode buffer region 3, the first conductivity type drift region 4, the second conductivity type cathode well region 5, the heavily doped first conductivity type cathode region 6, the heavily doped second conductivity type cathode region 7, the cathode contact region 8, the gate dielectric layer 9, the gate contact region 10, the second conductivity type anode well region 11, the heavily doped first conductivity type anode region 12, the anode auxiliary gate dielectric layer 13, the anode auxiliary gate contact region 14 and the anode schottky contact region 15.
Detailed Description
The present invention is further described below with reference to examples, but it should not be construed that the scope of the above subject matter of the present invention is limited to the following examples. Various substitutions and alterations are made according to the ordinary skill and familiar means of the art without departing from the technical spirit of the invention, and all such substitutions and alterations are intended to be included in the scope of the invention.
Example 1:
An anode integrated Schottky super barrier auxiliary gate reverse-conduction insulated gate bipolar transistor comprises an anode contact region 1, a heavily doped second conductivity type anode region 2, a first conductivity type anode buffer region 3, a first conductivity type drift region 4, a second conductivity type cathode well region 5, a heavily doped first conductivity type cathode region 6, a heavily doped second conductivity type cathode region 7, a cathode contact region 8, a gate dielectric layer 9, a gate contact region 10, an anode auxiliary gate dielectric layer 13, an anode auxiliary gate contact region 14 and an anode Schottky contact region 15.
The first conductivity type drift region 4 overlies the first conductivity type anode buffer region 3.
The second conductivity type cathode well region 5 overlies the first conductivity type drift region 4.
The heavily doped first conductivity type cathode region 6 and the heavily doped second conductivity type cathode region 7 overlie the second conductivity type cathode well region 5.
The cathode contact region 8 overlies the heavily doped second conductivity type cathode region 7.
The gate dielectric layer 9 overlies the second conductivity type cathode well region 5.
The gate contact region 10 overlies the gate dielectric layer 9.
The heavily doped anode region 2 of the second conductivity type is covered under the anode buffer region 3 of the first conductivity type.
The anode auxiliary gate dielectric layer 13 covers a portion of the surface under the first conductive type anode buffer region 3. The anode auxiliary gate contact region 14 is covered under the anode auxiliary gate dielectric layer 13.
The anode contact region 1 is covered under an anode region 2 of the second conductivity type.
The anode schottky contact region 15 covers under the anode auxiliary gate contact region 14, and the anode schottky contact region 15 also covers a part of the surface under the first conductive type anode buffer region 3.
The anode contact region 1 and the anode schottky contact region 15 jointly lead out of the anode electrode.
The anode contact area 1 and the anode schottky contact area 15 are arranged in parallel at intervals.
The second conductivity type cathode well region 5 covers a portion of the surface above the first conductivity type drift region 4.
The heavily doped first conductivity type cathode region 6 and the heavily doped second conductivity type cathode region 7 cover a part of the surface above the second conductivity type cathode well region 5.
The cathode contact region 8 also covers a portion of the surface above the heavily doped first conductivity type cathode region 6.
The gate dielectric layer 9 also covers a part of the surface above the heavily doped first conductivity type cathode region 6 and a part of the surface above the first conductivity type drift region 4.
The gate dielectric layer 9 covers a portion of the surface above the second conductivity type cathode well region 5.
The heavily doped anode region 2 of the second conductivity type covers a portion of the surface under the anode buffer region 3 of the first conductivity type.
The anode contact 1 and the anode schottky contact 15 are in contact with each other.
Example 2:
An anode integrated Schottky super barrier auxiliary gate reverse-conduction insulated gate bipolar transistor comprises an anode contact region 1, a heavily doped second conductivity type anode region 2, a first conductivity type anode buffer region 3, a first conductivity type drift region 4, a second conductivity type cathode well region 5, a heavily doped first conductivity type cathode region 6, a heavily doped second conductivity type cathode region 7, a cathode contact region 8, a gate dielectric layer 9, a gate contact region 10, an anode auxiliary gate dielectric layer 13 and an anode Schottky contact region 15.
The first conductivity type drift region 4 overlies the first conductivity type anode buffer region 3.
The second conductivity type cathode well region 5 overlies the first conductivity type drift region 4.
The heavily doped first conductivity type cathode region 6 and the heavily doped second conductivity type cathode region 7 overlie the second conductivity type cathode well region 5.
The cathode contact region 8 overlies the heavily doped second conductivity type cathode region 7.
The gate dielectric layer 9 overlies the second conductivity type cathode well region 5.
The gate contact region 10 overlies the gate dielectric layer 9.
The heavily doped anode region 2 of the second conductivity type is covered under the anode buffer region 3 of the first conductivity type.
The anode auxiliary gate dielectric layer 13 covers a portion of the surface under the first conductive type anode buffer region 3.
The anode contact region 1 is covered under an anode region 2 of the second conductivity type.
The anode schottky contact region 15 covers the anode auxiliary gate dielectric layer 13, and the anode schottky contact region 15 also covers a portion of the surface under the first conductivity type anode buffer region 3.
The anode contact region 1 and the anode schottky contact region 15 jointly lead out of the anode electrode.
The anode contact area 1 and the anode schottky contact area 15 are arranged in parallel at intervals.
The second conductivity type cathode well region 5 covers a portion of the surface above the first conductivity type drift region 4.
The heavily doped first conductivity type cathode region 6 and the heavily doped second conductivity type cathode region 7 cover a part of the surface above the second conductivity type cathode well region 5.
The cathode contact region 8 also covers a portion of the surface above the heavily doped first conductivity type cathode region 6.
The gate dielectric layer 9 also covers a part of the surface above the heavily doped first conductivity type cathode region 6 and a part of the surface above the first conductivity type drift region 4.
The gate dielectric layer 9 covers a portion of the surface above the second conductivity type cathode well region 5.
The heavily doped anode region 2 of the second conductivity type covers a portion of the surface under the anode buffer region 3 of the first conductivity type.
The anode contact 1 and the anode schottky contact 15 do not contact each other.
Example 3:
The first conductivity type is selected to be N-type and the second conductivity type is selected to be P-type.
As shown in fig. 5, a reverse-conducting insulated gate bipolar transistor with an anode integrated schottky super barrier auxiliary gate comprises an anode contact region 1, an anode p+ region 2, an N-type buffer region 3, an N-type drift region 4, a P-type cathode well region 5, a cathode n+ region 6, a cathode p+ region 7, a cathode contact region 8, a gate dielectric layer 9, a gate contact region 10, an anode auxiliary gate dielectric layer 13, an anode auxiliary gate contact region 14 and an anode schottky contact region 15;
the N-type drift region 4 is covered on the N-type buffer region 3;
the P-type cathode well region 5 covers part of the surface above the N-type drift region 4; the cathode N+ region 6 and the cathode P+ region 7 cover part of the surface above the P-type cathode well region 5; the cathode contact area 8 covers the cathode P+ area 7, and the cathode contact area 8 also covers part of the surface above the cathode N+ area 6;
The gate dielectric layer 9 covers part of the surface above the P-type cathode well region 5, and the gate dielectric layer 9 also covers part of the surface above the cathode N+ region 6 and part of the surface above the N-type drift region 4; the gate contact region 10 covers the gate dielectric layer 9;
the anode P+ region 2 covers part of the surface below the N-type buffer region 3;
The anode auxiliary gate dielectric layer 13 covers part of the surface below the N-type buffer area 3; the anode auxiliary gate contact region 14 is covered under the anode auxiliary gate dielectric layer 13;
The anode contact area 1 is covered below the anode P+ area 2; the anode schottky contact area 15 covers the lower part of the anode auxiliary gate contact area 14, and the anode schottky contact area 15 also covers part of the surface under the N-type buffer area 3; the anode contact area 1 and the anode Schottky contact area 15 jointly lead out an anode electrode;
The anode contact area 1 and the anode Schottky contact area 15 are arranged in parallel at intervals; the anode contact 1 and the anode schottky contact 15 are in contact with each other.
The insulated gate bipolar transistor with the anode integrated with the Schottky super barrier auxiliary gate provided by the embodiment can eliminate the negative resistance effect when the device is conducted on the premise of ensuring smaller turn-off time of the device, improve the working stability of the device and obtain better trade-off relation between on-state loss and off-state loss; the reverse conduction capability of the device is realized; and the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, so that the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
Example 4:
The first conductivity type is selected to be N-type and the second conductivity type is selected to be P-type.
As shown in fig. 6, a reverse-conducting insulated gate bipolar transistor with an anode integrated schottky super barrier auxiliary gate comprises an anode contact region 1, an anode p+ region 2, an N-type buffer region 3, an N-type drift region 4, a P-type cathode well region 5, a cathode n+ region 6, a cathode p+ region 7, a cathode contact region 8, a gate dielectric layer 9, a gate contact region 10, an anode auxiliary gate dielectric layer 13, an anode auxiliary gate contact region 14 and an anode schottky contact region 15;
the N-type drift region 4 is covered on the N-type buffer region 3;
the P-type cathode well region 5 covers part of the surface above the N-type drift region 4; the cathode N+ region 6 and the cathode P+ region 7 cover part of the surface above the P-type cathode well region 5; the cathode contact area 8 covers the cathode P+ area 7, and the cathode contact area 8 also covers part of the surface above the cathode N+ area 6;
The gate dielectric layer 9 covers part of the surface above the P-type cathode well region 5, and the gate dielectric layer 9 also covers part of the surface above the cathode N+ region 6 and part of the surface above the N-type drift region 4; the gate contact region 10 covers the gate dielectric layer 9;
the anode P+ region 2 covers part of the surface below the N-type buffer region 3;
The anode auxiliary gate dielectric layer 13 covers part of the surface below the N-type buffer area 3; the anode auxiliary gate contact region 14 is covered under the anode auxiliary gate dielectric layer 13;
The anode contact area 1 is covered below the anode P+ area 2; the anode schottky contact area 15 covers the lower part of the anode auxiliary gate contact area 14, and the anode schottky contact area 15 also covers part of the surface under the N-type buffer area 3; the anode contact area 1 and the anode Schottky contact area 15 jointly lead out an anode electrode;
The anode contact area 1 and the anode Schottky contact area 15 are arranged in parallel at intervals; the anode contact 1 and the anode schottky contact 15 do not contact each other.
The insulated gate bipolar transistor with the anode integrated with the Schottky super barrier auxiliary gate provided by the embodiment can eliminate the negative resistance effect when the device is conducted on the premise of ensuring smaller turn-off time of the device, improve the working stability of the device and obtain better trade-off relation between on-state loss and off-state loss; the reverse conduction capability of the device is realized; and the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, so that the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
Example 5:
The first conductivity type is selected to be N-type and the second conductivity type is selected to be P-type.
As shown in fig. 7, a reverse-conducting insulated gate bipolar transistor with an anode integrated schottky super barrier auxiliary gate comprises an anode contact region 1, an anode p+ region 2, an N-type buffer region 3, an N-type drift region 4, a P-type cathode well region 5, a cathode n+ region 6, a cathode p+ region 7, a cathode contact region 8, a gate dielectric layer 9, a gate contact region 10, an anode auxiliary gate dielectric layer 13 and an anode schottky contact region 15;
the N-type drift region 4 is covered on the N-type buffer region 3;
the P-type cathode well region 5 covers part of the surface above the N-type drift region 4; the cathode N+ region 6 and the cathode P+ region 7 cover part of the surface above the P-type cathode well region 5; the cathode contact area 8 covers the cathode P+ area 7, and the cathode contact area 8 also covers part of the surface above the cathode N+ area 6;
The gate dielectric layer 9 covers part of the surface above the P-type cathode well region 5, and the gate dielectric layer 9 also covers part of the surface above the cathode N+ region 6 and part of the surface above the N-type drift region 4; the gate contact region 10 covers the gate dielectric layer 9;
the anode P+ region 2 covers part of the surface below the N-type buffer region 3;
the anode auxiliary gate dielectric layer 13 covers part of the surface below the N-type buffer area 3;
The anode contact area 1 is covered below the anode P+ area 2; the anode schottky contact area 15 covers the lower part of the anode auxiliary gate dielectric layer 13, and the anode schottky contact area 15 also covers part of the surface below the N-type buffer area 3; the anode contact area 1 and the anode Schottky contact area 15 jointly lead out an anode electrode;
The anode contact area 1 and the anode Schottky contact area 15 are arranged in parallel at intervals; the anode contact 1 and the anode schottky contact 15 are in contact with each other.
The insulated gate bipolar transistor with the anode integrated with the Schottky super barrier auxiliary gate provided by the embodiment can eliminate the negative resistance effect when the device is conducted on the premise of ensuring smaller turn-off time of the device, improve the working stability of the device and obtain better trade-off relation between on-state loss and off-state loss; the reverse conduction capability of the device is realized; and the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, so that the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
Example 6:
The first conductivity type is selected to be N-type and the second conductivity type is selected to be P-type.
As shown in fig. 8, a reverse-conducting insulated gate bipolar transistor with an anode integrated schottky super barrier auxiliary gate comprises an anode contact region 1, an anode p+ region 2, an N-type buffer region 3, an N-type drift region 4, a P-type cathode well region 5, a cathode n+ region 6, a cathode p+ region 7, a cathode contact region 8, a gate dielectric layer 9, a gate contact region 10, an anode auxiliary gate dielectric layer 13 and an anode schottky contact region 15;
the N-type drift region 4 is covered on the N-type buffer region 3;
the P-type cathode well region 5 covers part of the surface above the N-type drift region 4; the cathode N+ region 6 and the cathode P+ region 7 cover part of the surface above the P-type cathode well region 5; the cathode contact area 8 covers the cathode P+ area 7, and the cathode contact area 8 also covers part of the surface above the cathode N+ area 6;
The gate dielectric layer 9 covers part of the surface above the P-type cathode well region 5, and the gate dielectric layer 9 also covers part of the surface above the cathode N+ region 6 and part of the surface above the N-type drift region 4; the gate contact region 10 covers the gate dielectric layer 9;
the anode P+ region 2 covers part of the surface below the N-type buffer region 3;
the anode auxiliary gate dielectric layer 13 covers part of the surface below the N-type buffer area 3;
The anode contact area 1 is covered below the anode P+ area 2; the anode schottky contact area 15 covers the lower part of the anode auxiliary gate dielectric layer 13, and the anode schottky contact area 15 also covers part of the surface below the N-type buffer area 3; the anode contact area 1 and the anode Schottky contact area 15 jointly lead out an anode electrode;
The anode contact area 1 and the anode Schottky contact area 15 are arranged in parallel at intervals; the anode contact 1 and the anode schottky contact 15 do not contact each other.
The insulated gate bipolar transistor with the anode integrated with the Schottky super barrier auxiliary gate provided by the embodiment can eliminate the negative resistance effect when the device is conducted on the premise of ensuring smaller turn-off time of the device, improve the working stability of the device and obtain better trade-off relation between on-state loss and off-state loss; the reverse conduction capability of the device is realized; and the anode integrated Schottky super barrier auxiliary gate structure adopts a self-driving design, so that the requirement of a conventional auxiliary gate anode structure on an additional driving circuit can be eliminated.
Claims (7)
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| JP5995435B2 (en) * | 2011-08-02 | 2016-09-21 | ローム株式会社 | Semiconductor device and manufacturing method thereof |
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