CS243347B1 - A method of applying a protective and insulating layer to substrates of AIIIBV fabrics - Google Patents

Abstract

Application and testing and post-implantation annealing of aIIIbV materials during material testing and in preparation for the production of integrated circuits. The essence of the solution lies in the fact that the application of a protective and insulating layer based on nitride, or silicon or aluminum oxide, or their combination by chemical reactions or thermal decomposition onto semi-insulating pads made of aIIIbv materials, and the annealing of semi-insulating pads made of AI:tIBv materials and semi-insulating pads made of aii:cBv materials with implanted layers is carried out in one annealing device during one working cycle, while the application of the protective and insulating layer is started already at the start of annealing before reaching a temperature of 873 K.

Description

(54) A method of applying a protective and insulating layer to A ^III B ^V substrates

Application and testing and post-implantation annealing of aIIIbV substances in material testing and preparation of integrated circuit production. The essence of the solution is that the deposition of a protective and insulating layer based on nitride or silicon or aluminum oxide or a combination thereof by chemical reactions or thermal decomposition on semi-insulating substrates of aIIIb ⁱⁿ substances, and annealing of semi-insulating substrates of A1 ^{: tI} B ⁱⁿ fabrics and semi-insulating pads after ^{ii: c} B ⁱⁿ fabrics with implanted layers are carried out in one annealing device during one working cycle, whereby the application of the protective and insulating layer starts already at the start of annealing before reaching the temperature of 873 K.

The invention relates to a method of applying a protective and insulating layer to A ^III B ^V substrates using post-implantation or test annealing of both A 1 ^{: II} B ^V semi-insulating substrates and A 2 B ^II semi-insulating substrates with implanted layers.

One of the important technological processes in the preparation of integrated circuits based on galliumarsenide or other A ^III: b ^V is annealing. It is used in tempering, heat resistance testing and activation of ions implanted in semi-insulating gallium arsenide.

It is usually carried out at temperatures ranging from 1,023 to 1,173 K. However, heating gallium arsenide above 873 K results in the evaporation of arsenic from the surface of the substrate, thereby altering the composition and unwanted alteration of the electrical parameters of the surface layer.

A number of methods are used to prevent the decomposition of gallium arsenide at elevated temperature. Among the most effective is a process in which gallium arsenide is coated with a thin, on the order of 10 ¹ to 10 µm, thick protective and insulating layer of silicon oxide, silicon nitride or aluminum oxide.

These protective and insulating layers are applied in a separate technological cycle in special deposition equipment at a temperature below 873 K by thermal decomposition by vapor deposition or sputtering of the respective compounds.

During a further, completely separate process cycle, another gallium-arsenide or implanted ion-insulated mat is annealed at 1023 to 1173 K in an inert atmosphere of hydrogen, argon, or nitrogen for another 10 ^l min.

The disadvantage of the present method is that the individual operations, i.e. the deposition of the protective and insulating layer and the annealing are carried out separately in at least two special devices designed for this purpose - reactors, and that it is relatively time and energy consuming.

In the present operating method, at least two cycles, the material is subjected to multiple thermal stresses, in particular when the insulating layer substrate is heated to the annealing temperature due to a different coefficient of expansion, which may result in failure of the semi-insulating substrate surface or its implanted parts.

The aforementioned drawbacks are eliminated by the method of applying a protective and insulating layer on fabric substrates according to the invention using post-implantation or test annealing of both semi-insulating A ^{II: C} B ^V substrates with implanted layers.

The invention consists in the fact that application of the protective and insulating layer based on a nitride or oxide of silicon or aluminum or a combination thereof by chemical reaction or by thermal decomposition at poloizolační washers A ^IIJ: B ^V compounds and implanted layers on insulating substrates of A ^{I:!: I} b ^V fabrics and annealing semi- ^insulating mats from A ^IIX B ^V fabrics and semi-insulating mats from A ^IIT B ^V fabrics with implanted layers are carried out in one annealing device during one working cycle, the application of protective and insulating layer is initiated already during the start of annealing before reaching the temperature of 873 K.

An advantage of the process according to the invention is that the gallium arsenide substrate is thermally stressed for a relatively shorter period of time than in the prior art processes, and the insulation layer increases in the same time course as annealing.

Because the temperature when applying the insulation and protective layer is higher than 773 K, the resulting insulation and protective layers are more compact than the protective and insulation layers formed at lower temperatures.

The process according to the invention is fast, easy to implement, continuously reproducible and can be advantageously used in testing the thermal resistance of semi-insulating gali-umarsenide pads or other substances, as well as testing the function of implanted layers and also in the process of IC production.

The method of applying a protective and insulating layer to A ^XII B ^V substrates according to the invention will be described in more detail below in two exemplary embodiments:

Example 1

Method of testing the thermal resistance of galvanarsenide semi-insulating substrates:

The coated gallium arsenide semi-insulating pad is inserted into a holder placed in the annealing reactor. The reactor is sealed and purged with inert gas and heated.

When the temperature reaches 673-723 K, a silane-oxygen mixture is injected into the reactor, further raising the temperature to 1,123 K. This causes thermal decomposition of the silane and oxygen, whereby a silicon oxide layer builds up on the semi-insulating gallium arsenide substrate.

When the thickness of this layer reaches 100 to 150 nanometers, the increase in the insulation layer is interrupted by stopping the silane and oxygen dosing. The galvanicarsenide semi-insulating mat is then further annealed only in an inert atmosphere for 30 min at 1,123 K by the so-called Rockwell test.

After cooling, the support was removed from the reactor and the protective and insulating layers were etched and the electrical parameters of the semi-insulating gallium arsenide were measured.

Example 2

Method of local implantation of implanted ions and application of protective and insulating layer in the production of integrated circuits:

On the coated substrate of the semi-insulating gallium arsenide, the desired motifs are gradually formed by known technology and the ions are implanted into locally delimited areas, such as MESFE transistors, followed by a control measurement of the implanted dose after removal of the photoresist.

Semi-insulating gallium arsenide pads with implanted motifs are placed on a holder placed in the annealing reactor. The reactor is sealed and annealed to activate the implanted ions by applying the desired thickness of the protective and insulating layer of silicon oxide, silicon nitride, or alumina to the implanted substrate.

After cooling and removal of the implanted substrate pad from the reactor, implanted parts are exposed from the galliumarsenide pad by sequential removal of the protective and insulating layers, making contacts and Schottky transitions in a known manner.

Claims (1)

SUMMARY OF THE INVENTION Method of applying a protective and insulating layer on A ^{II: I} B ^V substrates using post-implantation or test annealing of both A ^{I: tI} B ^V semi-insulating mats and A ^III B ^V semi-insulating mats with implanted layers, characterized by: the application of the protective and insulating layer based on a nitride or oxide of silicon or aluminum or a combination of a chemical reaction or thermal decomposition at poloizolační washers ^Α ΙΣΙ Β ν substances and implanted layers on insulating substrates of a ^{I: II B} substances and annealing of A ^III B ^V fabrics and A ^{I: V I} fabrics with implanted layers is carried out in one annealing device in one working cycle, with the application of the protective and insulating layer starting during the start of annealing before reaching temperature 873 K.