EP0656664A1 - Transducteur photoélectrique en siliciumpolycristallin et son procédé de fabrication - Google Patents

Transducteur photoélectrique en siliciumpolycristallin et son procédé de fabrication Download PDF

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EP0656664A1
EP0656664A1 EP94118764A EP94118764A EP0656664A1 EP 0656664 A1 EP0656664 A1 EP 0656664A1 EP 94118764 A EP94118764 A EP 94118764A EP 94118764 A EP94118764 A EP 94118764A EP 0656664 A1 EP0656664 A1 EP 0656664A1
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photoelectric transducer
transducer according
producing
layer
polycrystalline silicon
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EP0656664B1 (fr
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Shoji C/O Canon Kabushiki Kaisha Nishida
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Canon Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
    • H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
    • H10F10/165—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
    • H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
    • H10F10/165—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
    • H10F10/166—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells the Group IV-IV heterojunctions being heterojunctions of crystalline and amorphous materials, e.g. silicon heterojunction [SHJ] photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H10F71/1221—The active layers comprising only Group IV materials comprising polycrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H10F71/1224—The active layers comprising only Group IV materials comprising microcrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/10—Semiconductor bodies
    • H10F77/16—Material structures, e.g. crystalline structures, film structures or crystal plane orientations
    • H10F77/169—Thin semiconductor films on metallic or insulating substrates
    • H10F77/1692—Thin semiconductor films on metallic or insulating substrates the films including only Group IV materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/545—Microcrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/546—Polycrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • This invention relates to a polycrystalline silicon photoelectric transducer and a process for its production. More particularly it relaxes to a polycrystalline silicon photoelectric transducer having a good energy conversion efficiency, and a process for its production.
  • Solar cells make use of pn junctions in their functional parts, and Si is commonly used as semiconductors constituting the pn junctions. From the viewpoint of efficiency for converting light energy into electromotive force, it is preferred to use monocrystalline silicon. From the viewpoint of achievement of larger area and lower cost, amorphous silicon types are considered advantageous. In recent years, use of polycrystalline silicon is studied for the purpose of achieving a low cost comparable to amorphous silicon types and a high energy conversion efficiency comparable to monocrystalline silicon types. In processes hitherto proposed, however, bulk polycrystals are sliced into sheet members when used, and hence it is difficult to make their thickness not larger than 0.3 mm. Thus, they have a thickness excessively large enough to absorb light in a sufficient amount, resulting in no satisfactory effective utilization of materials in this regard. In other words, in order to make cost reduction, they must be made to have much smaller thickness.
  • ZMR zone melting recrystallization
  • Fig. 5 cross-sectionally illustrates a solar cell fabricated by the above process.
  • a metal-level silicon substrate 502 which is an inexpensive substrate with a low purity
  • an insulating layer (SiO2) 503 as an impurity barrier SiO2
  • a poly-Si (polycrystalline silicon) film 507 and an SiO2 cap layer are formed in this order, which is subjected to zone melting recrystallization (ZMR) to make the poly-Si film larger in grain size.
  • ZMR zone melting recrystallization
  • silicon is epitaxially grown on this poly-Si layer by normal pressure CVD.
  • a polycrystalline silicon thin film with a layer thickness of about 50 ⁇ m and a grain size of several mm to several cm is formed.
  • a pn junction 504 is formed by diffusion and an anti-reflection film 505 and a surface electrode 506 are further formed to produce a polycrystalline silicon thin film cell on the surface side.
  • the silicon substrate and also the SiO2 insulating layer are selectively removed by etching applied from the back to bare the back surface of the polycrystalline silicon thin film, and a back electrode 501 is formed thereon.
  • a polycrystalline silicon solar cell is produced through the above steps.
  • the polycrystalline silicon solar cell fabricated by this process have a problem on energy conversion efficiency which should be more improved to a higher conversion efficiency.
  • the polycrystalline silicon layer and the substrate is electrically insulated because of the presence of the SiO2 layer between them, and hence it is necessary to carry out etchback from the back of the substrate until the SiO2 layer is laid bare, where the SiO2 layer is further removed to bare the back surface of the polycrystalline silicon layer so that the electrode material can be deposited thereon to make electrical connection.
  • this process has another problem of complicated processing steps.
  • An object of the present invention is to solve the above problems involved in the prior art to provide a polycrystalline silicon photoelectric transducer formed of crystals with a large grain size and a good quality, and process for its production.
  • the present invention provides a photoelectric transducer comprising a metal-level silicon (hereinafter often “metal-level Si”), a metal oxide formed on the metal-level silicon, and a polycrystalline silicon (hereinafter often "poly-Si”) formed on the metal oxide.
  • metal-level Si metal-level silicon
  • poly-Si polycrystalline silicon
  • the present invention also provides a process for producing a polycrystalline silicon photoelectric transducer, comprising the steps of; forming a metal oxide on a metal-level silicon; forming a silicon film on the metal oxide; and crystallizing the silicon film to form a polycrystalline silicon.
  • the invention thus constituted makes it possible to provide a polycrystalline silicon photoelectric transducer that has good characteristics and can be fabricated with ease and to provide a process for producing such a transducer.
  • Figs. 1A to 1D schematically illustrate a main process for producing a thin-film polycrystalline silicon solar cell according to the present invention.
  • Figs. 2A to 2E schematically illustrate a process for producing a thin-film polycrystalline silicon solar cell according to the present invention.
  • Figs. 3A and 3C schematically illustrate lamp irradiation devices used in the process of the present invention
  • Figs. 3B and 3D are graphs to show examples of temperature sequence in heating.
  • Figs. 4A to 4E schematically illustrate a process for producing a heterojunction type solar cell.
  • Fig. 5 is a cross section of a conventional thin-film polycrystalline silicon cell.
  • a metal oxide 102 is deposited by a means such as sputtering (Fig. 1A), and thereafter, (b) a silicon layer 103 is formed by CVD or the like and a cap layer 104 comprising NSG (non-doped silica glass) or the like is further deposited thereon by CVD or the like (Fig. 1B). Then, (c) the silicon layer is heated by lamp irradiation from the upper part and melted so as to effect recrystallization so that its grain size is enlarged (Fig. 1C), and also (d) optionally after removal of the cap layer a recrystallized silicon layer 105 thus formed is subjected to liquid-phase epitaxy to increase its thickness (Fig. 1D).
  • the present inventors have discovered that a polycrystalline silicon layer with a large grain size and a good film quality can be formed when a silicon layer deposited on a metal oxide such as ZnO is recrystallized by lamp heating, and thus have accomplished the present invention.
  • step (c) of recrystallization there is not so much difference in the coefficient of thermal expansion between the Si layer, the metal oxide layer and the metal-level Si substrate, and hence the stress applied to the poly-Si layer, the Si layer and the metal-level Si layer little comes into question, so that good poly-Si and good electrical properties can be obtained.
  • the use of the metal oxide enables electrical connection between the recrystallized Si layer and the underlying metal-level Si substrate, so that any time-consuming, troublesome steps such as the etchback of substrates that is required when SiO2 film is used become unnecessary.
  • a metal-level silicon which can achieve electrical connection, has substantially the same coefficient of thermal expansion as silicon semiconductors and has a low purity, specifically, contains 1 ppm to 2% of of impurity elements is inexpensive and can be used relatively with ease.
  • the metal oxide used in the present invention may be selected from those having a melting point higher than that of silicon and having a conductivity.
  • ZnO, NiO and V2O3 are used.
  • ZnO is preferred in view of its readiness to handle, a small difference in coefficient of thermal expansion with respect to Si and its less tendency to produce stress.
  • Thickness of the metal oxide 102 depends on the quality of metal oxides, melting-recrystallizing conditions and so forth. Stated approximately, it may preferably be in the range of from 0.5 to 10 ⁇ m.
  • the metal oxide layer may also preferably have a specific resistance of 10 ⁇ 3 to 1 ⁇ cm taking account of conductivity.
  • the silicon layer deposited on the metal oxide layer 102 may be non-monocrystalline, i.e., amorphous or crystalline, or may be a mixture of amorphous and monocrystalline.
  • the silicon layer may be deposited by any process including normal pressure CVD, LPCVD, plasma-assisted CVD such as high-frequency plasma-assisted CVD or microwave plasma-assisted CVD, photo-CVD, vapor deposition and sputtering.
  • the silicon layer may preferably have a thickness approximately in the range of from 0.5 to 50 ⁇ m.
  • the silicon layer having been recrystallized may preferably have a layer thickness of several tens microns or less and a grain size of several hundreds ⁇ m to several mm.
  • maximum temperature may preferably be set at 1,410 to 1,450 C, and retention time on that occasion may preferably be from 5 seconds to 120 seconds.
  • retention time on that occasion may preferably be from 5 seconds to 120 seconds.
  • the rate of temperature drop is most important and may preferably be from 0.1 to 5°C per minute.
  • the cap layer 104 on the silicon layer 103 used in the process of the present invention is formed in order to prevent the deposited silicon layer from melting to round or evaporate.
  • layers that may cause no deterioration of film quality of the deposited silicon layer NSG, PSG (Phosphorus Silicate Glass), BSG (Boron Silicate Glass), Si3N4 or ZnO, or any combination thereof, may be used.
  • Such layers can be formed using a normal pressure CVD reactor, a LPCVD reactor or a sputtering reactor.
  • PSG or BSG makes it possible also to dope the silicon layer with impurities in the course of melting to determine its conductivity type.
  • Thickness of the cap layer which depends on materials and combination thereof, may preferably be controlled in the range of from 1 to 5 ⁇ m.
  • the process for crystal growth used in the present invention may include LPCVD (Liquid-Phase Epitaxy), normal pressure CVD, plasma-assisted CVD, photo-CVD and sputtering.
  • LPCVD Liquid-Phase Epitaxy
  • normal pressure CVD normal pressure CVD
  • plasma-assisted CVD plasma-assisted CVD
  • photo-CVD photo-CVD
  • sputtering sputtering.
  • liquid-phase epitaxy the range of growth temperature in the liquid-phase epitaxy, which depends on the type of solvents, may preferably be controlled to be from 850°C to 1,050°C when Si and Sn are used.
  • the degree of super-cooling may preferably be several °C or so, and the rate of temperature drop may preferably be controlled in the range of from 0.1 to 5°C per minute.
  • Impurities are doped in the surface of the resulting poly-Si for the purpose of forming a semiconductor junction thereon.
  • the impurities are doped by ion implantation or thermal diffusion, and are selected from P, As, Sb and so forth as n-type impurities and B, Al and so forth as p-type ones.
  • a semiconductor layer having a conductivity type different from that of the poly-Si may be deposited on the surface of the poly-Si.
  • the depth of such junction or thickness of the semiconductor layer, which depends on the quantity of impurities doped, may suitably be in the range of from 0.01 to 1 ⁇ m, and more preferably from 0.02 to 0.5 ⁇ m.
  • the recrystallized Si layer or poly-Si layer formed by a crystal growth process it is suitable for the recrystallized Si layer or poly-Si layer formed by a crystal growth process to have a final layer thickness of from 10 to 200 ⁇ m, and more preferably from 20 to 200 ⁇ m.
  • a silicon layer 203 was deposited in a thickness of 6 ⁇ m using a conventional vacuum deposition reactor.
  • the Si layer thus formed was examined by X-ray diffraction to reveal that it was amorphous silicon.
  • an NSG film 204 was deposited as a cap layer in a thickness of 2 ⁇ m using a normal pressure CVD reactor (Fig. 2B).
  • FIG. 2C A schematic view of a lamp irradiation device and the temperature sequence for melting and recrystallizing the si layer as used in this step are shown in Figs. 3A and 3B, respectively.
  • reference numeral 301 denotes a substrate; 302, a quartz chamber; 303, a lamp; 304, cooling water; and 305, a reflector.
  • the NSG film on a recrystallized Si layer 203' was removed with hydrofluoric acid, and the states of the surface and cross section of the recrystallized Si layer was observed using an optical microscope and a scanning electron microscope to confirm that a relatively smooth Si layer was obtained and its layer thickness was substantially the same as that before melting. Crystal grain boundaries were acturized by Secco etching to reveal that the grain size of the recrystallized Si layer 203' had been enlarged by a size of several mm in maximum and also the etch pits on the surface of the Si layer were in a density of about 105/cm2.
  • NiO was deposited on the metal-level Si substrate 201 by conventional sputtering in a thickness of 2 ⁇ m to form the metal oxide layer 202, and the Si layer 203 was deposited thereon in a thickness of 8 ⁇ m using a conventional vacuum deposition reactor and then melted by lamp heating to carry out recrystallization. In this instance also, a similar recrystallized Si layer was obtained.
  • crystal growth was further made by liquid-phase epitaxy.
  • the crystal growth was made using a conventional slide type liquid-phase epitaxy assembly and using Sn and Si as a solvent and a solute, respectively, at a growth initiation temperature of 950°C, a super-cooling degree of 3°C and a temperature drop rate of 0.5 ⁇ C/min and for a growth time of 60 minutes (Fig. 2D).
  • the surface and cross section of the substrate surfaces were observed in the same manner as in Experiment 1, using an optical microscope and a scanning electron microscope to confirm that a relatively smooth Si layer 205 was obtained and its layer thickness was about 50 ⁇ m. Its grain size also took over the size of the underlying recrystallized Si layer and also the etch pits on the surface of the Si layer thus grown were in a density of about 5 x 104 pits /cm2.
  • phosphorus (P) was shot by ion implantation under conditions of 80 keV and 1 x 1015 ions/cm2, followed by annealing at 800°C for 30 minutes to form an n+-layer 206. Then, on that layer, collector electrodes 207 (Cr: 0.02 ⁇ m/Ag: 1 ⁇ m/Cr: 0.004 ⁇ m) and a transparent electrode 208 (ITO: 0.085 ⁇ m) were formed by vacuum deposition (Fig. 2E).
  • the I-V characteristics under light irradiation of AM 1.5 (100 mW/cm2) were measured.
  • the open-circuit voltage was 0.55 V
  • the short-circuit photocurrent was 32 mA/cm2
  • the curve factor was 0.75, where a conversion efficiency of 13.2% was obtained.
  • a large grain size Si thin film can be formed by superposingly forming the metal oxide layer and the Si layer on the metal-level Si substrate and melting the Si layer by lamp irradiation to effect recrystallization, and thus a solar cell (photovoltaic device, Device-1) having good characteristics can be fabricated.
  • a recrystallized Si layer was formed in the same manner as in Experiment 1 except that the metal oxide layer 202 was replaced with a layer formed of SiO2. The surface and cross section of the layer were observed to reveal that a relatively flat Si layer was obtained like that in Experiment 1 but etch pits formed by Secco etching were in a density of as large as 107 pits/cm2.
  • a solar cell (Device-2) was fabricated using what was obtained in Experiment 5, under the same conditions as in Experiment 4.
  • a large grain size polycrystalline Si crystal solar cell was produced on a metal-level Si substrate in the same manner as in Experiment 4.
  • ZnO was deposited by conventional sputtering to form a metal oxide layer in a thickness of 2 ⁇ m.
  • an n-type Si layer was deposited in a thickness of 20 ⁇ m using a conventional vacuum deposition reactor. The Si layer thus formed was examined by X-ray diffraction to reveal that it was amorphous silicon.
  • an NSG film was deposited as a cap layer in a thickness of 2 ⁇ m using a normal pressure CVD reactor, followed by light irradiation using a halogen lamp (25 kW) as a heat source for recrystallization, according to the temperature sequence as shown in Fig. 3B, so as to melt the Si layer to effect recrystallization.
  • the NSG film on a recrystallized Si layer was removed with an aqueous solution of hydrofluoric acid, and then boron (B) was shot into the surface portion of the Si crystal thin film by ion implantation under conditions of 20 keV and 1 x 1015 ions/cm2, followed by annealing at 800°C for 30 minutes to form a p+-layer. Then, on that layer, collector electrodes (Ti/Pd/Ag: 0.04 ⁇ m/0.02 ⁇ m/1 ⁇ m) and an ITO transparent electrode 0.085 ⁇ m) were formed on the p+-layer.
  • the I-V characteristics under light irradiation of AM 1.5 (100 mW/cm2) were measured.
  • the open-circuit voltage was 0.56 V
  • the short-circuit photocurrent was 25 mA/cm2
  • the curve factor was 0.74, where a conversion efficiency of 10.4% was obtained.
  • a polycrystalline Si crystal solar cell having an n+p junction was produced in the same manner as in Example 1.
  • Figs. 2A to 2E show its fabrication process.
  • ZnO was deposited by conventional sputtering in a thickness of 2 ⁇ m on the surface of a 0.5 mm thick metal-level Si substrate 201 (Fig. 2A).
  • a silicon layer 203 was deposited in a thickness of 10 ⁇ m using a conventional LPCVD reactor.
  • the Si layer thus formed was examined by X-ray diffraction to reveal that it was polycrystalline Si having a grain size of about 8 nm.
  • a BSG film was deposited as a cap layer 204 and also as a layer determining the conductivity type of the Si layer, in a thickness of 2 ⁇ m using a normal pressure CVD reactor (Fig. 2B).
  • the Si layer was melted by light irradiation of halogen lamps (25 kW) according to the temperature sequence as shown in Fig. 3B, to effect recrystallization (Fig. 2C).
  • the NSG film was removed with an aqueous about 5% solution of hydrofluoric acid, and then crystal growth was made using a conventional liquid-phase epitaxy assembly of a slide type boat system and using Sn as a solvent, under conditions as shown below, to obtain a large grain size Si crystal thin film 205 (Fig. 2C).
  • the above epitaxy was carried out in an atmosphere of hydrogen at a growth initiation temperature of 950°C, a super-cooling degree of 3°C and a temperature drop rate of 0.5°C/min and for a growth time of 55 minutes (Fig. 2D).
  • the Si crystal thin film and recrystallized Si layer thus obtained had a final layer thickness of abut 50 ⁇ m.
  • phosphorus (P) was thermally diffused into the surface of the Si crystal layer at a temperature of 900°C using POCl3 as a diffusion source to form an n+-layer 206 and obtain a junction in a depth of about 0.5 ⁇ m.
  • the dead layer produced by the thermal diffusion on the n+-layer thus formed was removed by etching to obtain a junction in a depth of about 0.2 ⁇ m having an appropriate surface density.
  • collector electrodes 207 and an ITO transparent electrode 208 were formed in the same manner as in Example 1 (Fig. 2E).
  • the I-V characteristics under light irradiation of AM 1.5 (100 mW/cm2) were measured.
  • the open-circuit voltage was 0.56 V
  • the short-circuit photocurrent was 34 mA/cm2
  • the curve factor was 0.73, where a conversion efficiency of 13.9% was obtained.
  • a p+-microcrystalline silicon/polycrystalline silicon heterojunction type solar cell was produced in the same manner as in Examples 1 and 2.
  • Figs. 4A to 4E show a fabrication process of the heterojunction type solar cell.
  • a silicon layer 403 was further deposited in a thickness of 12 ⁇ m by LPCVD, and also thereon a PSG film 404 was deposited in place of the BSG film 204 in Example 2, as a cap layer 404 and also as a layer determining the conductivity type of the Si layer, in a thickness of 2 ⁇ m using a normal pressure CVD reactor (Fig. 4B).
  • the Si layer was melted by light irradiation of halogen lamps (25 kW) according to the temperature sequence as shown in Fig. 3B, to effect recrystallization (Fig. 4C).
  • the temperature may be dropped in the same way or, in view of improvement in production efficiency, the film may be quenched.
  • a p-type microcrystalline Si layer 406 was formed on the Si crystal layer 405.
  • the p-type microcrystalline Si layer was deposited on the Si crystal surface in a thickness of 0.02 ⁇ m using a conventional plasma-assisted CVD reactor under conditions as shown in Table 1 below.
  • the microcrystalline Si film thus formed had a dark conductivity of about 10 S cm ⁇ 1.
  • Table 1 Gas flow rate ratio
  • ITO As a transparent conductive film 408, ITO was formed by electron beam deposition in a thickness of about 0.1 ⁇ m. On this film, collector electrodes 407 (Cr: 0.02 ⁇ m/Ag: 1 ⁇ m/Cr: 0.004 ⁇ m) were formed by vacuum deposition (Fig. 4E).
  • a large grain size Si crystal solar cell was produced in the same manner as in Example 1 according to the process as shown in Fig. 2.
  • ZnO was deposited on the surface of a metal-level Si substrate by sputtering in a thickness of 3 ⁇ m.
  • an n-type Si layer was deposited in a thickness of 40 ⁇ m using a conventional normal pressure CVD reactor.
  • an NSG film was deposited as a cap layer in a thickness of 2 ⁇ m using a normal pressure CVD reactor, followed by light irradiation using a halogen lamp according to the temperature sequence as shown in Fig. 3B, so as to melt the Si layer to effect recrystallization.
  • the NSG film on a recrystallized Si layer was removed with an aqueous solution of hydrofluoric acid.
  • BSG was deposited using a normal pressure CVD reactor, followed by RTA (Rapid Thermal Annealing).
  • the BSG deposited was in a layer thickness of about 0.6 ⁇ m and the RTA was carried out under conditions of 1,050°C for 60 seconds.
  • the junction thus formed was in a depth of about 0.2 ⁇ m.
  • the surface of the Si crystal layer was thinly oxidized (about 0.01 ⁇ m) by dry oxidation, and the oxide film formed was etched in the form of fine dots by photolithography.
  • collector electrodes Ti/Pd/Ag: 0.04 ⁇ m/0.02 ⁇ m/1 ⁇ m
  • ITO transparent electrode 0.85 ⁇ m
  • the I-V characteristics under light irradiation of AM 1.5 were measured.
  • the open-circuit voltage was 0.58 V
  • the short-circuit photocurrent was 35 mA/cm2
  • the curve factor was 0.72, where a conversion efficiency of 14.6% was obtained.
  • a large grain size Si crystal solar cell was produced in the same manner as in Example 1 according to the process as shown in Fig. 2.
  • NiO was deposited on the surface of a metal-level Si substrate by sputtering in a thickness of 3 ⁇ m.
  • an n-type Si layer was deposited in a thickness of 40 ⁇ m using a normal pressure CVD reactor.
  • a ZnO film was deposited as a cap layer in a thickness of 2 ⁇ m using a sputtering reactor, followed by light irradiation of halogen lamps using the device as shown in Fig. 3C, according to the temperature sequence as shown in Fig. 3D, so as to melt the Si layer to effect recrystallization.
  • heat sources are provided unsymmetrically in the upper and lower directions (light intensity on the upper side is greater than light intensity on the lower side).
  • the Si layer can be efficiently recrystallized while preventing the metal-level Si from melting.
  • the ZnO film on a recrystallized Si layer was removed with an aqueous solution of hydrochloric acid.
  • BSG was deposited using a normal pressure CVD reactor, followed by RTA (Rapid Thermal Annealing).
  • the BSG deposited was in a layer thickness of about 0.6 ⁇ m and the RTA was carried out under conditions of 1,050°C for 60 seconds.
  • the junction thus formed was in a depth of about 0.2 ⁇ m.
  • the surface of the Si crystal layer was thinly oxidized (about 0.01 ⁇ m) by dry oxidation, and the oxide film formed was etched in the form of fine dots by photolithography.
  • collector electrodes Ti/Pd/Ag: 0.04 ⁇ m/0.02 ⁇ m/1 ⁇ m
  • ITO transparent electrode 0.85 ⁇ m
  • This invention intends to provide an inexpensive polycrystalline silicon solar cell having a large grain size polycrystalline semiconductor layer grown on a low-cost metal-level silicon substrate, and a process for its production.
  • the polycrystalline silicon solar cell comprises a metal-level silicon substrate 101, a metal oxide layer 102 formed thereon and a polycrystalline silicon layer 105 formed on the metal oxide layer.
  • the process for producing the polycrystalline silicon solar cell comprises the steps of i) depositing a metal oxide layer 102 on a metal-level silicon substrate 101, ii) depositing a silicon layer 103 on the surface of the metal oxide layer, iii) depositing a cap layer 104 on the surface of the silicon layer and melting the silicon layer by heating from the upper part of the cap layer, followed by solidification to form a polycrystalline silicon layer, and iv) removing the cap layer and forming a semiconductor junction on the surface of the polycrystalline silicon layer.

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  • Photovoltaic Devices (AREA)
  • Recrystallisation Techniques (AREA)
EP94118764A 1993-11-30 1994-11-29 Transducteur photoélectrique en siliciumpolycristallin et son procédé de fabrication Expired - Lifetime EP0656664B1 (fr)

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JP299818/93 1993-11-30
JP29981893 1993-11-30
JP291407/94 1994-11-25
JP29140794A JP3478618B2 (ja) 1993-11-30 1994-11-25 光電変換素子及びその製造方法

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EP0656664A1 true EP0656664A1 (fr) 1995-06-07
EP0656664B1 EP0656664B1 (fr) 1998-07-22

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GB2466496A (en) * 2008-12-23 2010-06-30 Univ Bolton Photovoltaic cell based on transition metal oxides of varied band gaps and p/n types
FR2971086A1 (fr) * 2011-01-31 2012-08-03 Inst Polytechnique Grenoble Structure adaptee a la formation de cellules solaires

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JP3616785B2 (ja) * 1996-09-19 2005-02-02 キヤノン株式会社 太陽電池の製造方法
US6391108B2 (en) 1997-12-12 2002-05-21 Canon Kabushiki Kaisha Liquid phase growth method of silicon crystal, method of producing solar cell, and liquid phase growth apparatus
JP2001094136A (ja) 1999-09-22 2001-04-06 Canon Inc 半導体素子モジュールの製造方法および太陽電池モジュールの製造方法
JP2001160540A (ja) 1999-09-22 2001-06-12 Canon Inc 半導体装置の製造方法、液相成長法及び液相成長装置、太陽電池
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JP3978494B2 (ja) * 2003-06-12 2007-09-19 国立大学法人東北大学 Ｓｉ薄膜の作製方法
JP2005079122A (ja) * 2003-08-29 2005-03-24 Rikogaku Shinkokai 結晶性薄膜の作製方法
US20060049464A1 (en) 2004-09-03 2006-03-09 Rao G R Mohan Semiconductor devices with graded dopant regions
WO2007025062A2 (fr) * 2005-08-25 2007-03-01 Wakonda Technologies, Inc. Modele photovoltaique
EP2385159B1 (fr) * 2007-07-26 2012-11-28 Ecotron Co., Ltd. Procédé de production de substrat épitaxial sic
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US8415187B2 (en) 2009-01-28 2013-04-09 Solexant Corporation Large-grain crystalline thin-film structures and devices and methods for forming the same
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GB2466496A (en) * 2008-12-23 2010-06-30 Univ Bolton Photovoltaic cell based on transition metal oxides of varied band gaps and p/n types
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WO2012104535A3 (fr) * 2011-01-31 2013-03-28 Institut Polytechnique De Grenoble Structure adaptee a la formation de cellules solaires

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JPH07211931A (ja) 1995-08-11
EP0656664B1 (fr) 1998-07-22
DE69411861D1 (de) 1998-08-27
JP3478618B2 (ja) 2003-12-15
US5575862A (en) 1996-11-19
ES2122132T3 (es) 1998-12-16
DE69411861T2 (de) 1999-01-21

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