EP1005731A2 - Procede pour supprimer les parasites dans un courant de donnees bipolaire et circuiterie pour mettre ledit procede en oeuvre - Google Patents

Procede pour supprimer les parasites dans un courant de donnees bipolaire et circuiterie pour mettre ledit procede en oeuvre

Info

Publication number
EP1005731A2
EP1005731A2 EP98948692A EP98948692A EP1005731A2 EP 1005731 A2 EP1005731 A2 EP 1005731A2 EP 98948692 A EP98948692 A EP 98948692A EP 98948692 A EP98948692 A EP 98948692A EP 1005731 A2 EP1005731 A2 EP 1005731A2
Authority
EP
European Patent Office
Prior art keywords
level
equalizer
control device
data stream
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP98948692A
Other languages
German (de)
English (en)
Inventor
Markus Brandstetter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1005731A2 publication Critical patent/EP1005731A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/0335—Arrangements for removing intersymbol interference characterised by the type of transmission
    • H04L2025/03356—Baseband transmission

Definitions

  • the invention relates to a method for suppressing interference in a bipolar data stream with long line lengths, the signals of the data stream being supplied to a coarse setting and a fine setting in an equalizer and a downstream level detector and fed back from the level detector to the equalizer via a control device.
  • the invention further relates to a circuit arrangement for performing the method.
  • the equalizer Since the signal / noise ratio deteriorates more and more with increasing length of the transmission path, the equalizer has to meet ever higher demands and / or the error equalizer generates bit errors due to constant readjustments in continuous operation. So far it has been known to send and evaluate standard signals at the beginning of the transmission, which serve as training impulses or reference impulses. Such a method and the associated arrangement is described in IEEE Transactions on Communications, Vol.COM-30, No.9, Sept. 1982.
  • the invention is based on the object of specifying a method and a circuit arrangement of the type mentioned at the outset which enable error-free reception, even though they are exposed to a large number of interferers, and which nevertheless have a sufficiently fine-tuned reception fine adjustment in connection with an immediate reaction in the event of injuries guarantee of absolute interference limits.
  • a basic idea of the invention is that the fixed predetermined decision thresholds used in the prior art are replaced by decision thresholds which are based on a statistical evaluation and therefore a tendency of the threshold violation can be used as a decision criterion for countermeasures.
  • One-off violations of a reference level therefore do not lead to undesired correction. Instead, stochastic disturbances are mutually canceled out by averaging, and as a result either a rough adjustment or only a fine adaptation can be initiated. This avoids unnecessary rough adjustments. This reduces the requirements for the modulation range with a reduced supply voltage, which makes it possible to use it over longer ranges.
  • the statistical evaluation and the associated avoidance of unnecessary rough settings leads to a higher setting speed, so that one can work with low bit error rates.
  • the method according to the invention results in an expansion of the available modulation range and thus a reduction in the circuit complexity, because fewer switching stages are required, or in the opposite sense a reduction in the possible operating voltage. This means that Twists at low operating voltage with very high equalizer ranges can be developed.
  • Another great advantage is the fact that only an amplitude measurement is required to carry out the method.
  • the use of undersampling has the advantage that no high-frequency reference clock is required and that the effort with regard to the counting factor and register can be kept low.
  • the feedback branch manages with a small bandwidth.
  • An optimal stochastic database is obtained if the measuring period consists of 3 zero cycle lengths. This enables an even better decision to be made as to whether a coarse adjustment or a fine adjustment is to be carried out. Although an even greater accuracy can be brought about by a further increase in the number of zero cycle lengths, on the other hand the adaptation time of the equalizer is increased, so that a total of three times the zero cycle length appears to be particularly suitable as the measurement period.
  • a zero-clock length is understood to mean a data stream with a minimum density of logic “1” signals, i. H. a data stream with 15 "0" signals and 3 "1" signals.
  • FIG. 1 schematically shows a block diagram of a circuit arrangement for suppressing interference in a bipolar data stream.
  • FIG. 2 shows schematically three reference levels as used in the circuit arrangement according to FIG. 1, 3 schematically shows an undersampling of a voltage curve at three reference levels corresponding to FIG. 2,
  • FIG. 5 each schematically show, using a diagram, the behavior of the circuit arrangement according to FIG. 1 during the upper and lower level evaluation
  • FIG. 6 schematically shows an example of an amplitude variation of the data stream based on an eye pattern.
  • a data stream consisting of a bipolar signal is fed to an equalizer 9 with an automatic gain control 10, which is also called AGC, and a group delay filter 11, the output of which is connected in parallel to a voltage level detector 12 and a voltage peak detector 13.
  • AGC automatic gain control 10
  • group delay filter 11 the output of which is connected in parallel to a voltage level detector 12 and a voltage peak detector 13.
  • the voltage level detector 12 has three outputs, which are connected to a control device 14 to form a feedback loop.
  • the control device 14 acts on both the automatic gain control 10 and the group delay filter 11.
  • the output of the voltage peak detector 13 is connected to a receiver 15, at the output of which the reconstructed data stream is used to act on the following transmission path. This reconstructed data stream is fed back to the control device 14 via a feedback line 16.
  • a trend controller 17 is connected to the control device 14 via a bidirectional connection 18.
  • the data stream from a transmission path on a reception path 19 is affected by a large number of typical, transmission-related faults.
  • the amplitude is reset to a constant nominal value and the data signals are reconstructed.
  • the voltage curve at the equalizer output 20 is checked by the voltage level detector 12 using three reference levels a, b, c for violations of the levels a, b, c, as shown in FIG. 2. Between a lower reference level a and an upper reference level c for coarse adjustment of the gain control 10 and the group delay filter 11 there is a medium reference level b for fine adjustment with a level distance D from the upper reference level c.
  • the analog output signal of the group delay filter 11 is converted in the voltage peak detector 13 and in the receiver 15 to form the regenerated bipolar data signal, which can be tapped on the output-side data line 21.
  • the switching stages of the amplification control 10 and the characteristics of the group delay filter 11 and the associated coarse and fine adjustment are set via the control device 14.
  • This setting is also influenced by the trend control 17, in which either the evaluation criteria for the signals coming in the voltage level detector 12 and from the receiver 15 are fixed in the sense of a control or are tracked in the sense of regulation according to selectable criteria.
  • the sampling of the amplitude in the voltage level detector 12 takes place according to FIG. 3 by means of subsampling with a measuring clock pulse Clk and a measuring period T which corresponds to three times the zero clock pulse length.
  • a digital signal V a , V b and V c is triggered. With a rising edge of the clock signal T, these signals are evaluated as a digital measurement signal abc and fed to the control device 14.
  • three measurement times are shown as an example, which illustrate three digital measurement signals abc 110, 001 and 111. It should be noted that the stochastically given possibility of level misinterpretation due to undersampling is taken into account in the evaluation.
  • the level violations determined in this way are subjected to a stochastic evaluation based on the principle of event median filtering of the reference levels in the control device 14.
  • the evaluation is based on the circuit criteria which are fed in by the trend controller 17.
  • the behavior of the control device 14 is illustrated on the basis of the decision criteria for the evaluation of the upper reference level c and the lower reference level a, which are shown by way of example in FIGS. 4 and 5.
  • a first and a second decision threshold ZI or Z4 and Z2 or Z3 are defined which, depending on the symbol density of the data stream with percentage exceeding of levels for a coarse or fine adjustment or none Make correction.
  • decision thresholds ZI to Z4 are predefined, which are based on a percentage level violation of 50%, ie the number of pulses of the data stream, the amplitude of which exceeds the decision thresholds during the coarse or fine adjustment phase, is 50%.
  • Coarse settings are required, for example, when switching a transmission path or a sudden reduction in the signal amplitude, the lower reference threshold a z. B. is only exceeded in a ratio of 5%. This requires a correction that is as quick and clear as possible.
  • Fine adjustments are necessary, for example, if the transmitter acting on the input side of the circuit or the voltage supply of the present circuit arrangement leaves the specified operating range or if unspecified stochastic interferers occur that lie outside the frequency range suppressed by the median filter length in terms of circuitry. In such cases, operation should be continued as long as possible. However, since effects occur that creepingly violate the lower reference level, a fine adjustment is triggered when the 50% threshold of the median filter arrangement is reached.
  • the verification phase Long-term effects such as self-heating of the reception path or drift of the voltage level of the transmitter are considered in the verification phase. Due to the system, the reconstructed signal amplitudes vary and move relatively within the permitted band of the amplitudes, which are limited by the lower and upper reference levels a, c. To ensure that the triangle of requirements described above is optimally met, a stochastic evaluation is carried out in the verification phase, which takes into account the number of threshold violations that can be specified as a percentage and therefore differentiates between fine and coarse adjustment. In the verification phase, the average reference level b is no longer determined by the corresponding output signal of the voltage level detector 12, but rather by the regenerated data stream via the feedback line 16.
  • amplitude variations are also caused the different stochastically distributed pulse density in the data stream.
  • Such an amplitude variation is illustrated in FIG. 6 with the aid of an eye pattern of a reconstructed signal curve, which is found in the permissible edge area around the average reference level b during operation of the equalizer 9.
  • Si denotes the path of the denser signals and S 2 denotes the path of the individual pulses or the low signal density.
  • the range resulting from the amplitude variation is designated ⁇ A.
  • Reference level a, c is therefore based on a preferred embodiment of the invention also taking into account the possible amplitude variations illustrated in FIG. 6.
  • a further preferred embodiment consists in that the tendency control 17 can be used to switch over the number of lower and upper threshold violations that can be predetermined during operation. This has the advantage that the method is even more tolerant towards more massive stochastic interferers. If the success of this evaluation is again used (stochastically) for the switchover, a regulation is obtained. With such a regulation, a predeterminable number of fine adjustments are checked for their success. If no success is determined after a certain number, the percentage of threshold violations specified for these attempts is changed again.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Noise Elimination (AREA)
  • Radar Systems Or Details Thereof (AREA)

Abstract

L'invention concerne un procédé visant à supprimer les parasites d'un signal bipolaire dans le cas de longueurs de ligne importantes. Le signal est acheminé dans un correcteur en vue d'un réglage approximatif et d'un réglage fin, ainsi que jusqu'à un détecteur de niveau (12) monté en aval et est renvoyé du détecteur de niveau (12) au correcteur (9) par l'intermédiaire d'un dispositif de commande (14). Le balayage s'effectue à l'aide d'une impulsion d'horloge de mesure. L'impulsion d'horloge de balayage est mesurée de manière qu'un sous-balayage puisse être effectué. Trois niveaux de référence sont utilisés à partir de chacun desquels est dérivé un signal numérique de balayage. Un réglage approximatif ou un réglage fin est initié en fonction d'un nombre prédéterminable, selon un pourcentage, de violations supérieures ou inférieures de seuils.
EP98948692A 1997-08-18 1998-07-30 Procede pour supprimer les parasites dans un courant de donnees bipolaire et circuiterie pour mettre ledit procede en oeuvre Withdrawn EP1005731A2 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19735752 1997-08-18
DE19735752A DE19735752A1 (de) 1997-08-18 1997-08-18 Verfahren zur Störunterdrückung eines bipolaren Datenstroms und Schaltungsanordnung zur Durchführung des Verfahrens
PCT/DE1998/002180 WO1999009695A2 (fr) 1997-08-18 1998-07-30 Procede pour supprimer les parasites dans un courant de donnees bipolaire et circuiterie pour mettre ledit procede en oeuvre

Publications (1)

Publication Number Publication Date
EP1005731A2 true EP1005731A2 (fr) 2000-06-07

Family

ID=7839302

Family Applications (1)

Application Number Title Priority Date Filing Date
EP98948692A Withdrawn EP1005731A2 (fr) 1997-08-18 1998-07-30 Procede pour supprimer les parasites dans un courant de donnees bipolaire et circuiterie pour mettre ledit procede en oeuvre

Country Status (6)

Country Link
US (1) US6185262B1 (fr)
EP (1) EP1005731A2 (fr)
JP (1) JP3457280B2 (fr)
CN (1) CN1134950C (fr)
DE (1) DE19735752A1 (fr)
WO (1) WO1999009695A2 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6522707B1 (en) * 1999-04-30 2003-02-18 Siemens Aktiengesellschaft Method and device for disturbance suppression in a signal
US6331814B1 (en) * 1999-11-25 2001-12-18 International Business Machines Corporation Adapter device for the transmission of digital data over an AC power line
TWI237971B (en) * 2002-11-18 2005-08-11 Ind Tech Res Inst Automatically adjusting gain/bandwidth loop filter
US7761067B1 (en) 2003-05-15 2010-07-20 Marvell International Ltd. Iterative filter circuit calibration
TWI543571B (zh) * 2014-01-23 2016-07-21 晨星半導體股份有限公司 信號接收裝置及其兩階段適性等化方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4355402A (en) * 1978-10-19 1982-10-19 Racal-Milgo, Inc. Data modem false equilibrium circuit
JPS57152855U (fr) 1981-03-20 1982-09-25
US4449102A (en) * 1982-03-15 1984-05-15 Bell Telephone Laboratories, Incorporated Adaptive threshold circuit
JPS61198909A (ja) * 1985-02-28 1986-09-03 Nec Corp スイツチトキヤパシタ自動線路等化器
CA2047557C (fr) * 1990-07-20 1996-12-10 Mitsuo Kakuishi Dispositif de correction de donnees recues
US5257286A (en) * 1990-11-13 1993-10-26 Level One Communications, Inc. High frequency receive equalizer
EP0656694A3 (fr) * 1993-11-30 1999-12-01 AT&T Corp. Egaliseur avec détection de la longueur de la ligne
US5448589A (en) * 1994-08-01 1995-09-05 Tektronix, Inc. Circuit for sensing cable effects for automatic equalization
US5880645A (en) * 1997-07-03 1999-03-09 Level One Communications, Inc. Analog adaptive equalizer with gain and filter correction
US5991339A (en) * 1998-01-16 1999-11-23 Intel Corporation Adaptive equalization using a minimum- jitter criterion

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9909695A3 *

Also Published As

Publication number Publication date
CN1134950C (zh) 2004-01-14
WO1999009695A3 (fr) 1999-05-20
DE19735752A1 (de) 1999-02-25
JP2001516174A (ja) 2001-09-25
WO1999009695A2 (fr) 1999-02-25
CN1267420A (zh) 2000-09-20
US6185262B1 (en) 2001-02-06
JP3457280B2 (ja) 2003-10-14

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