EP1675003A3 - Système et contrôleur à tolérance de pannes, procédé de fonctionnement, et programme de fonctionnement utilisé dans le système à tolérance de pannes - Google Patents

Système et contrôleur à tolérance de pannes, procédé de fonctionnement, et programme de fonctionnement utilisé dans le système à tolérance de pannes Download PDF

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Publication number
EP1675003A3
EP1675003A3 EP05027906A EP05027906A EP1675003A3 EP 1675003 A3 EP1675003 A3 EP 1675003A3 EP 05027906 A EP05027906 A EP 05027906A EP 05027906 A EP05027906 A EP 05027906A EP 1675003 A3 EP1675003 A3 EP 1675003A3
Authority
EP
European Patent Office
Prior art keywords
fault tolerant
controller
cpu subsystem
subsystem
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05027906A
Other languages
German (de)
English (en)
Other versions
EP1675003A2 (fr
Inventor
Fumitoshi Mizutani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of EP1675003A2 publication Critical patent/EP1675003A2/fr
Publication of EP1675003A3 publication Critical patent/EP1675003A3/fr
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G06F11/1645—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components and the comparison itself uses redundant hardware
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1658—Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1683—Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
EP05027906A 2004-12-21 2005-12-20 Système et contrôleur à tolérance de pannes, procédé de fonctionnement, et programme de fonctionnement utilisé dans le système à tolérance de pannes Withdrawn EP1675003A3 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004369380A JP2006178616A (ja) 2004-12-21 2004-12-21 フォールトトレラントシステム、これで用いる制御装置、動作方法、及び動作プログラム

Publications (2)

Publication Number Publication Date
EP1675003A2 EP1675003A2 (fr) 2006-06-28
EP1675003A3 true EP1675003A3 (fr) 2010-02-24

Family

ID=36018211

Family Applications (1)

Application Number Title Priority Date Filing Date
EP05027906A Withdrawn EP1675003A3 (fr) 2004-12-21 2005-12-20 Système et contrôleur à tolérance de pannes, procédé de fonctionnement, et programme de fonctionnement utilisé dans le système à tolérance de pannes

Country Status (6)

Country Link
US (1) US7519856B2 (fr)
EP (1) EP1675003A3 (fr)
JP (1) JP2006178616A (fr)
CN (1) CN1804811A (fr)
AU (1) AU2005246986A1 (fr)
CA (1) CA2531092A1 (fr)

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US11556394B2 (en) 2021-05-14 2023-01-17 Nxp B.V. System and method for controlling access to shared resource in system-on-chips

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JP2009098988A (ja) * 2007-10-18 2009-05-07 Nec Computertechno Ltd フォルトトレラントコンピュータシステム
JP4822024B2 (ja) * 2008-02-29 2011-11-24 日本電気株式会社 フォールトトレラントサーバ、フルバックアップ方法、およびフルバックアッププログラム
US8296671B2 (en) 2008-05-01 2012-10-23 Microsoft Corporation Enabling access to rich data by intercepting paste operations
JP5347414B2 (ja) * 2008-10-03 2013-11-20 富士通株式会社 同期制御装置，情報処理装置及び同期管理方法
JP5509637B2 (ja) * 2009-03-18 2014-06-04 日本電気株式会社 フォールトトレラントシステム
CN103703427B (zh) * 2011-07-20 2016-05-11 飞思卡尔半导体公司 同步第一处理单元和第二处理单元的处理装置和方法
JP5760847B2 (ja) * 2011-08-22 2015-08-12 日本電気株式会社 情報処理装置、情報処理システム、情報処理装置の異常兆候検出方法、及び異常兆候検出プログラム
CN102364448B (zh) * 2011-09-19 2014-01-15 浪潮电子信息产业股份有限公司 一种计算机故障管理系统的容错方法
CN103455393A (zh) * 2013-09-25 2013-12-18 浪潮电子信息产业股份有限公司 一种基于进程冗余的容错系统设计方法
JP5772911B2 (ja) 2013-09-27 2015-09-02 日本電気株式会社 フォールトトレラントシステム
CN104597850A (zh) * 2013-10-30 2015-05-06 北京精密机电控制设备研究所 用于三冗余伺服控制器的数据交互及同步的方法和装置
CN103593251A (zh) * 2013-11-07 2014-02-19 浪潮电子信息产业股份有限公司 一种基于进程冗余的容错系统及其设计方法
CN104007657B (zh) * 2013-12-13 2017-06-13 许继集团有限公司 一种三重冗余系统与两重冗余系统的对接装置及方法
JP5880608B2 (ja) 2014-03-24 2016-03-09 日本電気株式会社 フォールトトレラントサーバ
KR101995515B1 (ko) * 2014-07-30 2019-07-02 지멘스 악티엔게젤샤프트 제어 인가를 컴퓨터에 할당하기 위한 방법 및 시스템
JP2016115239A (ja) * 2014-12-17 2016-06-23 日本電気株式会社 フォールトトレラントシステム、フォールトトレラント方法、及び、プログラム
JP6540113B2 (ja) * 2015-03-12 2019-07-10 日本電気株式会社 フォールトトレラントサーバおよび同期化方法、並びにコンピュータ・プログラム
KR20170130346A (ko) * 2015-03-20 2017-11-28 르네사스 일렉트로닉스 가부시키가이샤 데이터 처리 장치
CN104810808B (zh) * 2015-04-03 2017-10-31 南京国电南自电网自动化有限公司 一种多总线保护出口仲裁容错方法
US9710171B2 (en) * 2015-10-01 2017-07-18 International Business Machines Corporation Synchronous input/output commands writing to multiple targets
US10120818B2 (en) 2015-10-01 2018-11-06 International Business Machines Corporation Synchronous input/output command
US10063376B2 (en) 2015-10-01 2018-08-28 International Business Machines Corporation Access control and security for synchronous input/output links
JP6083480B1 (ja) * 2016-02-18 2017-02-22 日本電気株式会社 監視装置、フォールトトレラントシステムおよび方法
JP2017188072A (ja) * 2016-04-05 2017-10-12 ルネサスエレクトロニクス株式会社 半導体装置及びアクセス管理方法
US10474532B1 (en) * 2017-07-28 2019-11-12 EMC IP Holding Company LLC Automatic fault tolerance in a computing system providing concurrent access to shared computing resource objects
CN111581003B (zh) * 2020-04-29 2021-12-28 浙江大学 一种全硬件双核锁步处理器容错系统
JP2025016294A (ja) * 2023-07-21 2025-01-31 日立Astemo株式会社 車両制御装置、制御方法
CN119105267B (zh) * 2024-09-04 2025-06-10 北京康吉森技术有限公司 一种基于状态管理的三重冗余控制系统

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US6138198A (en) * 1998-06-15 2000-10-24 Sun Microsystems, Inc. Processor bridge with dissimilar data registers which is operable to disregard data differences for dissimilar data write accesses
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US5615403A (en) * 1993-12-01 1997-03-25 Marathon Technologies Corporation Method for executing I/O request by I/O processor after receiving trapped memory address directed to I/O device from all processors concurrently executing same program
US6138198A (en) * 1998-06-15 2000-10-24 Sun Microsystems, Inc. Processor bridge with dissimilar data registers which is operable to disregard data differences for dissimilar data write accesses
EP1477899A2 (fr) * 2003-04-21 2004-11-17 Nec Corporation Appareil et méthode de traitement de données

Cited By (1)

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Publication number Priority date Publication date Assignee Title
US11556394B2 (en) 2021-05-14 2023-01-17 Nxp B.V. System and method for controlling access to shared resource in system-on-chips

Also Published As

Publication number Publication date
US7519856B2 (en) 2009-04-14
CA2531092A1 (fr) 2006-06-21
US20060150004A1 (en) 2006-07-06
EP1675003A2 (fr) 2006-06-28
AU2005246986A1 (en) 2006-07-06
CN1804811A (zh) 2006-07-19
JP2006178616A (ja) 2006-07-06

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