EP2084698A1 - Procede de commande d'un dispositif de visualisation matriciel a source d'electrons a consommation capacitive reduite - Google Patents
Procede de commande d'un dispositif de visualisation matriciel a source d'electrons a consommation capacitive reduiteInfo
- Publication number
- EP2084698A1 EP2084698A1 EP07821920A EP07821920A EP2084698A1 EP 2084698 A1 EP2084698 A1 EP 2084698A1 EP 07821920 A EP07821920 A EP 07821920A EP 07821920 A EP07821920 A EP 07821920A EP 2084698 A1 EP2084698 A1 EP 2084698A1
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- European Patent Office
- Prior art keywords
- potential
- line selection
- line
- gray
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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- 238000000034 method Methods 0.000 title claims abstract description 35
- 239000011159 matrix material Substances 0.000 title claims description 11
- 238000012545 processing Methods 0.000 claims description 32
- 125000004122 cyclic group Chemical group 0.000 claims description 9
- 241000238876 Acari Species 0.000 claims description 3
- 230000001419 dependent effect Effects 0.000 claims 1
- 230000004044 response Effects 0.000 description 9
- 239000000463 material Substances 0.000 description 7
- 235000014101 wine Nutrition 0.000 description 6
- 230000007704 transition Effects 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- 238000012800 visualization Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000012937 correction Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 230000008447 perception Effects 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000002041 carbon nanotube Substances 0.000 description 1
- 229910021393 carbon nanotube Inorganic materials 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 239000002772 conduction electron Substances 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000010200 validation analysis Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2077—Display of intermediate tones by a combination of two or more gradation control methods
- G09G3/2081—Display of intermediate tones by a combination of two or more gradation control methods with combination of amplitude modulation and time modulation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
- G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
Definitions
- the present invention relates to a method of controlling a matrix display device having one or more electron sources, capable of displaying images having different gray levels.
- the images to display can be in black and white or in colors, in the latter case, the expression "gray level" means half-tone of color. Black and white are included in the grayscale ranges.
- FIG. 1 schematically illustrates the operating principle of an example of a field emission electron source display device to which the method of the invention can be applied.
- the display device comprises electron sources 100 comprising anode electrodes 1 covered with phosphor material 2, cathode electrodes 3 electrically connected to electron emitted regions 4, gate electrodes 5, electrically isolated from the electrodes 2. Each emitter zone 4 is associated with a gate electrode 5. The vacuum 6 reigns between the emitted regions 4 and the phosphor material 2.
- the device relating to the control of the electron sources 100 comprises a voltage source 7 and the biasing means 8.
- the voltage source 7 makes it possible to apply a high potential Va to the anode electrodes 1.
- the biasing means 8 make it possible to apply, for a given electron source 100, a potential Vg on the gate electrode associated therewith and a potential VcI, Vc2, Vc3 on the cathode electrode 3 to which it is connected.
- the potential difference Vgc1, Vgc2, Vgc3, hereinafter generally referred to as Vgc represents the control voltage of the electron emission.
- An electron source 100 emits a stream of electrons (not shown) from its emitted zone 4 and this electron flux is collected by an anode electrode 1 which is opposite the emitted zone when the difference in Vgc potential exceeds a threshold value Vthl. This electron flow is accelerated thanks to the high potential Va applied to the anode electrodes 1.
- the phosphor material 2 emits light under the effect of the kinetic energy of the electrons that bombard it.
- the display device may have a matrix screen 17 arrayed as illustrated in Figure 3 with several electron sources 4.
- Each electron source 4 represents a pixel Pi, j of the screen.
- Each pixel Pi, j can be addressed and its luminance adjusted as described in the referenced document [4] whose complete references are at the end of the description.
- Each pixel Pi, j is defined as the crossing between a line electrode Ll, Li,. Ln and a column electrode C1, C1, Cm of the display device 17. There are generally several row electrodes and a plurality of column electrodes. Line electrodes Ll, Li,. Ln are generally connected to the gate electrodes and the column electrodes C1, C], ... Cm to the cathode electrodes. It will be noted, however, that the display device 17 can be reduced to an electron source or a pixel if only a row electrode and a column electrode are available to operate according to the method of the invention. .
- a controller is provided for controlling the display device with a line scan generator 10 connected to a source voltage supply 11 delivering a potential Vis and a reference potential Wines imposed, generally the mass, allowing it to be applied to the line electrodes either the line selection potential Vis or the reference potential Wines or non-selection potential of line.
- the control device furthermore comprises a column control circuit 12 connected to a voltage source 13 delivering a potential Vcj and to a reference potential Vcom which may be ground.
- the line scan generator 10 and the column control circuit 12 are connected to a screen controller 14 which receives signals from an image data source (not shown), control and timing signals, and which delivers signals able to drive the line scan generator 10 and the control circuit of the columns 12.
- the anode electrodes 1 they are connected to a voltage source 15 delivering a potential Va.
- the line scan generator includes an addressing circuit for each line electrode.
- the column control circuit includes a subcircuit for each column electrode.
- the conventional control of the screen is carried out as follows: the row electrodes L1, Ln can be addressed sequentially each in turn during a line selection period T1. An addressed line electrode is brought to the potential Vis and a unaddressed line electrode is brought to potential Wines.
- the pixels of an addressed line electrode Li must each display a given information and each column electrode Cj is brought to a suitable potential Vc].
- the potentials applied to the column electrodes do not affect the pixels of the unaddressed line electrodes L1, Li-I, Li + 1, Ln. It is also possible to float the potential of a line electrode that is not selected. Once the column electrode is no longer selected, it is discharged and put in high impedance.
- the pulse width modulation control (PWM) is used to switch the reference potential of a Vcom column electrode to a fixed potential Vc for a variable time depending on the level. of gray to display, this variable time being less than or equal to the line selection period Tl.
- FIG. 2B may be referred to in FIG. 2A, in which several chronograms show the voltage to be applied to a selected line electrode and simultaneously to a column electrode whose corresponding electron source must display a dark gray or light grey. To display a light gray the potential Vc is applied for a shorter time than the one used to display a dark gray.
- This method encounters the problem of the capacitive consumption generated by both the potentials to be switched and by the frequency of these switches as already mentioned.
- the amplitude modulation control is performed by applying a potential whose value depends on the gray level to be displayed during the entire line selection period Tl, on the column electrodes.
- the referenced document [5] describes such a control method, its references are at the end of the description.
- the charge control method described for example in the referenced document [6] whose complete references are found at the end of the description, seeks to provide the column electrodes with a quantity of charges corresponding to the gray level to be displayed.
- the patent [7] describes the control of the line electrodes in which, after a first line selection period T1, during a second line selection period, the electrode is applied to the electrode. line that was selected during the first line selection period, a discharge potential during at least part of the second line selection period and then leave it in a high impedance state until it is selected again .
- the non-line selection potential is therefore floating and depends on the proportion of electron sources emitted on the line electrode that is selected.
- the invention more precisely relates to a method of controlling an electron source matrix display device which uses a pulse width modulation control for the control of the column electrodes with three different potentials, of which an intermediate located between a first and a second potential, this first potential and this second potential conventionally making it possible to block the transmission and to emit respectively, this intermediate potential being associated with the first or the second potential to display gray levels according to that they are considered to belong to a first grayscale family corresponding to the darkest grayscale or to a second grayscale family corresponding to the darkest grayscale.
- the present invention provides a method of controlling a matrix display device capable of displaying gray levels at one or more electron sources, comprising one or more line electrodes and one or more electrodes of column, the electron source being defined at the intersection of a row electrode and a column electrode.
- a line selection potential on a selected line electrode is applied during a line selection period; a voltage depending on the gray level to be displayed by the electron source at the cross-section of the column is simultaneously applied during said period on a column electrode.
- This selected line electrode and this column electrode are split into two grayscale families, the first grouping one or more of the darkest grayscale, the second grouping one or more shades of gray least.
- the voltage of the column electrode is raised, from the beginning of the line selection period, of an intermediate potential, located between a second potential used to display the black and a first potential used to display the blank, the second potential and then it is returned to the intermediate potential after a period less than or equal to the line selection period and depends on the gray level to display.
- the voltage of the column electrode of the intermediate potential is raised to the first potential at a time of the line selection period which depends on the gray level to be displayed and it is returns to the intermediate potential at the end of the line selection period.
- the selected line electrode can be ported to a discharge potential and then put in high impedance.
- This control method is then associated with the principle of floating non-selected line electrodes. It is possible that, in addition, for one of the gray levels of one of the families, the voltage of the column electrode at the intermediate potential during the entire selection period of the year. In this case, there is an additional layer of gray.
- the line selection voltage can be constant during the line selection period.
- the first potential can be in a simple manner substantially 0 volts.
- the intermediate potential may be substantially in the middle between the first potential and the second potential.
- the second potential is positive with respect to the first potential.
- the duration of application of the first potential in the line selection period and the duration of application of the second potential in the line selection period are advantageously distributed in a non-linear manner to optimize the perception of the display by the eye human.
- the present invention also relates to a device for controlling a display device dot matrix displaying gray levels comprising one or more electron sources each located at the intersection of a line electrode and a column electrode of an assembly comprising one or more line electrodes and one or more column electrodes .
- the device includes a line scanning generator for applying, when the line electrode on which the electron source is selected, a line selection potential, during a line selection period, and a control circuit.
- the column control circuit comprises, for each column electrode of the assembly, a first processing chain for delivering a pulse width modulated control voltage, the pulse beginning at the beginning of the line selection period, between an intermediate potential and a second potential used to display the black, to be applied to the column electrode if the gray level belongs to a first gray level family containing one or more dark gray levels and a second gray scale processing for providing a pulse width modulated control voltage, the pulse ending at the end of the line selection period, between the intermediate potential and a first potential, to be applied to the column electrode if the gray level belongs to a second family of Grayscale containing one or more shades of gray least dark.
- the line scanning generator at the end of the line selection period, can advantageously carry the line electrode which was selected, but which is no longer, at a discharge potential and then put it in high impedance. .
- the first processing chain delivers, from information coding the gray level to display it receives, a signal that reflects an end time of the pulse of the modulated voltage pulse width in the period of line selection.
- the second processing chain delivers a signal which translates a start time of the pulse of the modulated voltage into a pulse width in the line selection period, these processing chains being connected via selection means to a stage of selection. output capable of delivering the voltage to be applied to the column electrode.
- the first processing chain may comprise a comparator comparing the information coding the gray level and the result of a count made by a cyclic counter counting a number of clock ticks determined by the size of the information coding the level of gray, during the line selection period, and a flip-flop connected to the output of the comparator and also receiving a peak at the beginning of each line selection period and delivering the signal reflecting the end time of the voltage pulse modulated in pulse width.
- the second processing chain may comprise a comparator comparing information coding the gray level and the result of a count made by a cyclic counter counting a number of clock ticks determined by the size of the information coding the level of gray, during the line selection period and a flip-flop connected at the output of the comparator and also receiving a peak at the end of each line selection period and delivering the signal reflecting the start time of the pulse of the modulated voltage in pulse width.
- the cyclic counter may be common to the first and second processing lines. Since the gray level to be displayed is coded in the form of a binary word with one or more most significant bits, the selection means may be combative circuits receiving one or more most significant bits of the binary word.
- the column control circuit may further include a shift register which supplies as many sets of storage latches as column electrodes, each set of storage latches receiving as inputs the gray levels to be displayed by the latch. viewing device and being connected to a first processing line and a second processing line.
- FIG. 2C illustrates the voltages to be applied on a selected line electrode, on a column electrode to display a dark gray (family Fl) and on a column electrode to display a light gray (family F2) according to the method of 1 'invention
- FIG. 3 (already described) illustrates a display device equipped with its conventional control device
- FIG. 4 illustrates electron sources having a layer of resistive material which covers their cathode electrodes
- FIG. 5 illustrates the different signals to be applied to the row electrodes in a command with floating potential of an unselected line electrode
- Figure 6 illustrates the current response of the electron sources of Figure 1
- FIG. 7A shows the signal to be applied to a line electrode in the method of the invention
- FIG. 7B shows the signals to be applied on a line electrode to display the gray coded cells 00 to 06 of the first family F1
- FIG. 7C shows the signals to be applied on a line electrode to display the gray coded 07 which is assumed of the first family
- Figure 7D shows the signals to be applied on a line electrode to display the gray coded 08 to 15 of the second family F2 by the method of the invention
- FIG. 8A illustrates the control device of a display device according to the invention
- FIG. 8B illustrates an exemplary device for controlling the column electrodes of the display device of the invention
- FIG. 8C illustrates, in a partial manner.
- 2 n + 1 (n integer greater than or equal to one) gray levels can be displayed, these gray levels being coded between 0 and 2 n .
- Code 0 corresponds to black and code 2 n to white.
- 2 n gray levels codes between 0 and 2 n - 1 by not using either the level corresponding to black, or that corresponding to white.
- the first family Fl has p gray levels (p integer strictly less than 2 n + 1), these p gray levels being coded between 0 (the black) and p-1.
- the level p- 1 corresponds to the lightest gray level of the first family Fl of the darkest grays.
- the second gray level family F2 has 2 n -p grayscale levels between the p level and the level 2 n
- the level p corresponds to the darkest gray level of the second family F2 of the lightest gray.
- the graph of FIG. 2C shows the voltages to be applied to a selected line electrode and a column electrode so that the electron source crosses this electrode. line and of this column electrode respectively displays a dark gray of the first family Fl and a light gray of the second family F2 in the case of the control method according to the invention.
- the voltage to be applied to a selected line electrode is the same as that shown in Fig. 2B.
- the line electrode which is now no longer selected is taken to a discharge potential Vd during at least a portion of the second line selection period, and then put in high impedance outside the first line selection period and the part of the second line selection period as described in FIG. the patent [7].
- FIG. 5 illustrates this operation for several Li to Li + 2 line electrodes.
- the discharge potential Vd is less than or equal to Vk2, which is the white display potential.
- Vk2 which is the white display potential.
- the potential of non-selection of wine line has been represented in dotted lines to make it understood that it is floating.
- the control of the potentials of the line electrodes can be done conventionally with the imposed potentials Vis et Vins.
- pulse width modulation with three potentials instead of two conventionally will be used.
- a first potential Vcom or reference potential which makes it possible to display the white
- a second potential Vk2 which makes it possible to display black
- an intermediate potential VkI The second potential Vk2 is positive with respect to the potential Vcom.
- the potential Vcom is preferably the mass.
- the second potential Vk2 blocks the emission of electrons at the electron source.
- the potential of the relevant column electrode of the intermediate potential VkI is changed to the second potential Vk2 at the beginning of the period.
- line selection T1 this second potential is maintained for a variable duration t1 which depends on the gray level to be displayed and the potential is returned to the intermediate potential VkI before the end of the line selection period T1 or at the end of the period.
- the transition to the second potential Vk2 for the gray of the first family Fl is done immediately at the beginning of the line selection period Tl, and the transition to the intermediate potential VkI occurring in a second time at the end of the duration tl.
- the transition of the intermediate potential VkI from the first potential Vcom for the light gray is at the end of the line selection period Tl, and the transition of the intermediate potential VkI to the first potential Vcom occurring before the end of the line selection period Tl or at the end of the line selection period T1.
- the start tilt fronts for the gray levels of the first family Fl and the end tilt for the gray levels of the second family F2 are thus always in phase, which allows the potential of the lines left floating, to follow these fronts and therefore to cancel the corresponding capacitive consumption.
- Only one of the two families Fl or F2 of gray comprises a level of gray obtained while maintaining the intermediate potential VkI throughout the line selection time T1 as illustrated in FIG. 7C.
- pulse width modulation makes it possible to switch substantially only half of the voltage excursion during a line selection period T1. capacitive by a factor of four, indeed this capacitive consumption varies as the square of the voltage.
- the use of pulse width modulation control also responds to the need to standardize the response of the electron sources. Indeed, in the display devices there is a problem that the electron sources are not uniform in terms of emission, some are very powerful and emit more than others for the same control voltage. This is reflected at the level of the phosphor material on the anode electrode side by an inhomogeneous image and constellation of bright spots.
- an effective means for homogenizing the emission is to penalize the most efficient electron sources for reduce their emission to a lower level. This is usually done by placing a resistor R1 in series between each emitter region 4 and the cathode electrode 3 connected thereto. A potential difference proportional to the current flowing through the electron source is then subtracted from the potential difference Vgc, which restricts the emission current.
- This resistance can be materialized by a layer of resistive material which covers the cathode electrodes.
- Figure 4 illustrates such a configuration.
- the gate electrodes 5 are electrically insulated from the cathode electrodes 3 by a layer of dielectric material 9. In FIG.
- the cathode electrode 3 rests on an electrically insulating substrate 110.
- This resistance R1 is all the more effective if the difference of cathode gate potential (or column electrode-line electrode) increases as mentioned in the article [9] whose references are at the end of the description.
- the method of the invention using either about half (for the Fl family of the darkest grays), or the same grid-cathode potential difference (for the F2 family of the darkest grays), modulation in conventional pulse width, allows to benefit from the advantages of the resistive layer which covers the cathode electrodes 3.
- the current response of the electron sources and thus the luminance response of the display device is close to an exponential law as shown in FIG. 6, whereas the response of the human eye to a light stimulus is not proportional to the its intensity but follows a logarithmic curve.
- the eye is more sensitive to luminance differences at low level of illumination than at high level. His perception of luminance follows a nonlinear law known as gamma correction which has been modeled in particular by the International Commission on Illumination.
- the response curve of the human eye is therefore a nonlinear law close enough to the inverse of the response curve of the electron source.
- FIG. 7A shows the voltage applied to a line electrode that is selected during a line selection period T1.
- This line electrode prior to the beginning of the line selection period T1, was in high impedance. it switches to the line selection potential Vis from the beginning of the line selection period T1. At the end of the line selection period T1, it switches to the line selection potential Vis before returning to high impedance.
- the first Fl family has grayscale values ranging from 00 (for black) to 07 for medium gray.
- the second family F2 has the levels coded 08 to 15 (for the white).
- FIG. 7B the appearance of the potentials to be applied to the column electrodes is shown to display a gray level of the first fl family of gray levels with the exception of the average gray code 07 which is shown in FIG. 7C. . It is assumed that the gray coded 07 belongs to the first family of gray levels, but this gray coded 07 could very well have belonged to the second family of gray levels F2.
- the beginning of the line selection period T1 is brought, the potential of the column electrode considered which is the intermediate potential VkI, to the second potential Vk2 used to display the black and this second potential Vk2 is maintained for a first time t1 which is less than or equal to the line selection period T1, then the potential of the column electrode is converted to the intermediate potential VkI and, if necessary, the intermediate potential VkI is maintained during the remaining time of the line selection period T1.
- the solid line shows the pace of the voltage used to display the gray coded 06.
- the dotted lines show the pace of the voltages used to display the gray coded 05 to 00.
- Vcom for a second duration t2 which ends at the end of the line selection period Tl.
- the transition to the first potential Vcom is made from the beginning of the line selection period Tl if the blank is to be displayed.
- the solid line shows the pace of the voltage used to display the coded gray 14.
- the dotted lines show the pace of the voltages used to display the gray coded 15 to 08 and in particular the switching times of the intermediate potential VkI to the potential of reference Vcom.
- the method of the invention makes it possible to display 2 n + 1 gray levels (that is to say 17 gray levels) if the first family Fl of gray integrates a gray level for which the potential of the gray scale is tipped.
- Vk2 40 V.
- the duration tl x of application of the second potential Vk2 is expressed by:
- the present invention also relates to a control device of a matrix display panel with electron sources.
- FIG. 8A schematically shows the control device of a display device
- Electron source matrix for displaying gray levels according to the method of the invention.
- the display device 25 comprises several electron sources Pi, j located at the intersection, on the one hand, of a line electrode and, on the other hand, of a column electrode, this line electrode and this column electrode being part of a set of one or more rows and one or more columns.
- the electron source Pi, j materializes a pixel.
- the controller of the display device typically comprises a scan generator of one or more lines 22 and a control circuit of one or more columns 23.
- the control circuit of the columns 23 is connected to a digital data source 20 capable of providing binary words coding on s bits the gray level to be displayed by a pixel.
- the control device of the display device also comprises a screen controller 21.
- the screen controller 21 receives synchronization signals from the data source 20, it manages and provides signals adapted to drive the line scan generator 22 and the control circuit of the columns 23.
- the scan generator lines 22 is not described in more detail, it does not pose a problem to the skilled person who can refer for example to that described in the patent application [7] if a floating potential is used.
- the column control circuit includes a shift register 40 as an address decoder.
- This shift register 40 has m outputs and propagates m times the selection bit CSI by the clock signal SCK.
- the m outputs of the shift register 40 drive as many latches 41 of storage latches (latches in English) as of column electrodes C1 to cm, each of them cooperating with one of the column electrodes c1 to cm of the device.
- These sets 41 of storage latches also receive binary words Data encoding the information to be displayed delivered by the digital data source 20 that they store with the clock signal SCK when the shift register 40 validates said set 41 of flip-flops. memorisation.
- the output of each m sets 41 of storage latches supplies a first processing line 30 for supplying a voltage control signal to be applied to the associated column electrode when the voltage must switch at the beginning of the period.
- a second processing chain 31 intended to deliver a signal voltage control to be applied to the associated column electrode when the voltage must switch at the end of the line selection period from the first potential Vcom to the intermediate potential VkI, which corresponds to a gray level to be displayed belonging to the second family F2 of gray levels.
- the outputs of these first and second processing chains 30, 31 are connected to a column electrode C1 to cm which is the associated column electrode, via selection means 48 of the first processing line 30 or the second channel treatment 31.
- the first m processing chains 30 each comprise a comparator 44 receiving on the one hand the outputs of the latches 41 of storage latches and the result of a counting performed by a cyclic counter 42, clocked by a clock CCP and reset by a charging signal LC warning the beginning of each new line selection period T1.
- Counter 42 performs, during the line selection period T1, a count corresponding to the number of gray levels of the family Fl of the darkest grays.
- the comparators 44 At the output of the comparators 44 are m latches 46 flipping with the loading signal LC, providing information on the beginning of a line selection period, and the output of the comparator 44 associated.
- the comparator 44 changes state when the binary value of the counter 42 reaches the binary value present on the outputs of the set 41 of corresponding memory latches.
- the counter unit 42 and comparator 44 associated with the flip-flop 46 makes it possible to adjust the duration t1.
- the m second processing chains 31 each comprise a comparator 45 receiving on the one hand the outputs of the latches 41 of storage latches and the result of a count performed by a cyclic counter 43, clocked by a clock CCN and reset by a charging signal LC warning of the end of each line selection period T1.
- Counter 43 performs, during the line selection period T1, a count corresponding to the number of gray levels of the family F2 of the least gray levels. dark.
- the comparators 45 of the second processing chains 31 are m latches 47 flipping with the loading signal LC, giving information on the end of a line selection period, and the output of the comparator 45 associates.
- the comparator 45 changes state when the binary value of the counter 43 reaches the binary value present at the output of the set 41 of corresponding storage latches.
- the counter unit 43 and comparator 45 associated with the flip-flop 47 makes it possible to adjust the moment of switching of the intermediate potential VkI to the first potential Vcom.
- the LC load signal indicates both the beginning of the line selection period and the end of the line selection period, the latter corresponding to the beginning of the next line selection period.
- the output stage 53 comprises three switches Q1, Q2, Q3 mounted in a star between a common point which corresponds to the associated column electrode C1 and respectively the intermediate potential VkI, the second potential Vk2 and the first potential Vcom. These switches Q1, Q2, Q3 may be transistors and only one of them may be passing at a time. The switches Q1 and Q2 are mounted in push-pull between respectively the second potential Vk2 and the reference potential Vcom.
- the m output stages 53 can selectively switch one of the three potentials VkI, Vk2, Vcom through the control of each of the three switches Q1, Q2, Q3.
- the switch Q1 makes it possible to switch the second potential VkI on the associated column electrode while the switch Q2 makes it possible to impose the reference potential Vcom.
- the output stage 53 is connected, at the input, to the outputs of the selection means 48.
- the selection means 48 may be formed by combative circuits which, as a function of one or more most significant bits b, are binary words coding the signal. information to display, to validate either the output of the first processing chain 30 at the output stage 53, that is to say to block the switch Q3 and to turn the switch Q2 and the switch Ql at the appropriate times at the gray level to be displayed, or to validate the output of the second processing chain 31, that is to say to block the switch Q2 and to turn on the switch Q3 and the switch Q1 at the appropriate times for the gray level to be displayed.
- the selection means 48 receive these bits of high weight b.
- the comparator 44, 45 therefore changes state at a given instant which corresponds to the moment when the result of the counting of the cyclic counter 42, 43 coincides with the data present on the first inputs of the comparator 44, 45.
- These flip-flops 46, 47 also receive as input the LC load signal which translates the beginning or the end of the line selection period. These flip-flops 46, 47 switch as soon as the signals arriving at their two inputs have changed.
- the output of the flip-flop 46 is connected to the transistors Q1, Q2 of the output stage 53 at their control gate, via the selection means 48.
- the output stage 53 is able to switch according to the signal it receives bistable flip-flops 46, 47, either the second potential Vk2 (transistor Q2 passing and transistor Q3 blocked), or the first potential Vcom (transistor Q3 passing and transistor Q2 blocked), or neither of these two potentials according to the validation delivered by the selection means 48. In this latter possibility, it is the third transistor Ql of the output stage which is on and the two transistors Q2 and Q3 are blocked.
- FIG. 8C schematically gives such a configuration for the first and the second processing chain associated with the column electrode C1.
- the common counter is referenced 60 and the clock CK.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Analysing Materials By The Use Of Radiation (AREA)
- Control Of El Displays (AREA)
Description
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0654624A FR2907959B1 (fr) | 2006-10-30 | 2006-10-30 | Procede de commande d'un dispositif de visualisation matriciel a source d'electrons a consommation capacitive reduite |
| PCT/EP2007/061560 WO2008052945A1 (fr) | 2006-10-30 | 2007-10-26 | Procede de commande d'un dispositif de visualisation matriciel a source d'electrons a consommation capacitive reduite |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP2084698A1 true EP2084698A1 (fr) | 2009-08-05 |
| EP2084698B1 EP2084698B1 (fr) | 2010-06-30 |
Family
ID=38050087
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP07821920A Not-in-force EP2084698B1 (fr) | 2006-10-30 | 2007-10-26 | Procede de commande d'un dispositif de visualisation matriciel a source d'electrons a consommation capacitive reduite |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8477156B2 (fr) |
| EP (1) | EP2084698B1 (fr) |
| JP (1) | JP5377316B2 (fr) |
| AT (1) | ATE472792T1 (fr) |
| DE (1) | DE602007007509D1 (fr) |
| FR (1) | FR2907959B1 (fr) |
| WO (1) | WO2008052945A1 (fr) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2899991B1 (fr) * | 2006-04-14 | 2009-03-20 | Commissariat Energie Atomique | Procede de commande d'un dispositif de visualisation matriciel a source d'electrons |
| US8786592B2 (en) | 2011-10-13 | 2014-07-22 | Qualcomm Mems Technologies, Inc. | Methods and systems for energy recovery in a display |
| CN115985235B (zh) * | 2023-03-14 | 2023-07-21 | 合肥集创微电子科技有限公司 | Led驱动电路、驱动方法及显示装置 |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0650428B2 (ja) * | 1983-10-18 | 1994-06-29 | 関西日本電気株式会社 | Elパネル駆動装置 |
| FR2623013A1 (fr) | 1987-11-06 | 1989-05-12 | Commissariat Energie Atomique | Source d'electrons a cathodes emissives a micropointes et dispositif de visualisation par cathodoluminescence excitee par emission de champ,utilisant cette source |
| FR2698201B1 (fr) * | 1992-11-13 | 1994-12-16 | Commissariat Energie Atomique | Ecran d'affichage matriciel du type multiplexe et son procédé de commande. |
| FR2708129B1 (fr) * | 1993-07-22 | 1995-09-01 | Commissariat Energie Atomique | Procédé et dispositif de commande d'un écran fluorescent à micropointes. |
| US6300922B1 (en) * | 1998-01-05 | 2001-10-09 | Texas Instruments Incorporated | Driver system and method for a field emission device |
| JP3831156B2 (ja) * | 1999-09-09 | 2006-10-11 | 株式会社日立製作所 | 画像表示装置および画像表示装置の駆動方法 |
| JP2001109421A (ja) * | 1999-10-04 | 2001-04-20 | Matsushita Electric Ind Co Ltd | 表示パネルの階調駆動方法および駆動装置 |
| JP3967510B2 (ja) * | 1999-12-28 | 2007-08-29 | 富士フイルム株式会社 | ディジタルカメラ |
| JP2001306021A (ja) * | 2000-04-18 | 2001-11-02 | Victor Co Of Japan Ltd | マトリクス型画像表示装置 |
| JP3854100B2 (ja) * | 2000-06-22 | 2006-12-06 | オリンパス株式会社 | 撮像装置 |
| JP3915400B2 (ja) * | 2000-11-28 | 2007-05-16 | 株式会社日立製作所 | 画像表示装置及び画像表示装置の駆動方法 |
| JP2002311885A (ja) * | 2001-04-13 | 2002-10-25 | Canon Inc | 画像表示装置の駆動回路、画像表示装置、画像表示装置の駆動方法 |
| FR2832537B1 (fr) | 2001-11-16 | 2003-12-19 | Commissariat Energie Atomique | Procede et dispositif de commande en tension d'une source d'electrons a structure matricielle, avec regulation de la charge emise |
| JP4040454B2 (ja) * | 2002-12-27 | 2008-01-30 | キヤノン株式会社 | 画像表示装置 |
| JP2005136872A (ja) * | 2003-10-31 | 2005-05-26 | Toshiba Corp | 表示装置と表示方法 |
| JP2005260849A (ja) * | 2004-03-15 | 2005-09-22 | Toshiba Corp | 表示装置と表示方法 |
| KR20050112769A (ko) * | 2004-05-28 | 2005-12-01 | 삼성에스디아이 주식회사 | 신호 왜곡 저감형 전자 방출 장치 구동방법 및 그것을이용한 전자 방출 장치 |
| JP2006106148A (ja) * | 2004-09-30 | 2006-04-20 | Toshiba Corp | 表示装置及び表示方法 |
| FR2880173B1 (fr) * | 2004-12-28 | 2007-05-11 | Commissariat Energie Atomique | Procede de commande d'un ecran de visualisation matriciel |
| FR2900009B1 (fr) | 2006-04-14 | 2008-06-20 | Thales Sa | Procede et dispositif de lutte anti-interferences dans un systeme de telecommunications |
-
2006
- 2006-10-30 FR FR0654624A patent/FR2907959B1/fr not_active Expired - Fee Related
-
2007
- 2007-10-26 WO PCT/EP2007/061560 patent/WO2008052945A1/fr not_active Ceased
- 2007-10-26 JP JP2009533868A patent/JP5377316B2/ja not_active Expired - Fee Related
- 2007-10-26 US US12/444,396 patent/US8477156B2/en not_active Expired - Fee Related
- 2007-10-26 DE DE602007007509T patent/DE602007007509D1/de active Active
- 2007-10-26 AT AT07821920T patent/ATE472792T1/de not_active IP Right Cessation
- 2007-10-26 EP EP07821920A patent/EP2084698B1/fr not_active Not-in-force
Non-Patent Citations (1)
| Title |
|---|
| See references of WO2008052945A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2008052945A1 (fr) | 2008-05-08 |
| US20100013865A1 (en) | 2010-01-21 |
| FR2907959A1 (fr) | 2008-05-02 |
| EP2084698B1 (fr) | 2010-06-30 |
| FR2907959B1 (fr) | 2009-02-13 |
| JP2010508540A (ja) | 2010-03-18 |
| ATE472792T1 (de) | 2010-07-15 |
| US8477156B2 (en) | 2013-07-02 |
| DE602007007509D1 (de) | 2010-08-12 |
| JP5377316B2 (ja) | 2013-12-25 |
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