EP2244968A2 - Saubere und luftdichte versiegelung einer verpackungsvertiefung - Google Patents

Saubere und luftdichte versiegelung einer verpackungsvertiefung

Info

Publication number
EP2244968A2
EP2244968A2 EP09703642A EP09703642A EP2244968A2 EP 2244968 A2 EP2244968 A2 EP 2244968A2 EP 09703642 A EP09703642 A EP 09703642A EP 09703642 A EP09703642 A EP 09703642A EP 2244968 A2 EP2244968 A2 EP 2244968A2
Authority
EP
European Patent Office
Prior art keywords
ring
component
bonding material
cavity
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP09703642A
Other languages
English (en)
French (fr)
Inventor
Eric Cadalen
Stephane Bellenger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Priority to EP09703642A priority Critical patent/EP2244968A2/de
Publication of EP2244968A2 publication Critical patent/EP2244968A2/de
Withdrawn legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261Processes for packaging MEMS devices
    • B81C1/00269Bonding of solid lids or wafers to the substrate
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/01Packaging MEMS
    • B81C2203/0109Bonding an individual cap on the substrate
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/01Packaging MEMS
    • B81C2203/0172Seals
    • B81C2203/019Seals characterised by the material or arrangement of seals between parts

Definitions

  • This invention relates generally to the field of integrated circuit packaging and more particularly to clean and hermetic sealing of a packaged cavity.
  • An increasingly important aspect of manufacturing Integrated Circuits (ICs) is the mounting of a semiconductor die to a substrate. With increasing integration of numerous functions in a single IC the number of Input/Output (10) terminals is also increased. In an effort to substantially increase the number of IO terminals, flip-chip bonding has been developed for providing a high density of interconnections between the semiconductor die and the substrate.
  • solder bump is disposed onto each IO terminal of the semiconductor die.
  • the semiconductor die is then flipped for mating the solder bumps with corresponding bonding pads located on the substrate.
  • the semiconductor die and the substrate are then heated to reflow the solder bumps. Once reflowed each solder bump forms a bond between the semiconductor die IO terminal and the substrate pad, which functions both as an electrical and physical connection.
  • a sealed cavity is used to protect interconnections dedicated to shorten a distance between functionality of one component and redistribution of I/O terminals to other functionalities on a second component.
  • a cavity is used to protect critical sensitive materials, structures or devices that specific applications require like MEMS, BAW or SAW. Sealing provides cavity protection in following assembly steps as well as for the final product.
  • a method for sealing a package cavity A first ring of first bonding material is deposited onto the surface of a first component.
  • the first ring has a predetermined shape outlining a circumference of the cavity and a predetermined thickness.
  • a second ring of second bonding material is deposited onto the surface of a second component.
  • the second ring has a predetermined shape corresponding to the shape of the first ring and a predetermined thickness.
  • the second ring further comprises a predetermined raised pattern such that an exchange of gaseous material between an atmosphere inside the cavity and an atmosphere outside the cavity is enabled prior to reflow of the second bonding material.
  • a gaseous desoxydizing material is provided after temporary bonding of the first and the second bonding material.
  • a storage medium having stored therein executable commands for execution on a processor.
  • the processor when executing the commands performs a method for sealing a package cavity.
  • a first ring of first bonding material is deposited onto the surface of a first component.
  • the first ring has a predetermined shape outlining a circumference of the cavity and a predetermined thickness.
  • a second ring of second bonding material is deposited onto the surface of a second component.
  • the second ring has a predetermined shape corresponding to the shape of the first ring and a predetermined thickness.
  • the second ring further comprises a predetermined raised pattern such that an exchange of gaseous material between an atmosphere inside the cavity and an atmosphere outside the cavity is enabled prior to reflow of the second bonding material.
  • a gaseous desoxydizing material is provided during temporary bonding of the first and the second bonding material. The gaseous desoxydizing material is then substantially removed inside and outside the cavity prior to reflowing of the second bonding material for bonding with the first bonding material.
  • Figs. 1 is a simplified flow diagram of a method for sealing a package cavity according to the invention
  • Figs. 2a and 2b are simplified block diagrams illustrating a package cavity produced using the method illustrated in Fig. 1 ;
  • Figs. 3a to 3c are simplified block diagrams illustrating raised patterns according to the invention in a perspective view
  • Figs. 4a to 4c are a simplified block diagrams illustrating raised patterns according to the invention as projection onto the component surface
  • Fig. 5 is a simplified diagram illustrating a temperature profile with preheating and reflowing steps.
  • Fig. 1 a simplified flow diagram of a method for sealing a package cavity according to the invention is shown. Reference is made to the simplified block diagram illustrating a cross-sectional view of the package cavity 100, shown in Figs. 2a and 2b.
  • a first 102 and a second component 104 are provided for being bonded such that a surface 106 of the first component 102 is bonded to a corresponding surface 108 of the second component and the cavity 100 is enclosed therebetween.
  • the first component 102 and the second component 104 are, for example, a semiconductor die for being bonded to a substrate, two semiconductor dies for being bonded together, or a cap for being bonded to a semiconductor die for protecting an active surface area thereof.
  • a first ring 110 of a first bonding material is deposited onto the surface 106 of the first component.
  • the first ring 110 comprises, for example, aluminum used in standard integrated circuit industry processes and a deposited tin solder - reflowable - from an electrolytic process with Cu between Al and Sn acting as a under bump metallurgy layer, plus pre reflow of Sn deposited on 110 and 114 according to a temperature profile as shown in Fig. 5.
  • a second ring 116 and bumps on 120 of a second bonding material is deposited onto the surface 108 of the second component 104.
  • the second ring comprises, for example, a multilayer ENIG material.
  • solder deposited in one of the steps 12 and 16 is pre-reflowed.
  • the first ring 110 and the second ring 116, as well as the solder bumps disposed on the contact pads 114 and 120, are then temporary bonded using a thermocompression process - at 20.
  • a gaseous deoxidizing material is provided in an atmosphere surrounding the components.
  • a fluxless soldering process is applied using as deoxydizing material, for example, an acid vapor such as a formic acid vapor.
  • the atmosphere is evacuated using, for example, a vacuum pump.
  • a substantially inert gas such as, for example, nitrogen, or an inert gas such as, for example, argon, is provided for being enclosed in the cavity 100.
  • a substantially inert gas such as, for example, nitrogen, or an inert gas such as, for example, argon, is provided for being enclosed in the cavity 100.
  • the first bonding material is bonded - at 26 - with the second bonding material by reflowing the second bonding material, simultaneously bonding the rings - 110 and 116 - and the solder bumps disposed on the contact pads.
  • the first component 102 is bonded to the second component 104 having an enclosed cavity 100 therebetween.
  • the reflowable solder ring is disposed on the first component or the second component assuming that the second component is the substrate with electrical input from the first component redistributed outside of the ring - by routing underneath of the ring.
  • Figs. 3a to 3c illustrate 3 different raised patterns of the second ring 116 in a perspective view.
  • the second ring comprises straight portions having a first height and second portions - such as a bump - disposed in the corners having a second height greater than the first height - Figs. 3a and 3b - or a raised outer ring portion having the second height in the corner area - Fig. 3c.
  • Figs. 4a to 4c illustrate corresponding projections onto the second surface 108.
  • the different heights are achieved, for example, by providing the second ring 116 having a width of 30 ⁇ m and a bump having a radius of 45 ⁇ m - Figs. 4a and 4b - or by providing the pattern shown in Fig. 4c having an internal radius 130 of 200// m, a mean radius 132 of 50 ⁇ m, and a ring width of 50 ⁇ m.
  • the straight portions have greater height than the corner portions, for example, by providing the straight ring portions with greater width than the corner portions. Using the above dimensions a height variation of approximately 15 ⁇ m is realized.
  • the raised patterns are determined, for example, experimentally for various parameter combinations such as, for example, shape and size of the ring, solder material used.
  • Temporary bonding is usually based on the sticky effect of liquid flux used.
  • Use of liquid flux adds an additional processing step and requires provision of additional material.
  • use of liquid flux leaves harmful solid residues enclosed in the cavity after reflow and cooling, as well as a risky process regarding to gas entrapped into the cavity with such characteristic effects like quality factor downgrading or frequencies application shifted.
  • the disadvantages of the flux are overcome by employing thermocompression together with the use of a gaseous desoxydizing material such as, for example, formic acid vapor.
  • the thermocompression is a combination of force, time, and temperature applied at the interface of two metals in order to facilitate a diffusion mechanism. Referring to the example shown in Figs.
  • the diffusion occurs between gold from ENIG and tin from ring and bumps of opposite metal locations.
  • the force is applied, for example, by pressing the first component 102 towards the second component 104 on a dedicated pick & place equipment.
  • the force applied, the temperature and the time are determined, for example, experimentally for different applications. Provision of acid vapor such as, for example, formic acid vapor during preheating leads to the same functionality as the use of liquid flux, but prevents deposition of solid residues and gas trapping.
  • the temporary bonding using thermocompression is implemented using, for example, a standard hermetic box oven furnace used in semiconductor manufacturing enabling controlled heating in predetermined temperature ranges and for predetermined time intervals as well as provision of various atmospheres and evacuation of the same.
  • a standard hermetic box oven furnace used in semiconductor manufacturing enabling controlled heating in predetermined temperature ranges and for predetermined time intervals as well as provision of various atmospheres and evacuation of the same.
  • the acid vapor Prior to reflow the acid vapor is substantially removed from the atmosphere outside and inside the cavity 100 in order to enable proper wetting of the opposite metal surfaces. Omission of the removal of the acid vapor results in poor wetting conditions and, for example, in open circuits between the contact pads 114 and 120. Removing vapor results also in gas-free cavity proper to product characteristics for sensitive applications.
  • vacuum is a specific condition into the cavity one may target for specific applications too.
  • the temperature is increased above the meting point - 220-230 0 C of the solder material to provide reflow conditions followed by a cooling phase.
  • the reflow is performed, for example, in vacuum conditions or in an atmosphere comprising a substantially inert gas such as, for example, nitrogen, xenon, or argon.
  • SID InterDiffusion
  • Ni/Cu/Sn results in Ni, Cu6Sn5, which is a preferred intermetallic.
  • Application of pressure during reflow prevents formation of big voids during intermetallic growing.
  • the method for sealing a package cavity according to the invention is implementable using standard equipment in semiconductor manufacturing technology.
  • the parameters of the various processing steps are, for example, controlled using a processor executing executable commands stored in a storage medium.
  • Various parameter combinations determining shape of the rings and the raised pattern, as well as control parameters for the thermocompression and reflowing are stored, for example, in the form of look up tables.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Casings For Electric Apparatus (AREA)
EP09703642A 2008-01-21 2009-01-21 Saubere und luftdichte versiegelung einer verpackungsvertiefung Withdrawn EP2244968A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP09703642A EP2244968A2 (de) 2008-01-21 2009-01-21 Saubere und luftdichte versiegelung einer verpackungsvertiefung

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP08290045 2008-01-21
PCT/IB2009/050207 WO2009093176A2 (en) 2008-01-21 2009-01-21 Clean and hermetic sealing of a package cavity
EP09703642A EP2244968A2 (de) 2008-01-21 2009-01-21 Saubere und luftdichte versiegelung einer verpackungsvertiefung

Publications (1)

Publication Number Publication Date
EP2244968A2 true EP2244968A2 (de) 2010-11-03

Family

ID=40901492

Family Applications (1)

Application Number Title Priority Date Filing Date
EP09703642A Withdrawn EP2244968A2 (de) 2008-01-21 2009-01-21 Saubere und luftdichte versiegelung einer verpackungsvertiefung

Country Status (3)

Country Link
EP (1) EP2244968A2 (de)
CN (1) CN101918304A (de)
WO (1) WO2009093176A2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105197872A (zh) * 2014-05-29 2015-12-30 上海矽睿科技有限公司 Al-Ge共晶键合预处理方法及键合方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6036872A (en) * 1998-03-31 2000-03-14 Honeywell Inc. Method for making a wafer-pair having sealed chambers
EP0951068A1 (de) * 1998-04-17 1999-10-20 Interuniversitair Micro-Elektronica Centrum Vzw Herstellungsverfahren für eine Mikrostruktur mit Innenraum
US7442570B2 (en) * 2005-03-18 2008-10-28 Invensence Inc. Method of fabrication of a AL/GE bonding in a wafer packaging environment and a product produced therefrom
WO2007119206A2 (en) * 2006-04-13 2007-10-25 Nxp B.V. A method for manufacturing an electronic assembly; an electronic assembly, a cover and a substrate

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2009093176A3 *

Also Published As

Publication number Publication date
WO2009093176A2 (en) 2009-07-30
WO2009093176A3 (en) 2010-02-25
CN101918304A (zh) 2010-12-15

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