EP2888765A2 - Procede de realisation de contacts electriques d'un dispositif semi-conducteur - Google Patents
Procede de realisation de contacts electriques d'un dispositif semi-conducteurInfo
- Publication number
- EP2888765A2 EP2888765A2 EP13756362.3A EP13756362A EP2888765A2 EP 2888765 A2 EP2888765 A2 EP 2888765A2 EP 13756362 A EP13756362 A EP 13756362A EP 2888765 A2 EP2888765 A2 EP 2888765A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- dielectric layer
- layer
- electrically conductive
- opening
- optically transparent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/138—Manufacture of transparent electrodes, e.g. transparent conductive oxides [TCO] or indium tin oxide [ITO] electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/206—Electrodes for devices having potential barriers
- H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/244—Electrodes made of transparent conductive layers, e.g. transparent conductive oxide [TCO] layers
- H10F77/247—Electrodes made of transparent conductive layers, e.g. transparent conductive oxide [TCO] layers comprising indium tin oxide [ITO]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/244—Electrodes made of transparent conductive layers, e.g. transparent conductive oxide [TCO] layers
- H10F77/251—Electrodes made of transparent conductive layers, e.g. transparent conductive oxide [TCO] layers comprising zinc oxide [ZnO]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/30—Coatings
- H10F77/306—Coatings for devices having potential barriers
- H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
- H10F77/315—Coatings for devices having potential barriers for photovoltaic cells the coatings being antireflective or having enhancing optical properties
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Definitions
- the invention relates to a method for producing electrical contacts of a semiconductor device, that is to say a method of metallization of this device.
- This method is advantageously used to make electrical contacts, or metallizations, of photovoltaic cells.
- Semiconductor devices such as photovoltaic cells have electrical contacts, or metallizations, for collecting the current and interconnecting the cells together.
- these contacts When these contacts are made in front of the cells, they can be advantageously in the form of a grid to allow light to pass through the cells. To minimize the shading of these metallizations without causing resistive losses, it is necessary to reduce the width of the metallizations while maintaining a high electrical conductivity of the metallizations. This can be achieved by performing the metallizations via:
- This parameter is equal to the ratio of the thickness over the width of the metal lines forming the metallizations.
- Such an electrolytic deposition is selective insofar as the deposition is performed only on the electrically conductive areas. In the case where the entire surface on which the electrical contacts are made is electrically conductive, an electrolytically deposited material is thus deposited on the entire surface.
- the masks used in the state of the art can be in resin, opaque, with a thickness of between a few hundred nanometers and several microns, and made by screen printing, inkjet or photolithography. These resin masks are removed after electroplating.
- this method inspired by microelectronics, remains expensive to achieve the metallizations of photovoltaic cells.
- the masks may also be made of transparent dielectric material (silicon nitride-SiN- for example), these masks may in this case also serve as an anti-reflective layer for the devices. This material can be advantageously opened with the aid of a laser and must not necessarily be removed after the electrolytic deposition. This limits the cost of producing the metallizations compared to the use of resin masks.
- OTC Conductor
- WO 2011/115206 A1 shows an application of such a method, wherein the laser aperture of the dielectric (in this case silicon oxide) is not selective with respect to the OTC.
- the laser aperture therefore crosses the dielectric layer and the OTC with a significant risk of touching materials under the OTC.
- a degradation of these materials leads to a decrease in the performance of photovoltaic cells.
- the object of the present invention is to provide a method for making electrical contacts of a semiconductor device, advantageously via an electrolytic deposition (by a "electroplating” type deposit) or an electroless deposit (“electroless”), for example , on an electrically conductive and optically transparent layer (OTC) and through a dielectric layer that can serve as an antireflection layer to the semiconductor device, without degrading the material or materials located under the OTC.
- an electrolytic deposition by a "electroplating" type deposit
- electroless electroless deposit
- the present invention proposes a method of producing at least one electrical contact of at least one semiconductor device, comprising at least the steps of:
- first dielectric layer depositing at least one first dielectric layer on the electrically conductive and optically transparent layer, and at least one second dielectric layer on the first dielectric layer, the second dielectric layer being capable of being laser-etched selectively with respect to the first dielectric layer and the electrically conductive and optically transparent layer;
- This method therefore uses, for depositing an electrically conductive material intended to produce the electrical contact or contacts of the device, a mask comprising at least two layers of dielectric material.
- the upper dielectric layer (the second dielectric layer) is selectively laser etched to define the aperture (s) corresponding to the location of the electrical contact (s).
- This selectivity of etching of the second dielectric layer vis-à-vis the first dielectric layer and the electrically conductive and optically transparent layer allows to implement a laser etching defining the location of the electrical contact or contacts without damaging the electrically layer conductive and optically transparent in that the energy of the laser radiation is absorbed by the second dielectric layer.
- the aperture (s) defined by the previous laser etching through the second dielectric layer can then be extended through the first dielectric layer to reach the electrically conductive and optically transparent layer without having to use a laser, and therefore always without degrading the electrically conductive and optically transparent layer.
- the realization of the second opening may comprise the implementation of a wet etching of the first dielectric layer through the first opening with a stop on the electrically conductive and optically transparent layer.
- the semiconductor device may be a photovoltaic cell, said face of the semiconductor device being able to correspond to a front face of the photovoltaic cell intended to receive light radiation.
- the deposition of the electrically conductive material may include the implementation of an electrolytic deposit.
- the electrically conductive and optically transparent layer may be based on ITO and / or ZnO.
- An absorption coefficient of the material of the second dielectric layer with respect to laser radiation to be used for the selective etching of the second dielectric layer may be greater than about 10 times that of the material of the first dielectric layer .
- the wavelength of the laser used for the selective etching of the second dielectric layer may be between about 300 nm and 600 nm.
- the first dielectric layer and the second dielectric layer may be based on silicon nitride and / or silicon oxide, the material of the first dielectric layer may comprise a lower silicon concentration than the material of the second dielectric layer.
- portions of the electrically conductive material may be deposited on the second dielectric layer, around the first opening.
- the method may further comprise, after the deposition of the electrically conductive material on the electrically conductive and optically transparent layer, a step of etching portions of the second dielectric layer not covered by the portions of electrically conductive material.
- the method may further comprise, between the step of producing the second opening and the step of depositing the electrically conductive material on the electrically conductive and optically transparent layer, a step of etching the second dielectric layer.
- a step of etching the second dielectric layer may be deposited on portions of the first dielectric layer around the second openings.
- FIGS. 7 and 8 show part of the steps of a method for producing electrical contacts of a semiconductor device, object of the present invention, according to a second embodiment.
- FIGS. 1 to 6 show the steps of a method of making electrical contacts of a semiconductor device 100 according to a first embodiment.
- the semiconductor device 100 is here a photovoltaic cell which, in Figures 1 to 6, is shown schematically for reasons of simplification of representation, as a single layer of material.
- This photovoltaic cell 100 can be of any type (homojunction, heterojunction, multijunction, amorphous silicon compound, monocrystalline, polycrystalline, etc.).
- the photovoltaic cell 100 comprises a front face 102 intended to receive light rays from which a photovoltaic conversion will be performed by the cell 100. At least a portion of the electrical contacts intended to carry out the collection of the current obtained via this photovoltaic conversion of the light received are intended to be made at this front face 102.
- the first step is the deposition of an electrically conductive and optically transparent layer 104 on the front face 102 of the photovoltaic cell 100.
- This layer 104 is electrically conductive because it is intended to form an electrical contact material for the metallizations, or electrical contacts, intended to be made on the front face of the cell 100.
- the layer 104 is optically transparent because the light intended to be converted into electricity by the cell 100 must be able to cross this layer 104 and reach the semiconductor junction or semiconductors of the cell 100.
- This layer 104 is here produced as it presents:
- the layer 104 is based on at least one transparent conductive oxide (OTC) such as ⁇ (indium-tin oxide) and / or ZnO, and has a thickness (dimension along the axis Z shown in Figure 1) between about 10 nm and 100 nm.
- OTC transparent conductive oxide
- the layer 104 is based on ITO and has a thickness of between about 80 nm and 90 nm.
- the layer 104 is preferably deposited on the front face 102 via a deposition process involving a deposition temperature of less than or equal to about 200 ° C. so as not to degrade the material or materials present during the deposition of this layer.
- layer 104 for example by sputtering, that is to say the material of the cell 100.
- a first dielectric layer 106 and a second dielectric layer 108 are then deposited on the layer 104.
- the first dielectric layer 106 is intended to serve as an antireflection layer for the cell 100.
- the two dielectric layers 106 and 108 will be used in cooperating with each other to form a deposition mask used for the deposition of the electrical contacts on the front face of the cell 100.
- the first dielectric layer 106 is made here as it is: an absorption coefficient k 2 of less than or equal to approximately 0.1 for wavelengths of between approximately 300 nm and 1200 nm,
- n 2 a refractive index n 2 of between approximately 1.7 and 2.5 at a wavelength of approximately 633 nm
- the first dielectric layer 106 is here based on silicon nitride or silicon oxide with a low silicon concentration, for example of which silicon represents less than about 30% of its composition.
- the first dielectric layer 106 also has a thickness of between about 10 nm and 100 nm, and for example equal to about 100 nm in this first embodiment.
- the second dielectric layer 108 is made such that it has an absorption coefficient at a laser radiation greater than that of the first underlying dielectric layer 106 (which may be transparent to this laser radiation), advantageously such that k 3 > 10. k 2 for wavelengths between about 300 nm and 600 nm, and in particular for the wavelength of the laser that will be used thereafter for etching the second dielectric layer 108. This absorption coefficient k 3 is also greater than or equal to about 0.1 for wavelengths less than or equal to about 650 nm.
- the second dielectric layer 108 is based on nitride or silicon oxide with a high concentration of silicon, for example of which silicon represents more than about 30% of its composition.
- the second dielectric layer 108 further comprises a thickness of between about 10 nm and 100 nm, this thickness being equal to about 50 nm in this first embodiment.
- the first dielectric layer 106 and the second dielectric layer 108 are preferably deposited on the layer 104 via a deposition process involving a deposition temperature of less than or equal to about 200 ° C., for example via chemical vapor deposition (CVD) or physical vapor deposition (PVD), which makes it possible not to degrade the materials under the layers 106 and 108 (materials of the layer 104 and the device 100).
- CVD chemical vapor deposition
- PVD physical vapor deposition
- first openings 110 are then made through the second dielectric layer 108 by laser irradiation of parts of the surface of the layer 108.
- This laser etching is for example implemented such as the wavelength.
- the laser used is less than about 600 nm (and for example between about 300 nm and 600 nm), the laser fluence is between about 0.01 and 10 J / cm 2 , the laser frequency is between about 10 and 1000 kHz, and that the pitch of the laser is between about 1 and 100 ⁇ .
- the pattern of the openings 110 made through the second dielectric layer 108 corresponds to that of the electrical contacts intended to be made on the front face of the cell 100.
- the second dielectric layer 108 is capable of being selectively etched, during this laser etching step, with respect to the first dielectric layer 106 and the layer 104.
- etching selectivity is obtained by virtue of the fact that the absorption coefficient k 3 of the second dielectric layer 108 is greater than that of the layers 104 and 106 for the wavelength of the laser used.
- second openings 112 are then made through the first dielectric layer 106. These second openings 112 are made in the extension of the first openings 110. These second openings 112 are obtained by a selective etching, corresponding, for example to a wet etching carried out with a solution of HF (hydrofluoric acid) type, of parts of the first dielectric layer 106 with respect to the second dielectric layer 108 and the layer 104.
- this solution has a concentration of HF elements equal to about 2%, and the etching is carried out for a period of about 10 minutes.
- This etching selectivity of the material of the first dielectric layer 106 vis-à-vis the second dielectric layer 108 and the layer 104 is obtained because of the nature of the material of the first dielectric layer 106, here poor in silicon, which is optically poorly absorbent and grows faster than the material of the second dielectric layer 108 rich in silicon.
- the remaining portions of the second dielectric layer 108 are then etched selectively with respect to the first dielectric layer 106 and to the layer 104, for example via wet etching implemented with a KOH type solution ( potassium hydroxide).
- KOH type solution potassium hydroxide
- This etching is here carried out for a duration equal to about 2 minutes.
- This etching selectivity of the material of the second dielectric layer 108 vis-à-vis the first dielectric layer 106 and the layer 104 is obtained due to the nature of the material of the second dielectric layer 108, here at high silicon concentration which is optically more absorbent and etches faster than the material of the first dielectric layer 106 at low silicon concentration.
- Metallizations 114 are then made in the second openings 112, in electrical contact with the parts of the layer 104 forming the bottom walls of the openings 112.
- the material of the metallizations 114 is such that it has a conductivity ⁇ 3 greater than or equal to approximately 1.10 4 cm.sup.- 1 cm.sup.- 1 and an etch selectivity with respect to the materials of the layer 104 and the dielectric layers 106 and 108 (the layer 104 and the dielectric layers 106 and 108 thus also having a selectivity of etching vis-à-vis with respect to the metallization material 114).
- the thickness of the metallizations 114 is here between about 5 ⁇ and 50 ⁇ .
- the metallizations 114 are obtained here by electrolytic deposition of copper, for example implemented at a temperature of less than or equal to about 200 ° C.
- Other electrically conductive materials may be used to make metallizations 114, such as, for example, nickel, aluminum, titanium, tungsten, etc. Parts of the metallizations 114 rest portions of the first dielectric layer 106 at the periphery of the second openings 112.
- the steps of a method for producing electrical contacts of a semiconductor device 100 according to a second embodiment are now described.
- the steps previously described in connection with FIGS. 1 to 4 are first of all implemented.
- the metallizations 114 are deposited in the openings 110 and 112 (FIG. 7).
- parts of the metallizations 114 rest on portions of the second dielectric layer 108 at the periphery of the first openings 110.
- the second dielectric layer 108 is then etched as previously described for the first embodiment. Because the metallizations 114 were made before this etching, portions 116 of the second dielectric layer 108 covered by the metallizations 114 are retained after the etching of the second dielectric layer 108.
Landscapes
- Photovoltaic Devices (AREA)
- Weting (AREA)
- Life Sciences & Earth Sciences (AREA)
- Engineering & Computer Science (AREA)
- Sustainable Development (AREA)
- Sustainable Energy (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1257968A FR2994767A1 (fr) | 2012-08-23 | 2012-08-23 | Procede de realisation de contacts electriques d'un dispositif semi-conducteur |
| PCT/EP2013/067443 WO2014029836A2 (fr) | 2012-08-23 | 2013-08-22 | Procede de realisation de contacts electriques d'un dispositif semi-conducteur |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP2888765A2 true EP2888765A2 (fr) | 2015-07-01 |
Family
ID=46963976
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP13756362.3A Withdrawn EP2888765A2 (fr) | 2012-08-23 | 2013-08-22 | Procede de realisation de contacts electriques d'un dispositif semi-conducteur |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20150243833A1 (fr) |
| EP (1) | EP2888765A2 (fr) |
| JP (1) | JP2015527744A (fr) |
| FR (1) | FR2994767A1 (fr) |
| WO (1) | WO2014029836A2 (fr) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017056378A1 (fr) * | 2015-09-30 | 2017-04-06 | パナソニックIpマネジメント株式会社 | Procédé de fabrication de cellule solaire |
| KR102267611B1 (ko) * | 2018-04-03 | 2021-06-21 | 한양대학교 에리카산학협력단 | 태양전지 및 그 제조 방법 |
| TWI892010B (zh) * | 2022-04-27 | 2025-08-01 | 聯華電子股份有限公司 | 半導體裝置以及其製作方法 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4387116A (en) * | 1981-12-28 | 1983-06-07 | Exxon Research And Engineering Co. | Conditioner for adherence of nickel to a tin oxide surface |
| JPS59158572A (ja) * | 1983-02-28 | 1984-09-08 | Matsushita Electric Works Ltd | 太陽電池の製造方法 |
| JPS6415956A (en) * | 1987-07-10 | 1989-01-19 | Nec Corp | Method for forming bump |
| JPH05206139A (ja) * | 1991-11-19 | 1993-08-13 | Nec Corp | 基板接続電極およびその製造方法 |
| KR101139443B1 (ko) * | 2009-09-04 | 2012-04-30 | 엘지전자 주식회사 | 이종접합 태양전지와 그 제조방법 |
| FR2947953A1 (fr) * | 2009-11-23 | 2011-01-14 | Commissariat Energie Atomique | Cellule photovoltaique amelioree et procede de realisation |
| DE102009057881A1 (de) * | 2009-12-11 | 2011-06-16 | Centrothem Photovoltaics Ag | Verfahren zur Laserstrukturierung eines transparenten Mediums und Verwendung des Verfahrens bei der Herstellung eines Halbleiterbauelements |
| JP5535709B2 (ja) * | 2010-03-19 | 2014-07-02 | 三洋電機株式会社 | 太陽電池、その太陽電池を用いた太陽電池モジュール及び太陽電池の製造方法 |
| WO2012029847A1 (fr) * | 2010-08-31 | 2012-03-08 | 三洋電機株式会社 | Procédé de production d'une cellule photovoltaïque et procédé de production d'un module photovoltaïque |
| KR101665722B1 (ko) * | 2010-09-27 | 2016-10-24 | 엘지전자 주식회사 | 태양 전지 및 이의 제조 방법 |
| US20120222736A1 (en) * | 2011-03-04 | 2012-09-06 | Applied Materials, Inc. | Front contact solar cell manufacture using metal paste metallization |
| US8884157B2 (en) * | 2012-05-11 | 2014-11-11 | Epistar Corporation | Method for manufacturing optoelectronic devices |
| EP2859591A4 (fr) * | 2012-06-08 | 2016-03-23 | Tetrasun Inc | Retrait sélectif et/ou plus rapide d'un revêtement à partir d'une couche sous-jacente et applications de cellule solaire associées |
-
2012
- 2012-08-23 FR FR1257968A patent/FR2994767A1/fr active Pending
-
2013
- 2013-08-22 EP EP13756362.3A patent/EP2888765A2/fr not_active Withdrawn
- 2013-08-22 US US14/422,243 patent/US20150243833A1/en not_active Abandoned
- 2013-08-22 JP JP2015527917A patent/JP2015527744A/ja not_active Withdrawn
- 2013-08-22 WO PCT/EP2013/067443 patent/WO2014029836A2/fr not_active Ceased
Non-Patent Citations (1)
| Title |
|---|
| See references of WO2014029836A2 * |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2014029836A3 (fr) | 2014-04-17 |
| US20150243833A1 (en) | 2015-08-27 |
| WO2014029836A2 (fr) | 2014-02-27 |
| JP2015527744A (ja) | 2015-09-17 |
| FR2994767A1 (fr) | 2014-02-28 |
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