ES2033281T3 - Circuito, su aplicacion y metodo de prueba para una red de comunicaciones. - Google Patents
Circuito, su aplicacion y metodo de prueba para una red de comunicaciones.Info
- Publication number
- ES2033281T3 ES2033281T3 ES198787115471T ES87115471T ES2033281T3 ES 2033281 T3 ES2033281 T3 ES 2033281T3 ES 198787115471 T ES198787115471 T ES 198787115471T ES 87115471 T ES87115471 T ES 87115471T ES 2033281 T3 ES2033281 T3 ES 2033281T3
- Authority
- ES
- Spain
- Prior art keywords
- signal
- test
- circuit
- error
- circuit arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000010998 test method Methods 0.000 title 1
- 238000001514 detection method Methods 0.000 abstract 3
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0421—Circuit arrangements therefor
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/22—Arrangements for supervision, monitoring or testing
- H04M3/24—Arrangements for supervision, monitoring or testing with provision for checking the normal operation
- H04M3/244—Arrangements for supervision, monitoring or testing with provision for checking the normal operation for multiplex systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
- H04Q11/0478—Provisions for broadband connections
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Tests Of Electronic Circuits (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
- Monitoring And Testing Of Exchanges (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
ESTE SISTEMA DE CONEXIONES INVENTADO SE CARACTERIZA POR EL HECHO DE QUE POSEE UN GENERADOR DE SEÑALES DE PRUEBA (TG) INTEGRADO, FIJO, Y UN CIRCUITO DETECTOR DE FALLOS (PE), TAMBIEN INTEGRADO DE FORMA FIJA.DESDE DUERA SE PUEDE ORDENAR QUE EL RECORRIDO DE UNA SEÑAL QUEDE SEPARADO EN UN PUNTO DETERMINADO, MEMORIZANDOSE AHI LA SEÑAL DEL GENERADOR DE SEÑALES DE PRUEBA (TG). LA SEÑAL RECOGIDA EN OTRO PUNTO DE SU RECORRIDO, TAMBIEN SELECCIONABLE DESDE FUERA, SE REVISA EN EL CIRCUITO DETECTOR DE FALLOS (PE), Y EL RESULTADO SE EMITE HACIAL EL EXTERIOR. UN SISTEMA DE CONEXIONES DE ESTE TIPO ENCUENTRA UNA APLICACION VENTAJOSA ALLI DONDE SE UNEN UNA MULTITUD DE SISTEMAS DE CONEXIONES IDENTICOS, FORMANDO UNA RED DE NOTICIAS MAYOR. EL INVENTO SE DESCRIBE CON LA AYUDA DEL EJEMPLO DE UN CAMPO DE ACOPLO DE BANDA ANCHA COMPUESTO DE MUCHOS ELEMENTOS DE ACOPLO DE BANDA ANCHA. DADO QUE LOS GENERADORES DE SEÑALES DE PRUEBA Y LOS CIRCUITOS DETECTORES DE FALLOS SON INDEPENDIENTES ENTRE SI, RESULTA FACTIBLE REALIZAR PRUEBAS DE TODO EL SISTEMA SIN TENER QUE CONECTAR RECORRIDOS DE PRUEBA ADICIONALES. EL SISTEMA DE CONEXIONES PROPUESTO FACILITA TAMBIEN LA COMPROBACION DE CIRCUITOS DE ALTA INTEGRACION INCLUSO YA EN EL WAFER, YA QUE NO SE PRECISA INTRODUCIR NI RECOGER SEÑALES DE PRUEBA DE ALTA FRECUENCIA.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19863636427 DE3636427A1 (de) | 1986-10-25 | 1986-10-25 | Schaltungsanordnung und nachrichtennetzwerk mit pruefeinrichtung und pruefverfahren |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES2033281T3 true ES2033281T3 (es) | 1993-03-16 |
Family
ID=6312511
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES198787115471T Expired - Lifetime ES2033281T3 (es) | 1986-10-25 | 1987-10-22 | Circuito, su aplicacion y metodo de prueba para una red de comunicaciones. |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4881229A (es) |
| EP (1) | EP0265837B1 (es) |
| JP (1) | JPS63122342A (es) |
| AT (1) | ATE76546T1 (es) |
| DE (2) | DE3636427A1 (es) |
| ES (1) | ES2033281T3 (es) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3816948A1 (de) * | 1988-05-18 | 1989-11-30 | Siemens Ag | Schaltungsanordnung fuer fernmeldeschaltanlagen und/oder fernmeldevermittlungsanlagen, insbesondere cross-connect-schaltstationen, mit closschem koppelfeld |
| DE3832491A1 (de) * | 1988-09-22 | 1990-03-29 | Siemens Ag | Verfahren zum messen im teilnehmerbereich eines integrated services digital network (isdn)-systems |
| US5051996A (en) * | 1989-03-27 | 1991-09-24 | The United States Of America As Represented By The United States Department Of Energy | Built-in-test by signature inspection (bitsi) |
| US5072447A (en) * | 1989-11-08 | 1991-12-10 | National Semiconductor Corporation | Pattern injector |
| DE9111798U1 (de) * | 1991-09-20 | 1993-01-28 | Siemens AG, 8000 München | Schaltungsanordnung zur sicherheitstechnischen Prüfung ausgewählter Komponenten eines Fernmeldevermittlungsssystems |
| US5317439A (en) * | 1992-07-17 | 1994-05-31 | At&T Bell Laboratories | Automatic on-line monitoring and optimization of optical network switching nodes |
| DK0590182T3 (da) * | 1992-09-29 | 1998-04-27 | Siemens Ag | Fremgangsmåde til drift af et tidstrinelement eller et kombineret tids-rumtrinelement i en koblingsindrretning i en digitalt tidsmultiplextelefonomstillingscentral |
| EP0624022B1 (de) * | 1993-05-05 | 2003-11-05 | Siemens Aktiengesellschaft | Anordnung zur Sprechwegeprüfung in einem Koppelnetz einer digitalen Zeitmultiplex-Fernsprechvermittlungsstelle |
| FR2724084B1 (fr) * | 1994-08-31 | 1997-01-03 | Alcatel Mobile Comm France | Systeme de transmission d'informations par un canal de transmission variant dans le temps, et equipements d'emission et de reception correspondants |
| US6039709A (en) * | 1998-12-16 | 2000-03-21 | Orthosis Corrective Systems | Orthopedic hinge assembly |
| US7062696B2 (en) * | 2000-01-14 | 2006-06-13 | National Semiconductor | Algorithmic test pattern generator, with built-in-self-test (BIST) capabilities, for functional testing of a circuit |
| US8775888B2 (en) * | 2012-03-30 | 2014-07-08 | Lsi Corporation | Methods and structure for correlating multiple test outputs of an integrated circuit acquired during separate instances of an event |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2523912C3 (de) * | 1975-05-30 | 1982-02-25 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Prüfsystem zur Überprüfung des Schaltzustandes von Koppelpunkten eines Kreuzschaltfeldes |
| JPS5970349A (ja) * | 1982-10-15 | 1984-04-20 | Hitachi Ltd | 通話路導通試験方式 |
| US4538269A (en) * | 1983-04-18 | 1985-08-27 | International Telephone And Telegraph Corporation | Programmable coding and decoding arrangement |
| DE3331403A1 (de) * | 1983-08-31 | 1985-03-21 | Robert Bosch Gmbh, 7000 Stuttgart | Mikroprozessorgesteuertes elektronisches geraet |
| US4577312A (en) * | 1984-07-05 | 1986-03-18 | At&T Bell Laboratories | Arrangement for wideband transmission via a switched network |
| US4686628A (en) * | 1984-07-19 | 1987-08-11 | Fairchild Camera & Instrument Corp. | Electric device or circuit testing method and apparatus |
| US4654851A (en) * | 1984-12-24 | 1987-03-31 | Rockwell International Corporation | Multiple data path simulator |
| US4672610A (en) * | 1985-05-13 | 1987-06-09 | Motorola, Inc. | Built in self test input generator for programmable logic arrays |
| US4754215A (en) * | 1985-11-06 | 1988-06-28 | Nec Corporation | Self-diagnosable integrated circuit device capable of testing sequential circuit elements |
| US4669081A (en) * | 1986-02-04 | 1987-05-26 | Raytheon Company | LSI fault insertion |
-
1986
- 1986-10-25 DE DE19863636427 patent/DE3636427A1/de not_active Withdrawn
-
1987
- 1987-10-21 US US07/111,935 patent/US4881229A/en not_active Expired - Lifetime
- 1987-10-22 AT AT87115471T patent/ATE76546T1/de not_active IP Right Cessation
- 1987-10-22 DE DE8787115471T patent/DE3779254D1/de not_active Expired - Lifetime
- 1987-10-22 ES ES198787115471T patent/ES2033281T3/es not_active Expired - Lifetime
- 1987-10-22 EP EP19870115471 patent/EP0265837B1/de not_active Expired - Lifetime
- 1987-10-23 JP JP62268016A patent/JPS63122342A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| US4881229A (en) | 1989-11-14 |
| DE3636427A1 (de) | 1988-05-05 |
| JPS63122342A (ja) | 1988-05-26 |
| EP0265837A3 (en) | 1989-11-15 |
| EP0265837A2 (de) | 1988-05-04 |
| ATE76546T1 (de) | 1992-06-15 |
| EP0265837B1 (de) | 1992-05-20 |
| DE3779254D1 (de) | 1992-06-25 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG2A | Definitive protection |
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