ES2046172T3 - Maquinas de calculo de crc. - Google Patents
Maquinas de calculo de crc.Info
- Publication number
- ES2046172T3 ES2046172T3 ES198686309177T ES86309177T ES2046172T3 ES 2046172 T3 ES2046172 T3 ES 2046172T3 ES 198686309177 T ES198686309177 T ES 198686309177T ES 86309177 T ES86309177 T ES 86309177T ES 2046172 T3 ES2046172 T3 ES 2046172T3
- Authority
- ES
- Spain
- Prior art keywords
- crc
- bits
- data
- byte
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
- H03M13/091—Parallel or block-wise CRC computation
Landscapes
- Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
- Analysing Materials By The Use Of Radiation (AREA)
- Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
- Heat Sensitive Colour Forming Recording (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
SE DESCRIBE UN CIRCUITO DE CALCULO CRC QUE PUEDE CALCULAR BITS DE CONTROL CRC EN 8 BITS DE DATOS DE ENTRADA POR BYTE DE RELOJ. EL APARATO DE CALCULO EMPLEA 8 FILAS DE ENLACES MOVILES, CON LAS ENTRADAS DE CADA FILA ACOPLADAS A LAS SALIDAS DE DATOS DE LA FILA PRECEDENTE. CADA ENLACE MOVIL MUEVE SU BIT DE ENTRADA UN BIT HACIA EL BIT MAS SIGNIFICATIVO, Y ENLACES MOVILES SELECCIONADOS LLEVAN A CABO UNA OPERACION DE O EXCLUYENTE ENTRE SUS BITS DE ENTRADA Y EL RESULTADO DE UNA PUERTA DE ENTRADA DE O EXCLUYENTE. SE UTILIZA UN BUS DE SALIDA DE UN BYTE PARA ACCEDER A LOS BITS DE CONTROL FINALES DESDE EL REGISTRO DE SUMA, ANULANDO EL CONJUNTO DE LOS ENLACES MOVILES DURANTE LOS CICLOS DE SALIDA, DE MANERA QUE LOS BYTES DE LOS DATOS CRC PUEDEN MOVERSE A POSICION EN EL CONJUNTO, UN BYTE POR CADA CICLO DE BYTE DE RELOJ. SE INCLUYE LA LOGICA PREFIJADA PARA FORZAR TODOS LOS PRIMEROS LOGICOS EN LAS ENTRADAS DE DATOS DE LA PRIMERA FILA DE ENLACES MOVILES, DE FORMA QUE LA MAQUINA PUEDE PREFIJARSE DURANTE LOSPRIMEROS CICLOS DE RELOJ DEL CALCULO CRC. SE DESCRIBEN DIFERENTES ARQUITECTURAS PARA PERMITIR EL CALCULO SEPARADO DE BITS CRC EN UN PAQUETE DE ENCABEZAMIENTO Y UN PAQUETE DE DATOS, EN EL CUAL LOS BITS CRC PUEDEN CALCULARSE UNICAMENTE SOBRE LOS DATOS O CON LOS DATOS MAS EL PAQUETE DE ENCABEZAMIENTO Y LOS BITS CRC DE ESTE. SE DESCRIBE IGUALMENTE LA LOGICA PARA POSIBILITAR EL CALCULO CRC EN TODOS LOS BYTES DE UN MENSAJE A LA VEZ QUE SE EXCLUYE UN NUMERO SELECCIONADO DE BITS EN EL PRIMER BYTE.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/803,367 US4712215A (en) | 1985-12-02 | 1985-12-02 | CRC calculation machine for separate calculation of checkbits for the header packet and data packet |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES2046172T3 true ES2046172T3 (es) | 1994-02-01 |
Family
ID=25186354
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES198686309177T Expired - Lifetime ES2046172T3 (es) | 1985-12-02 | 1986-11-25 | Maquinas de calculo de crc. |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4712215A (es) |
| EP (1) | EP0230730B1 (es) |
| JP (1) | JPH0831802B2 (es) |
| AT (1) | ATE97276T1 (es) |
| DE (1) | DE3689285T2 (es) |
| ES (1) | ES2046172T3 (es) |
Families Citing this family (41)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5682148A (en) * | 1985-11-27 | 1997-10-28 | Seiko Corporation | Paging system with message numbering prior to transmission |
| US4897835A (en) * | 1985-11-27 | 1990-01-30 | At&E Corporation | High capacity protocol with multistation capability |
| US4901316A (en) * | 1986-05-27 | 1990-02-13 | Nohmi Bosai Kogyo Co., Ltd. | Disaster prevention monitoring and control facility |
| JPH0193933A (ja) * | 1987-10-06 | 1989-04-12 | Sony Corp | エラー訂正符号化装置 |
| DE3890947C2 (de) * | 1987-11-10 | 1995-05-18 | Echelon Systems | Netzwerk und Verfahren zur Nachrichtenübertragung |
| US4947484A (en) * | 1987-11-10 | 1990-08-07 | Echelon Systems Corporation | Protocol for network having a plurality of intelligent cells |
| US4996690A (en) * | 1988-08-26 | 1991-02-26 | Stac Electronics | Write operation with gating capability |
| EP0411110A4 (en) * | 1989-02-16 | 1993-02-24 | Grumman Aerospace Corporation | Very high speed error detection network |
| GB2242104B (en) * | 1990-02-06 | 1994-04-13 | Digital Equipment Int | Method and apparatus for generating a frame check sequence |
| US5121397A (en) * | 1990-02-14 | 1992-06-09 | Hewlett-Packard Company | Method and apparatus for producing order independent signatures for error detection |
| US5321704A (en) * | 1991-01-16 | 1994-06-14 | Xilinx, Inc. | Error detection structure and method using partial polynomial check |
| EP0582748B1 (en) * | 1992-07-14 | 1997-03-05 | ALCATEL BELL Naamloze Vennootschap | Divider device to divide a first polynomial by a second one |
| ES2100269T3 (es) * | 1992-07-14 | 1997-06-16 | Alcatel Bell Nv | Dispositivo de deteccion y correccion de error. |
| GB9314479D0 (en) * | 1992-11-06 | 1993-08-25 | Hewlett Packard Co | Encoding data |
| US5390196A (en) * | 1992-11-12 | 1995-02-14 | Bull Hn Information Systems Inc. | Byte-wise determination of a checksum from a CRC-32 polynomial |
| SE470544B (sv) * | 1992-11-24 | 1994-07-25 | Ellemtel Utvecklings Ab | För en bitfelsövervakning i en väljarutrustning avsedd anordning |
| AU659971B2 (en) * | 1992-12-29 | 1995-06-01 | Motorola, Inc. | Efficient CRC remainder coefficient generation and checking device and method |
| EP0614294A1 (en) * | 1993-03-03 | 1994-09-07 | International Business Machines Corporation | Method for generating a frame check sequence |
| JP2814918B2 (ja) * | 1994-07-07 | 1998-10-27 | 株式会社デンソー | マイクロコンピュータ |
| US5592498A (en) * | 1994-09-16 | 1997-01-07 | Cirrus Logic, Inc. | CRC/EDC checker system |
| FR2759796B1 (fr) * | 1997-02-19 | 2001-12-07 | Bull Sa | Dispositif et procede de detection d'erreurs sur un circuit integre comportant un port parallele serie |
| US5951707A (en) * | 1997-06-27 | 1999-09-14 | International Business Machines Corporation | Method of partitioning CRC calculation for a low-cost ATM adapter |
| US6075774A (en) * | 1997-11-18 | 2000-06-13 | 3Com Corporation | Method and device for generating a frame check sequence |
| US6681203B1 (en) * | 1999-02-26 | 2004-01-20 | Lucent Technologies Inc. | Coupled error code protection for multi-mode vocoders |
| US6320501B1 (en) | 1999-05-25 | 2001-11-20 | Pittway Corporation | Multiple sensor system for alarm determination with device-to-device communications |
| US6681364B1 (en) | 1999-09-24 | 2004-01-20 | International Business Machines Corporation | Cyclic redundancy check for partitioned frames |
| US6530061B1 (en) * | 1999-12-23 | 2003-03-04 | Intel Corporation | Method and apparatus for offloading checksum |
| US6848072B1 (en) * | 2000-09-19 | 2005-01-25 | Bbn Solutions Llc | Network processor having cyclic redundancy check implemented in hardware |
| US6643821B2 (en) * | 2000-11-30 | 2003-11-04 | Stmicroelectronics, Inc. | Method and device for computing incremental checksums |
| US20040015771A1 (en) * | 2002-07-16 | 2004-01-22 | Menahem Lasser | Error correction for non-volatile memory |
| US7607070B2 (en) * | 2004-09-13 | 2009-10-20 | National Instruments Corporation | System and method for in-line consistency checking of packetized data |
| US20060253768A1 (en) * | 2005-05-03 | 2006-11-09 | Intel Corporation | Techniques to speculatively determine network protocol unit integrity |
| DE102005029515A1 (de) * | 2005-06-25 | 2006-12-28 | Bosch Rexroth Aktiengesellschaft | Verfahren zur Berechnung von CRC-Prüfwerten und Logikschaltung |
| KR101224591B1 (ko) * | 2006-02-23 | 2013-01-22 | 삼성전자주식회사 | 네트워크 중계 장치 및 그 방법 |
| GB0607976D0 (en) * | 2006-04-22 | 2006-05-31 | Univ Belfast | Apparatus and method for computing an error detection code |
| US7823043B2 (en) * | 2006-05-10 | 2010-10-26 | Sandisk Il Ltd. | Corruption-resistant data porting with multiple error correction schemes |
| US8234539B2 (en) * | 2007-12-06 | 2012-07-31 | Sandisk Il Ltd. | Correction of errors in a memory array |
| US9891985B1 (en) * | 2014-11-01 | 2018-02-13 | Netronome Systems, Inc. | 256-bit parallel parser and checksum circuit with 1-hot state information bus |
| TWI658364B (zh) | 2018-03-20 | 2019-05-01 | 慧榮科技股份有限公司 | 存取快閃記憶體模組的方法及相關的快閃記憶體控制器與電子裝置 |
| TWI698750B (zh) * | 2018-03-20 | 2020-07-11 | 慧榮科技股份有限公司 | 存取快閃記憶體模組的方法及相關的快閃記憶體控制器與電子裝置 |
| CN113300716B (zh) * | 2020-07-14 | 2025-02-21 | 阿里巴巴集团控股有限公司 | 循环冗余校验码的生成方法、设备以及计算机可读介质 |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3703705A (en) * | 1970-12-31 | 1972-11-21 | Ibm | Multi-channel shift register |
| US3798597A (en) * | 1972-06-26 | 1974-03-19 | Honeywell Inf Systems | System and method for effecting cyclic redundancy checking |
| FR2225890B1 (es) * | 1973-04-13 | 1976-09-10 | Honeywell Bull Soc Ind | |
| DE2347317A1 (de) * | 1973-09-20 | 1975-04-03 | Licentia Gmbh | Schaltungsanordnung zur erzeugung von pruefstellen in anlagen zur gesicherten datenuebertragung |
| US3872430A (en) * | 1973-11-23 | 1975-03-18 | Paul Emile Boudreau | Method and apparatus of error detection for variable length words using a polynomial code |
| JPS5425764A (en) * | 1977-07-28 | 1979-02-26 | Daifuku Machinery Works | Device for simultaneous measurement of volume and weight |
| JPS5437460A (en) * | 1977-07-28 | 1979-03-19 | Chino Works Ltd | Integral ad converter |
| US4282551A (en) * | 1979-04-11 | 1981-08-04 | Hitachi, Ltd. | PCM Recording and reproducing apparatus |
| SE417760B (sv) * | 1979-05-15 | 1981-04-06 | Ellemtel Utvecklings Ab | Sett att vid dataoverforing mellan en sendande dator och en mottagande dator overvaka fel och anordning for genomforande av settet |
| US4410989A (en) * | 1980-12-11 | 1983-10-18 | Cyclotomics, Inc. | Bit serial encoder |
| US4380029A (en) * | 1981-03-13 | 1983-04-12 | Bti Computer Systems | Data recording format and method and apparatus for producing same |
| DE3122381A1 (de) * | 1981-06-05 | 1982-12-23 | Ibm Deutschland Gmbh, 7000 Stuttgart | Verfahren und einrichtung zur erzeugung von pruefbits zur sicherung eines datenwortes |
| JPS58206254A (ja) * | 1982-05-27 | 1983-12-01 | Nec Corp | 誤り検出符号生成/検査方式 |
| US4454600A (en) * | 1982-08-25 | 1984-06-12 | Ael Microtel Limited | Parallel cyclic redundancy checking circuit |
| US4498174A (en) * | 1982-08-25 | 1985-02-05 | Ael Microtel Limited | Parallel cyclic redundancy checking circuit |
| US4593393A (en) * | 1984-02-06 | 1986-06-03 | Motorola, Inc. | Quasi parallel cyclic redundancy checker |
| JPS60206227A (ja) * | 1984-03-30 | 1985-10-17 | Oki Electric Ind Co Ltd | 誤り訂正復号回路 |
-
1985
- 1985-12-02 US US06/803,367 patent/US4712215A/en not_active Expired - Lifetime
-
1986
- 1986-11-25 ES ES198686309177T patent/ES2046172T3/es not_active Expired - Lifetime
- 1986-11-25 AT AT86309177T patent/ATE97276T1/de not_active IP Right Cessation
- 1986-11-25 DE DE86309177T patent/DE3689285T2/de not_active Expired - Fee Related
- 1986-11-25 EP EP86309177A patent/EP0230730B1/en not_active Expired - Lifetime
- 1986-12-01 JP JP61286556A patent/JPH0831802B2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP0230730B1 (en) | 1993-11-10 |
| DE3689285T2 (de) | 1994-05-11 |
| JPH0831802B2 (ja) | 1996-03-27 |
| EP0230730A2 (en) | 1987-08-05 |
| DE3689285D1 (de) | 1993-12-16 |
| EP0230730A3 (en) | 1990-03-14 |
| US4712215A (en) | 1987-12-08 |
| JPS62133825A (ja) | 1987-06-17 |
| ATE97276T1 (de) | 1993-11-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG2A | Definitive protection |
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