JPS647716A - Parallel processing type crc arithmetic circuit - Google Patents

Parallel processing type crc arithmetic circuit

Info

Publication number
JPS647716A
JPS647716A JP62160959A JP16095987A JPS647716A JP S647716 A JPS647716 A JP S647716A JP 62160959 A JP62160959 A JP 62160959A JP 16095987 A JP16095987 A JP 16095987A JP S647716 A JPS647716 A JP S647716A
Authority
JP
Japan
Prior art keywords
arithmetic
parallel processing
circuit
bit
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62160959A
Other languages
Japanese (ja)
Inventor
Takayuki Aoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62160959A priority Critical patent/JPS647716A/en
Publication of JPS647716A publication Critical patent/JPS647716A/en
Pending legal-status Critical Current

Links

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  • Detection And Correction Of Errors (AREA)
  • Error Detection And Correction (AREA)

Abstract

PURPOSE:To attain an arithmetic processing at the 1/n speed, to facilitate the saving of data to a memory and the loading to an arithmetic circuit and to reduce a hardware by making the (n) bit of a non-arithmetic signal into one block and executing a parallel processing. CONSTITUTION:After a non-arithmetic signal inputted to a terminal 11 is parallel-developed to 6 bits by a shift register 26, respective bits are inputted to FF27 and 28 and the outputs are inputted to an exclusive 'or' circuit 26 as non-arithmetic signals g-l of each one bit. To the circuit 25, arithmetic-data (a)-(f) for one bit are supplied, and at output terminals 18-23, the arithmetic result of a cyclic redundancy checking CRC generating polynomial is obtained.
JP62160959A 1987-06-30 1987-06-30 Parallel processing type crc arithmetic circuit Pending JPS647716A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62160959A JPS647716A (en) 1987-06-30 1987-06-30 Parallel processing type crc arithmetic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62160959A JPS647716A (en) 1987-06-30 1987-06-30 Parallel processing type crc arithmetic circuit

Publications (1)

Publication Number Publication Date
JPS647716A true JPS647716A (en) 1989-01-11

Family

ID=15725885

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62160959A Pending JPS647716A (en) 1987-06-30 1987-06-30 Parallel processing type crc arithmetic circuit

Country Status (1)

Country Link
JP (1) JPS647716A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04104619A (en) * 1990-08-24 1992-04-07 Mitsubishi Electric Corp Error check code generator and transmission error detector
JP2014165892A (en) * 2013-02-28 2014-09-08 Mega Chips Corp Hierarchically structured arithmetic circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5725046A (en) * 1980-07-22 1982-02-09 Toshiba Corp Cyclic redundancy check operating circuit
JPS61102848A (en) * 1984-10-25 1986-05-21 Nippon Telegr & Teleph Corp <Ntt> Transmission data generating device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5725046A (en) * 1980-07-22 1982-02-09 Toshiba Corp Cyclic redundancy check operating circuit
JPS61102848A (en) * 1984-10-25 1986-05-21 Nippon Telegr & Teleph Corp <Ntt> Transmission data generating device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04104619A (en) * 1990-08-24 1992-04-07 Mitsubishi Electric Corp Error check code generator and transmission error detector
JP2014165892A (en) * 2013-02-28 2014-09-08 Mega Chips Corp Hierarchically structured arithmetic circuit

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