ES2080522T3 - Procedimiento para la fabricacion de un circuito impreso, asi como circuito impreso. - Google Patents

Procedimiento para la fabricacion de un circuito impreso, asi como circuito impreso.

Info

Publication number
ES2080522T3
ES2080522T3 ES92922851T ES92922851T ES2080522T3 ES 2080522 T3 ES2080522 T3 ES 2080522T3 ES 92922851 T ES92922851 T ES 92922851T ES 92922851 T ES92922851 T ES 92922851T ES 2080522 T3 ES2080522 T3 ES 2080522T3
Authority
ES
Spain
Prior art keywords
plane
conductive
adhesive layer
connection
conductive plane
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES92922851T
Other languages
English (en)
Inventor
Helmut Bruckner
Siegfried Kopnick
Werner Uggowitzer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronics NV filed Critical Philips Electronics NV
Application granted granted Critical
Publication of ES2080522T3 publication Critical patent/ES2080522T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4084—Through-connections; Vertical interconnect access [VIA] connections by deforming at least one of the conductive layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0302—Properties and characteristics in general
    • H05K2201/0305—Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/091—Locally and permanently deformed areas including dielectric material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/033—Punching metal foil, e.g. solder foil
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/063—Lamination of preperforated insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447—Lead-in-hole components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1002—Methods of surface bonding and/or assembly therefor with permanent bending or reshaping or surface deformation of self sustaining lamina
    • Y10T156/1043—Subsequent to assembly
    • Y10T156/1044—Subsequent to assembly of parallel stacked sheets only
    • Y10T156/1046—Bending of one lamina only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1056—Perforating lamina
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1089—Methods of surface bonding and/or assembly therefor of discrete laminae to single face of additional lamina
    • Y10T156/109—Embedding of laminae within face of additional laminae
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1089—Methods of surface bonding and/or assembly therefor of discrete laminae to single face of additional lamina
    • Y10T156/1092—All laminae planar and face to face
    • Y10T156/1093—All laminae planar and face to face with covering of discrete laminae with additional lamina
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
    • Y10T29/49167—Manufacturing circuit on or in base by forming conductive walled aperture in base with deforming of conductive path

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Combinations Of Printed Boards (AREA)
  • Laminated Bodies (AREA)

Abstract

SE DESCRIBE UN PROCEDIMIENTO PARA PRODUCIR POR LO MENOS UNA CONEXION IMPRESA DE DOS CAPAS CON UNA PLACA SOPORTE, UN PRIMER PLANO CONDUCTOR CON SUPERFICIES DE CONTACTO (PAD,S)Y UN SEGUNDO PLANO CONDUCTOR CON SUPERFICIES DE CONEXION (SOLDADURA VISTA), EN EL QUE SOBRE LA PLACA SOPORTE CON EL PRIMER PLANO CONDUCTOR Y LA SUPERFICIE DE CONTACTO (PADS) SE PEGA POR ARRIBA UNA LAMINA CONDUCTORA PREVISTA CON UNA CAPA ADHESIVA, POR LO QUE LA CAPA ADHESIVA Y LA LAMINA CONDUCTORA PRESENTA ORIFICIOS QUE SE CORRESPONDEN CON LAS SUPERFICIES DE CONTACTO (PADS) DEL PRIMER PLANO CONDUCTOR, POR LO QUE LA LAMINA CONDUCTORA PERFORADA EQUIPADA CON LA CAPA ADHESIVA SE PRENSA CON LA PLACA SOPORTE PRESENTANDO EL PRIMER PLANO CONDUCTOR A UNA PRESION DE 50 A 150 BAR Y A UNA TEMPERATURA DE POR LO MENOS 80 C Y POR ELLO SE ADHIERE, POR LO QUE LA SUPERFICIE DE CONTACTO DEL PRIMER PLANO SE ARQUEA POR LO MENOS PARCIALMENTE A TRAVES DE LOS ORIFICIOS DE LA CAPA ADHESIVA EN DIRECCION SUPERFICIAL A LA SUPERFICIE DE CONEXION DELSEGUNDO PLANO CONDUCTOR, ASI QUE LA SUPERFICIE DEL CONTACTO PRESENTA UNA DISTANCIA A LA SUPERFICIE DE CONEXION DEL SEGUNDO PLANO CONDUCTOR QUE ES INFERIOR AL ESPESOR DE LA SUPERFICIE DE CONTACTO. A CONTINUACION SE PRODUCE EN LA LAMINA CONDUCTORA EL SEGUNDO PLANO CONDUCTOR CON LA SUPERFICIE DE CONEXION, POR LO QUE LAS SUPERFICIES DE CONEXION (SOLDADURA VISTA) DEL SEGUNDO PLANO CONDUCTOR SE LIMITAN EN LOS ORIFICIOS DE LA CAPA ADHESIVA; SEGUN LO CUAL LAS SUPERFICIES DE CONTACTO (PADS) DEL PRIMER PLANO CONDUCTOR SE PUEDEN UNIR PARA CONDUCIR LA ELECTRICIDAD CON LAS SUPERFICIES DE CONEXION CORRESPONDIENTES DEL SEGUNDO PLANO CONDUCTOR A TRAVES DEL ORIFICIO DE LA CAPA ADHESIVA POR MEDIO DE SOLDADURA O DE LA APLICACION DE UNA PASTA CONDUCTORA.
ES92922851T 1991-10-31 1992-11-01 Procedimiento para la fabricacion de un circuito impreso, asi como circuito impreso. Expired - Lifetime ES2080522T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4135839A DE4135839A1 (de) 1991-10-31 1991-10-31 Verfahren zur herstellung einer mehrlagigen gedruckten schaltung sowie mehrlagige gedruckte schaltung

Publications (1)

Publication Number Publication Date
ES2080522T3 true ES2080522T3 (es) 1996-02-01

Family

ID=6443776

Family Applications (1)

Application Number Title Priority Date Filing Date
ES92922851T Expired - Lifetime ES2080522T3 (es) 1991-10-31 1992-11-01 Procedimiento para la fabricacion de un circuito impreso, asi como circuito impreso.

Country Status (11)

Country Link
US (1) US5560795A (es)
EP (1) EP0610360B1 (es)
JP (1) JPH07503100A (es)
KR (1) KR940703126A (es)
CN (1) CN1072557A (es)
DE (2) DE4135839A1 (es)
DK (1) DK0610360T3 (es)
ES (1) ES2080522T3 (es)
MY (1) MY110786A (es)
TW (1) TW310520B (es)
WO (1) WO1993009655A1 (es)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6133534A (en) * 1991-11-29 2000-10-17 Hitachi Chemical Company, Ltd. Wiring board for electrical tests with bumps having polymeric coating
US6568073B1 (en) * 1991-11-29 2003-05-27 Hitachi Chemical Company, Ltd. Process for the fabrication of wiring board for electrical tests
CN1065408C (zh) * 1995-07-25 2001-05-02 北京汇众实业总公司 电路板大电流导电用铜箔焊装方法
JP3570495B2 (ja) * 1999-01-29 2004-09-29 セイコーエプソン株式会社 インクジェット式記録ヘッド
FR2793432B1 (fr) * 1999-05-10 2001-07-06 Gemplus Card Int Procede de realisation d'un contact entre deux couches conductrices separees par une couche isolante
US20030200725A1 (en) * 2001-06-29 2003-10-30 Aloisi Robert J. Packaging material and products comprising indicia-former which changes from a first visual condition to a second visual condition and indicates a characteristic of the package contents
JP2003023248A (ja) * 2001-07-05 2003-01-24 Nitto Denko Corp 多層フレキシブル配線回路基板およびその製造方法
JP2003198113A (ja) * 2001-12-28 2003-07-11 Toshiba Corp プリント配線板、プリント配線板を有する回路モジュールおよび回路モジュールを搭載した電子機器
US7023084B2 (en) * 2003-03-18 2006-04-04 Sumitomo Metal (Smi) Electronics Devices Inc. Plastic packaging with high heat dissipation and method for the same
US7446407B2 (en) * 2005-08-31 2008-11-04 Chipmos Technologies Inc. Chip package structure
US9679602B2 (en) 2006-06-14 2017-06-13 Seagate Technology Llc Disc drive circuitry swap
JP4881211B2 (ja) * 2007-04-13 2012-02-22 新光電気工業株式会社 配線基板の製造方法及び半導体装置の製造方法及び配線基板
US9305590B2 (en) 2007-10-16 2016-04-05 Seagate Technology Llc Prevent data storage device circuitry swap
CN101466205B (zh) 2007-12-19 2010-06-16 富葵精密组件(深圳)有限公司 电路板的制作方法
KR102042822B1 (ko) * 2012-09-24 2019-11-08 한국전자통신연구원 전자회로 및 그 제조방법
US10541403B2 (en) * 2016-10-14 2020-01-21 Tiveni Mergeco, Inc. Cylindrical battery cell configured with insulation component, and battery module containing the same
CN113473698B (zh) * 2021-07-15 2022-10-28 重庆御光新材料股份有限公司 一种可剥离线路板及其制造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3388457A (en) * 1966-05-31 1968-06-18 Ibm Interface resistance monitor
DE2246208A1 (de) * 1971-09-22 1973-03-29 Circuit Materials Division Dod Verfahren zur herstellung von gedruckten schaltungen
DE2716545A1 (de) * 1977-04-14 1978-10-19 Siemens Ag Gedruckte schaltungsplatte mit mindestens zwei verdrahtungslagen
JPS5797970U (es) * 1980-12-08 1982-06-16
JPS60137092A (ja) * 1983-12-19 1985-07-20 株式会社東芝 回路基板の製造方法
WO1987004315A1 (en) * 1985-12-28 1987-07-16 Nissha Printing Co., Ltd. Transfer material for printed circuit board and printed circuit board prepared using said transfer material and process for preparation thereof
JPS63246890A (ja) * 1987-04-02 1988-10-13 関西ペイント株式会社 プリント回路の形成方法

Also Published As

Publication number Publication date
EP0610360B1 (de) 1995-10-25
CN1072557A (zh) 1993-05-26
WO1993009655A1 (de) 1993-05-13
TW310520B (es) 1997-07-11
DE4135839A1 (de) 1993-05-06
KR940703126A (ko) 1994-09-17
JPH07503100A (ja) 1995-03-30
MY110786A (en) 1999-04-30
EP0610360A1 (de) 1994-08-17
DE59204152D1 (de) 1995-11-30
DK0610360T3 (da) 1996-02-05
US5560795A (en) 1996-10-01

Similar Documents

Publication Publication Date Title
ES2080522T3 (es) Procedimiento para la fabricacion de un circuito impreso, asi como circuito impreso.
ATE110167T1 (de) Flexibler taktischer sensor zum messen der druckverteilungen vom fuss und von dichtungen.
BR9706961A (pt) Montagem com camada múltipla de circuito impresso e método de fabricação para o mesmo
ES2177268T3 (es) Lamina de estampacion, en especial lamina de estampacion en caliente.
ES2104778T3 (es) Procedimiento para soldar y montar placas de circuitos impresos con componentes.
KR970076941A (ko) 좌표 입력 장치
CO5050414A1 (es) Laminado elastico, producto que lo contiene y metodo de produccion
EP1005086A3 (en) Metal foil having bumps, circuit substrate having the metal foil, and semiconductor device having the circuit substrate
NO20001367L (no) Preget laminat med hovedsakelig kontinuerlig klebemiddel- nettverk og preginger liggende mot dette
BR112021021218A2 (pt) Painel de exibição e aparelho de exibição compreendendo o mesmo
FR2872625B1 (fr) Assemblage par adhesion moleculaire de deux substrats, l'un au moins supportant un film conducteur electrique
MX171339B (es) Laminados co-extruidos que contienen interpolimeros de monoxido de carbono
TW200951538A (en) Flexible display module and method of manufacturing the same
SE8306874D0 (sv) Monsterkort
ES2192410T3 (es) Procedimiento para la produccion de tarjeta de circuito integrado.
BR0110878A (pt) Estrutura de múltiplas camadas, laminado de embalagem, métodos para produzir uma estrutura de múltiplas camadas e para produzir um laminado de embalagem, e, recipiente de embalagem
ES2069950T3 (es) Procedimento para establecer uniones electricamente conductoras en placas de circuitos impresos.
KR900019550A (ko) 인쇄 회로 기판 및 제조방법
SE8702118L (sv) Forglasningspaneler
TW200718299A (en) Wiring board, wiring material, copper-clad laminate, and wiring board fabrication method
ES2175812T3 (es) Conjunto de espejo decorativo.
BR9306894A (pt) Processo para a manufatura de uma placa de circuito impresso em multicamadas
KR860000711A (ko) 다층회로 기판과 그 제조방법
EP1965614A4 (en) PCB PLATE CONNECTOR STRUCTURE, PCB PLATE CONNECTOR AND ELECTRONIC DEVICE
JP2016045841A (ja) 入力装置およびその製造方法

Legal Events

Date Code Title Description
FG2A Definitive protection

Ref document number: 610360

Country of ref document: ES