ES2080724T3 - Sistema para generar una señal de sincronizacion. - Google Patents

Sistema para generar una señal de sincronizacion.

Info

Publication number
ES2080724T3
ES2080724T3 ES88307472T ES88307472T ES2080724T3 ES 2080724 T3 ES2080724 T3 ES 2080724T3 ES 88307472 T ES88307472 T ES 88307472T ES 88307472 T ES88307472 T ES 88307472T ES 2080724 T3 ES2080724 T3 ES 2080724T3
Authority
ES
Spain
Prior art keywords
phase
clock signal
signal
frequency
horizontal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES88307472T
Other languages
English (en)
Inventor
Kazuo Fukazawa
Toshio Kaneuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Licensing Corp
Original Assignee
RCA Licensing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=22184369&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ES2080724(T3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by RCA Licensing Corp filed Critical RCA Licensing Corp
Application granted granted Critical
Publication of ES2080724T3 publication Critical patent/ES2080724T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/20—Circuitry for controlling amplitude response
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/79—Processing of colour television signals in connection with recording
    • H04N9/80—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
    • H04N9/804—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/12—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
    • H04N5/126—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising whereby the synchronisation signal indirectly commands a frequency generator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/91—Television signal processing therefor
    • H04N5/93—Regeneration of the television signal or of selected parts thereof
    • H04N5/932—Regeneration of analogue synchronisation signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)
  • Processing Of Color Television Signals (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

UN RECEPTOR DE TELEVISION INCLUYE UN CIRCUITO DE BLOQUEO DE FASE (PLL) (226-232) QUE GENERA UNA SEÑAL DE RELOJ (CLK) QUE TIENE UNA FRECUENCIA N VECES LA FRECUENCIA DE LINEA Y QUE ESTA BLOQUEADA EN FASE A LA SEÑAL DE SINCRONIZACION DE LA LINEA HORIZONTAL (HSYNC). LA SEÑAL DE RELOJ PRODUCIDA POR ESTE CIRCUITO DE BLOQUEO DE FASE TIENE UNA FRECUENCIA QUE TIENDE A OSCILAR ENTRE N+1 Y N-1 VECES LA FRECUENCIA DE LINEA. PARA COMPENSAR ESTA OSCILACION EN LA FRECUENCIA DE LA SEÑAL DE RELOJ, UN CIRCUITO DE ALINEAMIENTO DE FASE (2,3,6) VA ACOPLADO AL CIRCUITO DE BLOQUEO DE FASE PARA ALINEAR LA FASE DE LA SEÑAL DE RELOJ A LA SEÑAL DE EXCITACION HORIZONTAL (HD) GENERADA POR DICHO CIRCUITO DE BLOQUEO DE FASE EN CADA IMPULSO DE EXCITACION HORIZONTAL. EL CIRCUITO DE BLOQUEO DE FASE PUEDE INCLUIR TAMBIEN UN RETARDADOR (2,3,4) QUE DEMORA LA SEÑAL DE EXCITACION HORIZONTAL APLICADA AL COMPARADOR DE FASE DEL CIRCUITO PLL. ESTE ELEMENTO RETARDADOR AVANZA LA FASE DE LA SEÑAL DE EXCITACION HORIZONTAL Y LA SEÑALDE RELOJ DE BLOQUEO DE LINEA RESPECTO A LA SEÑAL DE SINCRONIZAICON HORIZONTAL PARA COMPENSAR LAS DEMORAS EN EL PROCESAMIENTO DE SEÑALES QUE TIENE LUGAR EN LA GENERACION DE LA SEÑAL DE EXCITACION HORIZONTAL Y LA SEÑAL DE RELOJ.
ES88307472T 1987-08-12 1988-08-11 Sistema para generar una señal de sincronizacion. Expired - Lifetime ES2080724T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/084,346 US4791488A (en) 1987-08-12 1987-08-12 Line-locked clock signal generation system

Publications (1)

Publication Number Publication Date
ES2080724T3 true ES2080724T3 (es) 1996-02-16

Family

ID=22184369

Family Applications (1)

Application Number Title Priority Date Filing Date
ES88307472T Expired - Lifetime ES2080724T3 (es) 1987-08-12 1988-08-11 Sistema para generar una señal de sincronizacion.

Country Status (12)

Country Link
US (1) US4791488A (es)
EP (1) EP0303494B1 (es)
JP (1) JPS6481407A (es)
KR (1) KR0129532B1 (es)
CN (1) CN1013724B (es)
AT (1) ATE131670T1 (es)
AU (1) AU611696B2 (es)
CA (1) CA1260607A (es)
DE (1) DE3854772T2 (es)
ES (1) ES2080724T3 (es)
FI (1) FI94691C (es)
SG (1) SG44557A1 (es)

Families Citing this family (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0832059B2 (ja) * 1987-03-09 1996-03-27 株式会社日立製作所 ディジタルテレビジョン信号処理装置
JPH0793709B2 (ja) * 1987-09-30 1995-10-09 株式会社日立製作所 テレビジョン受像機
FR2625637B1 (fr) * 1988-01-04 1990-06-15 Sgs Thomson Microelectronics Circuit de reconnaissance d'un signal de magnetoscope
US5008659A (en) * 1988-02-08 1991-04-16 U.S. Philips Corporation Picture display device including a waveform generator/and a compensation circuit, and integrated circuit incorporating the same
JPH0773219B2 (ja) * 1988-06-16 1995-08-02 富士通株式会社 並直列変換装置
WO1990000789A1 (fr) * 1988-07-14 1990-01-25 Seiko Epson Corporation Circuit de traitement de signaux video
JPH02124637A (ja) * 1988-11-02 1990-05-11 Nec Corp 同期検出回路
JPH02211783A (ja) * 1989-02-13 1990-08-23 Toshiba Corp 音声多重信号エンコーダ回路
JP2566459B2 (ja) * 1989-05-08 1996-12-25 日本電気エンジニアリング株式会社 エラスティックバッファ回路
JPH037485A (ja) * 1989-06-05 1991-01-14 Mitsubishi Electric Corp サンプリングタイミング回路
US5001564A (en) * 1989-08-18 1991-03-19 Burle Technologies, Inc. Vertical phase adjust circuit
NL8902579A (nl) * 1989-10-18 1991-05-16 Philips Nv Schakeling in een beeldweergeefinrichting met een videosignaalverwerkingsschakeling en een lijnsynchroniseerschakeling.
US5018170A (en) * 1989-11-21 1991-05-21 Unisys Corporation Variable data rate clock synthesizer
US5223931A (en) * 1990-03-26 1993-06-29 Thomson Consumer Electronics, Inc. Synchronized scanning at horizontal frequency
US5329367A (en) * 1990-03-26 1994-07-12 Thomson Consumer Electronics, Inc. Horizontal blanking
KR0170630B1 (ko) * 1990-06-20 1999-03-20 강진구 휘도/색신호 전처리장치
DE59010510D1 (de) * 1990-06-30 1996-10-24 Itt Ind Gmbh Deutsche Digitale Phasenregelungsschleife
JPH0778774B2 (ja) * 1991-02-22 1995-08-23 インターナショナル・ビジネス・マシーンズ・コーポレイション 短待ち時間データ回復装置及びメッセージデータの同期化方法
US5267040A (en) * 1991-03-28 1993-11-30 Gossett C Philip Structure and method for detecting phase errors in the horizontal synchronization pulses of television signals
JPH0591485A (ja) * 1991-09-27 1993-04-09 Sanyo Electric Co Ltd クローズドキヤプシヨン放送受信装置
US5258877A (en) * 1992-04-16 1993-11-02 Vtc Inc. Data separator having a restart circuit
US5260842A (en) * 1992-04-16 1993-11-09 Vtc Inc. Data separator having an accurate delay circuit
JPH07306668A (ja) * 1994-03-31 1995-11-21 Hewlett Packard Co <Hp> クロック・スキューを最小限に抑えたドット・クロック発生
FR2720570B1 (fr) * 1994-05-24 1996-08-02 Thomson Consumer Electronics Convertisseur A/N de deux signaux analogiques utilisant un seul module convertisseur.
US5565928A (en) * 1994-06-10 1996-10-15 Thomson Consumer Electronics, Inc. Circuit for generating a scan at a multiple of a synchronizing signal
US5875218A (en) * 1995-03-31 1999-02-23 Unisys Corporation Variable rate clock for timing recovery and method therefor
JP3622270B2 (ja) * 1995-06-16 2005-02-23 セイコーエプソン株式会社 映像信号処理装置、情報処理システム及び映像信号処理方法
JP3356244B2 (ja) * 1995-06-26 2002-12-16 ローム株式会社 テレビジョン信号受信装置
EP0842578A4 (en) * 1995-08-01 1998-12-09 Auravision Corp ALIGNED TRANSITION VIDEO SIGNAL SYNCHRONIZATION SYSTEM
JP2836555B2 (ja) * 1995-12-15 1998-12-14 日本電気株式会社 Ｐｌｌ回路
JP3823420B2 (ja) * 1996-02-22 2006-09-20 セイコーエプソン株式会社 ドットクロック信号を調整するための方法及び装置
US5663992A (en) * 1996-03-14 1997-09-02 Trimble Navigation Limited Method and apparatus for correction of GPS carrier phase measurement
US6226045B1 (en) 1997-10-31 2001-05-01 Seagate Technology Llc Dot clock recovery method and apparatus
EP0966153B1 (en) * 1998-06-19 2001-02-14 Ikegami Tsushinki Co., Ltd. Video signal synchronizing apparatus
US6232905B1 (en) * 1999-03-08 2001-05-15 Agere Systems Guardian Corp. Clocking technique for reducing sampling noise in an analog-to-digital converter
US6310570B1 (en) * 1999-06-04 2001-10-30 Thomson Licensing S.A. System with adjustable ADC clock phase
US6943844B2 (en) * 2001-06-13 2005-09-13 Intel Corporation Adjusting pixel clock
KR100437378B1 (ko) * 2002-07-11 2004-06-25 삼성전자주식회사 디스플레이기기의 지터보정장치 및 그 방법
US7372929B2 (en) * 2003-03-05 2008-05-13 Broadcom Corporation Closed loop sub-carrier synchronization system
KR100543465B1 (ko) * 2003-08-04 2006-01-20 고려대학교 산학협력단 지연된 클록 신호를 발생하는 장치 및 방법
US7375562B2 (en) * 2005-03-25 2008-05-20 Faraday Technology Corp. Phase locked system for generating distributed clocks
JP4851118B2 (ja) * 2005-05-23 2012-01-11 ソニー株式会社 撮像システム，撮像制御装置，垂直同期方法およびプログラム
US7515666B2 (en) * 2005-07-29 2009-04-07 International Business Machines Corporation Method for dynamically changing the frequency of clock signals
JP4520380B2 (ja) * 2005-08-09 2010-08-04 株式会社リコー クロック生成回路
JP4943721B2 (ja) * 2006-03-20 2012-05-30 株式会社リコー 画像データのカラーノイズ除去方法及びこの方法を用いた撮像装置
CN102973377B (zh) * 2012-12-14 2013-10-16 丁恒生 医用临床输液无菌自动配药工作台
US9563227B2 (en) 2013-02-06 2017-02-07 Nvidia Corporation Approach to clock frequency modulation of a fixed frequency clock source
US20140218084A1 (en) * 2013-02-06 2014-08-07 Nvidia Corporation Approach to clock frequency modulation of a fixed frequency clock source
KR101710352B1 (ko) 2015-02-25 2017-02-27 이영숙 생강 절단장치
KR101710351B1 (ko) 2015-02-25 2017-03-08 이영숙 생강 절단장치
CN109765583B (zh) * 2019-03-04 2021-06-15 华通信安(北京)科技发展有限公司 一种基于gnss接收机秒脉冲的时钟同步方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3911368A (en) * 1974-06-20 1975-10-07 Tarczy Hornoch Zoltan Phase interpolating apparatus and method
NL183214C (nl) * 1980-01-31 1988-08-16 Philips Nv Inrichting voor het synchroniseren van de fase van een lokaal opgewekt kloksignaal met de fase van een ingangssignaal.
JPS56110392A (en) * 1980-02-06 1981-09-01 Hitachi Ltd Compensator for fluctuation of time axis
EP0059802B1 (de) * 1981-03-06 1984-08-08 Deutsche ITT Industries GmbH Integrierte Isolierschicht-Feldeffekttransistor-Verzögerungsschaltung für Digitalsignale und deren Verwendung in Farbfernsehempfängern
JPS6051312B2 (ja) * 1981-03-20 1985-11-13 日本ビクター株式会社 水平走査周波数逓倍回路
US4520401A (en) * 1982-04-16 1985-05-28 Victor Company Of Japan, Ltd. Digital video signal recording system and reproducing apparatus
US4617679A (en) * 1983-09-20 1986-10-14 Nec Electronics U.S.A., Inc. Digital phase lock loop circuit
JPS60170075A (ja) * 1984-02-14 1985-09-03 Sony Corp デイジタルビデオ信号処理装置
US4637018A (en) * 1984-08-29 1987-01-13 Burroughs Corporation Automatic signal delay adjustment method
EP0185779B1 (en) * 1984-12-21 1990-02-28 International Business Machines Corporation Digital phase locked loop
US4688081A (en) * 1985-01-25 1987-08-18 Hitachi, Ltd. Apparatus for correcting time base error of video signal
US4729024A (en) * 1985-03-19 1988-03-01 Canon Kabushiki Kaisha Synchronizing pulse signal generation device
JPS61230420A (ja) * 1985-04-04 1986-10-14 Mitsubishi Electric Corp 移相器
US4600895A (en) * 1985-04-26 1986-07-15 Minnesota Mining And Manufacturing Company Precision phase synchronization of free-running oscillator output signal to reference signal
JPS6277635A (ja) * 1985-10-01 1987-04-09 Seiko Instr & Electronics Ltd ビデオ信号サンプリングクロツク位相補正回路

Also Published As

Publication number Publication date
DE3854772D1 (de) 1996-01-25
AU1909488A (en) 1989-02-16
CA1260607A (en) 1989-09-26
FI883670A7 (fi) 1989-02-13
EP0303494A2 (en) 1989-02-15
KR0129532B1 (ko) 1998-04-10
US4791488A (en) 1988-12-13
FI94691B (fi) 1995-06-30
DE3854772T2 (de) 1996-09-05
JPS6481407A (en) 1989-03-27
FI94691C (fi) 1995-10-10
EP0303494A3 (en) 1990-07-18
ATE131670T1 (de) 1995-12-15
CN1031304A (zh) 1989-02-22
AU611696B2 (en) 1991-06-20
CN1013724B (zh) 1991-08-28
FI883670A0 (fi) 1988-08-05
SG44557A1 (en) 1997-12-19
EP0303494B1 (en) 1995-12-13
KR890004576A (ko) 1989-04-22

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