ES2084609T3 - Circuito de control automatico de frecuencia. - Google Patents

Circuito de control automatico de frecuencia.

Info

Publication number
ES2084609T3
ES2084609T3 ES90105039T ES90105039T ES2084609T3 ES 2084609 T3 ES2084609 T3 ES 2084609T3 ES 90105039 T ES90105039 T ES 90105039T ES 90105039 T ES90105039 T ES 90105039T ES 2084609 T3 ES2084609 T3 ES 2084609T3
Authority
ES
Spain
Prior art keywords
signal
phase
output
fixed state
divider
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES90105039T
Other languages
English (en)
Inventor
Hideo Satomi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Application granted granted Critical
Publication of ES2084609T3 publication Critical patent/ES2084609T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/199—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/191—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/91—Television signal processing therefor
    • H04N5/93—Regeneration of the television signal or of selected parts thereof
    • H04N5/932—Regeneration of analogue synchronisation signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/18—Temporarily disabling, deactivating or stopping the frequency counter or divider

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Television Signal Processing For Recording (AREA)
  • Synchronizing For Television (AREA)

Abstract

UN CIRCUITO AFC PARA USAR EN UN CIRCUITO PROCESADOR DE SEÑAL DE CROMINANCIA DE UN VTR, BASICAMENTE INCLUYE UN VCO (9), UN DIVISOR DE FRECUENCIA (10-13) PARA DIVIDIR LA FRECUENCIA EN UNA SALIDA DEL VCO, Y UN CIRCUITO COMPARADOR DE FASE (17) PARA COMPARAR LAS FASES DE LA SALIDA DEL DIVISOR Y UNA SEÑAL SINCRONIZADORA HORIZONTAL EXTRAIDA DE UNA SEÑAL DE VIDEO INTRODUCIDA PARA SUMINISTRAR UNA SALIDA ERRONEA DEL VCO. CUANDO UNA RELACION DE FASE ENTRE LA SALIDA DEL DIVISOR Y LA SEÑAL SINCRONIZADORA HORIZONTAL LLEGA A UN ESTADO FIJADO DE ERROR FUERA DEL ESTADO FIJADO DE FASE, UNA OPERACION DIVISORA DE FRECUENCIA ES PARADA EN UN TIEMPO CORRESPONDIENTE AL MARGEN DE ELEVACION DE UNA SEÑAL INTRODUCIDA NORMALMENTE EN UN ESTADO FIJADO DE FASE, Y LA OPERACION DIVISORA DE FRECUENCIA ES REINICIADA DESPUES DE QUE SE CUENTE (22) LA SEÑAL SINCRONIZADORA HORIZONTAL INTRODUCIDA POR UN NUMERO PREDETERMINADO. COMO RESULTADO, EL ESTADO FIJADO DE FASE DE LA SEÑAL SINCRONIZADORA HORIZONTAL INTRODUCIDA Y LA SEÑAL DESALIDA DEL DIVISOR (10-13) SON ENERGICAMENTE RESTAURADAS.
ES90105039T 1989-03-16 1990-03-16 Circuito de control automatico de frecuencia. Expired - Lifetime ES2084609T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1065528A JP2975607B2 (ja) 1989-03-16 1989-03-16 Ａｆｃ回路

Publications (1)

Publication Number Publication Date
ES2084609T3 true ES2084609T3 (es) 1996-05-16

Family

ID=13289603

Family Applications (1)

Application Number Title Priority Date Filing Date
ES90105039T Expired - Lifetime ES2084609T3 (es) 1989-03-16 1990-03-16 Circuito de control automatico de frecuencia.

Country Status (7)

Country Link
US (1) US5005079A (es)
EP (1) EP0389894B1 (es)
JP (1) JP2975607B2 (es)
KR (1) KR960016381B1 (es)
CA (1) CA2012280C (es)
DE (1) DE69024687T2 (es)
ES (1) ES2084609T3 (es)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5260812A (en) * 1991-11-26 1993-11-09 Eastman Kodak Company Clock recovery circuit
DE69216578D1 (de) * 1992-02-11 1997-02-20 Ibm Vorrichtung für Signalverarbeitung
GB2268656B (en) * 1992-07-03 1995-10-18 British Broadcasting Corp Synchronising signal separator
FR2704373B1 (fr) * 1993-04-20 1995-06-30 Bouvier Jacky Procede pour favoriser l'activation d'une boucle a verrouillage de phase et boucle correspondante.
US5418573A (en) * 1993-07-22 1995-05-23 Philips Electronics North America Corporation Apparatus and method for producing periodic synchronization references forming a synchronization signal
US5796392A (en) 1997-02-24 1998-08-18 Paradise Electronics, Inc. Method and apparatus for clock recovery in a digital display unit
JP3523069B2 (ja) * 1998-06-30 2004-04-26 株式会社東芝 遅延型位相同期回路
US20100226920A1 (en) * 2006-03-27 2010-09-09 Ablynx N.V. Medical delivery device for therapeutic proteins based on single domain antibodies
WO2018208553A1 (en) 2017-05-12 2018-11-15 Augusta University Research Institute, Inc. Human alpha fetoprotein-specific t cell receptors and uses thereof

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4092672A (en) * 1976-11-15 1978-05-30 Rca Corporation Master oscillator synchronizing system
DE2856211A1 (de) * 1978-12-27 1980-07-03 Licentia Gmbh Digitale phasenregelschaltung mit einer hilfsschaltung
DE2932049A1 (de) * 1979-08-07 1981-02-12 Rohde & Schwarz Frequenz- und phasengeregelter hochfrequenzoszillator
JPH0746770B2 (ja) * 1983-09-21 1995-05-17 ソニー株式会社 ビデオ信号の周波数変換回路
US4812783A (en) * 1986-08-26 1989-03-14 Matsushita Electric Industrial Co., Ltd. Phase locked loop circuit with quickly recoverable stability
US4843469A (en) * 1987-04-13 1989-06-27 The Grass Valley Group, Inc. Rapid signal acquisition and phase averaged horizontal timing from composite sync

Also Published As

Publication number Publication date
KR960016381B1 (ko) 1996-12-09
EP0389894B1 (en) 1996-01-10
JPH02244892A (ja) 1990-09-28
DE69024687T2 (de) 1996-09-19
CA2012280A1 (en) 1990-09-16
KR900015469A (ko) 1990-10-27
JP2975607B2 (ja) 1999-11-10
CA2012280C (en) 1999-08-31
DE69024687D1 (de) 1996-02-22
US5005079A (en) 1991-04-02
EP0389894A1 (en) 1990-10-03

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