ES2097109T3 - Procedimiento de control del estado de conduccion de un transistor mos. - Google Patents

Procedimiento de control del estado de conduccion de un transistor mos.

Info

Publication number
ES2097109T3
ES2097109T3 ES88401626T ES88401626T ES2097109T3 ES 2097109 T3 ES2097109 T3 ES 2097109T3 ES 88401626 T ES88401626 T ES 88401626T ES 88401626 T ES88401626 T ES 88401626T ES 2097109 T3 ES2097109 T3 ES 2097109T3
Authority
ES
Spain
Prior art keywords
conducting state
mos transistor
control procedure
mos
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES88401626T
Other languages
English (en)
Inventor
Alain Boudou
Marie-Francoise Bonnal
Martine Rouillon-Martin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SAS
Original Assignee
Bull SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SAS filed Critical Bull SAS
Application granted granted Critical
Publication of ES2097109T3 publication Critical patent/ES2097109T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/491—Antifuses, i.e. interconnections changeable from non-conductive to conductive
    • H10W20/492—Antifuses, i.e. interconnections changeable from non-conductive to conductive changeable by the use of an external beam, e.g. laser beam or ion beam

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

EL ESTADO DE CONDUCCION DE UN TRANSISTOR MOS 11 ESTA GOBERNADO DEFINITIVAMENTE POR UN HAZ LASER 21 FORMANDO ENTRE LA REJILLA 16 Y LA PARTE SUBYACENTE D DE LA REGION DEL EMISOR 14 O DEL COLECTOR 15, UNA CONEXION ELECTRICA 22. EL INVENTO SE APLICA ESPECIALMENTE A LA CORRECCION DE CIRCUITOS INTEGRADOS (RECONFIGURACION, REDUNDANCIA) Y EN LA PROGRAMACION DE LAS MEMORIAS MUERTAS INTEGRADAS.
ES88401626T 1987-07-02 1988-06-27 Procedimiento de control del estado de conduccion de un transistor mos. Expired - Lifetime ES2097109T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8709381A FR2617637B1 (fr) 1987-07-02 1987-07-02 Procede de commande de l'etat de conduction d'un transistor mos et circuit integre mettant en oeuvre le procede

Publications (1)

Publication Number Publication Date
ES2097109T3 true ES2097109T3 (es) 1997-04-01

Family

ID=9352793

Family Applications (1)

Application Number Title Priority Date Filing Date
ES88401626T Expired - Lifetime ES2097109T3 (es) 1987-07-02 1988-06-27 Procedimiento de control del estado de conduccion de un transistor mos.

Country Status (5)

Country Link
EP (1) EP0298829B1 (es)
JP (1) JPH0821635B2 (es)
DE (1) DE3855682D1 (es)
ES (1) ES2097109T3 (es)
FR (1) FR2617637B1 (es)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2659171A1 (fr) * 1990-03-02 1991-09-06 Thomson Csf Circuit electrique pour hyperfrequence comprenant une couche de polymere.
JP2587323B2 (ja) * 1990-12-25 1997-03-05 小糸工業株式会社 座席用ヘッドレスト
GB2270795B (en) * 1992-09-18 1995-02-15 Texas Instruments Ltd Improvements in or relating to the trimming of integrated circuits
US7668125B2 (en) 2003-09-09 2010-02-23 Qualcomm Incorporated Incremental redundancy transmission for multiple parallel channels in a MIMO communication system

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4952980A (es) * 1972-09-22 1974-05-23
US4387503A (en) * 1981-08-13 1983-06-14 Mostek Corporation Method for programming circuit elements in integrated circuits
US4583201A (en) * 1983-09-08 1986-04-15 International Business Machines Corporation Resistor personalized memory device using a resistive gate fet
JPS6146045A (ja) * 1984-08-10 1986-03-06 Hitachi Ltd 半導体装置
FR2601500B1 (fr) * 1986-07-11 1988-10-21 Bull Sa Procede de liaison programmable par laser de deux conducteurs superposes du reseau d'interconnexion d'un circuit integre, et circuit integre en resultant

Also Published As

Publication number Publication date
FR2617637A1 (fr) 1989-01-06
DE3855682D1 (de) 1997-01-09
EP0298829B1 (fr) 1996-11-27
FR2617637B1 (fr) 1989-10-27
JPS6435949A (en) 1989-02-07
EP0298829A1 (fr) 1989-01-11
JPH0821635B2 (ja) 1996-03-04

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