ES2098874T3 - Circuito integrado para tarjeta de memoria y proceso de cuenta atras de unidades en una tarjeta de memoria. - Google Patents

Circuito integrado para tarjeta de memoria y proceso de cuenta atras de unidades en una tarjeta de memoria.

Info

Publication number
ES2098874T3
ES2098874T3 ES94400709T ES94400709T ES2098874T3 ES 2098874 T3 ES2098874 T3 ES 2098874T3 ES 94400709 T ES94400709 T ES 94400709T ES 94400709 T ES94400709 T ES 94400709T ES 2098874 T3 ES2098874 T3 ES 2098874T3
Authority
ES
Spain
Prior art keywords
cell
memory
memory card
line
cells
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES94400709T
Other languages
English (en)
Inventor
Jacek Antoni Kowalski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gemplus SA
Original Assignee
Gemplus Card International SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card International SA filed Critical Gemplus Card International SA
Application granted granted Critical
Publication of ES2098874T3 publication Critical patent/ES2098874T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G11C16/105—Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement, i.e. preventing that old data is lost before new data is reliably written
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Read Only Memory (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

LA INVENCION SE REFIERE A TARJETAS DE MEMORIA DESTINADAS A DESCONTAR UN NUMERO DE UNIDADES POR PROGRAMACION SUCESIVA DE CELULAS DE MEMORIA NO VOLATIL ELECTRICAMENTE PROGRAMABLES Y ELECTRICAMENTE BORRABLES. LA MEMORIA SE ORGANIZA EN N LINEAS DE P CELULAS, SIENDO EL PESO DE LAS CELULAS DE UNA LINEA EN LA CUENTA P VECES EL PESO DE LA LINEA DE RANGO SIGUIENTE. EL PROCESO DE DESCUENTO ES RECURRENTE Y CONSISTE EN BUSCAR, BARRIENDO LA MEMORIA EN EL ORDEN DE LOS PESOS CRECIENTES, UNA CELULA BORRADA, EN PROGRAMAR ESTA CELULA Y UNA CELULA AUXILIAR INMEDIATAMENTE INFERIOR SALVO SI LA CELULA BORRADA SE SITUA EN LA PRIMERA LINEA, Y EN EMPEZAR ESTE PROCESO RECURRENTE HASTA ENCONTRAR UNA CELULA BORRADA EN LA PRIMERA LINEA. LA CELULA AUXILIAR PERMITE DETECTAR UNA INTERRUPCION ANORMAL DEL PROCESO RECURRENTE Y RESTABLECER LA CUENTA EXACTA DE LA MEMORIA, CUENTA QUE HA PODIDO SER FALSEADA POR ESTA INTERRUPCION ANORMAL.
ES94400709T 1993-04-01 1994-03-31 Circuito integrado para tarjeta de memoria y proceso de cuenta atras de unidades en una tarjeta de memoria. Expired - Lifetime ES2098874T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9303836A FR2703501B1 (fr) 1993-04-01 1993-04-01 Circuit intégré pour carte à mémoire et procédé de décomptage d'unités dans une carte à mémoire.

Publications (1)

Publication Number Publication Date
ES2098874T3 true ES2098874T3 (es) 1997-05-01

Family

ID=9445636

Family Applications (1)

Application Number Title Priority Date Filing Date
ES94400709T Expired - Lifetime ES2098874T3 (es) 1993-04-01 1994-03-31 Circuito integrado para tarjeta de memoria y proceso de cuenta atras de unidades en una tarjeta de memoria.

Country Status (6)

Country Link
US (2) US5473564A (es)
EP (1) EP0618591B1 (es)
JP (1) JP3613688B2 (es)
DE (1) DE69401291T2 (es)
ES (1) ES2098874T3 (es)
FR (1) FR2703501B1 (es)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100207968B1 (ko) * 1994-05-12 1999-07-15 니시무로 타이죠 불휘발성 반도체 메모리와 그 제조방법
US5640344A (en) * 1995-07-25 1997-06-17 Btr, Inc. Programmable non-volatile bidirectional switch for programmable logic
FR2739737B1 (fr) * 1995-10-09 1997-11-21 Inside Technologies Perfectionnements aux cartes a memoire
FR2739706B1 (fr) * 1995-10-09 1997-11-21 Inside Technologies Perfectionnements aux cartes a memoire
US5768208A (en) * 1996-06-18 1998-06-16 Microchip Technology Incorporated Fail safe non-volatile memory programming system and method therefor
GB2321734A (en) * 1997-01-30 1998-08-05 Motorola Inc Circuit and method of latching a bit line in a non-volatile memory
GB2321735A (en) * 1997-01-30 1998-08-05 Motorola Inc Circuit and method for sharing a latch between a bit line and an erase line in a non-volatile memory
GB2321738A (en) * 1997-01-30 1998-08-05 Motorola Inc Circuit and method of erasing a byte in a non-volatile memory
US5801991A (en) * 1997-03-31 1998-09-01 Intel Corporation Deselected word line that floats during MLC programming of a flash memory
US5812452A (en) * 1997-06-30 1998-09-22 Winbond Memory Laboratory Electrically byte-selectable and byte-alterable memory arrays
JPH1187658A (ja) * 1997-09-05 1999-03-30 Mitsubishi Electric Corp メモリセルおよびそれを備える不揮発性半導体記憶装置
FR2768256B1 (fr) * 1997-09-10 2001-01-19 Inside Technologies Procede d'enregistrement d'un mot binaire au moyen de cellules memoire du type programmable et effacable electriquement
DE19756895C2 (de) 1997-12-19 2000-11-09 Siemens Ag Verfahren zum sicheren Ändern eines in einem nicht-flüchtigen Speicher gespeicherten Wertes und Schaltungsanordnung hierzu
US5892704A (en) * 1998-03-31 1999-04-06 International Business Machines Corporation Wordline amplifier
DE19823955A1 (de) 1998-05-28 1999-12-02 Siemens Ag Verfahren und Anordnung zum Betreien eines mehrstufigen Zählers in einer Zählrichtung
WO2001039144A1 (de) 1999-11-29 2001-05-31 Infineon Technologies Ag Verfahren und anordnung zum betreiben eines mehrstufigen zählers in einer zählrichtung
US7299314B2 (en) 2003-12-31 2007-11-20 Sandisk Corporation Flash storage system with write/erase abort detection mechanism
JP2006294103A (ja) * 2005-04-07 2006-10-26 Matsushita Electric Ind Co Ltd 半導体記憶装置
US7624239B2 (en) * 2005-11-14 2009-11-24 Sandisk Corporation Methods for the management of erase operations in non-volatile memories
US7783845B2 (en) * 2005-11-14 2010-08-24 Sandisk Corporation Structures for the management of erase operations in non-volatile memories
US20080320253A1 (en) * 2007-06-19 2008-12-25 Andrew Tomlin Memory device with circuitry for writing data of an atomic transaction
US8266391B2 (en) * 2007-06-19 2012-09-11 SanDisk Technologies, Inc. Method for writing data of an atomic transaction to a memory device
US8775758B2 (en) * 2007-12-28 2014-07-08 Sandisk Technologies Inc. Memory device and method for performing a write-abort-safe firmware update
USD840030S1 (en) 2016-06-02 2019-02-05 Intarcia Therapeutics, Inc. Implant placement guide

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR321727A (fr) * 1902-06-03 1903-01-19 Low Paul Bandage de roue pour vélocipède
FR519847A (fr) * 1919-09-13 1921-06-16 Centrale Des Aciers Fenchelle Alliages d'acier rapide et leur méthode de fabrication
FR2609831B1 (fr) * 1987-01-16 1989-03-31 Thomson Semiconducteurs Circuit de lecture pour memoire
FR2610134B1 (fr) * 1987-01-27 1989-03-31 Thomson Semiconducteurs Circuit de lecture pour memoire
FR2613491B1 (fr) * 1987-04-03 1989-07-21 Thomson Csf Dispositif de detection du niveau haut d'une tension en technologie mos
FR2617979B1 (fr) * 1987-07-10 1989-11-10 Thomson Semiconducteurs Dispositif de detection de la depassivation d'un circuit integre
FR2617976B1 (fr) * 1987-07-10 1989-11-10 Thomson Semiconducteurs Detecteur electrique de niveau logique binaire
FR2618579B1 (fr) * 1987-07-21 1989-11-10 Thomson Semiconducteurs Circuit integre a memoire comportant un dispositif anti-fraude
FR2622019B1 (fr) * 1987-10-19 1990-02-09 Thomson Semiconducteurs Dispositif de test structurel d'un circuit integre
FR2622038B1 (fr) * 1987-10-19 1990-01-19 Thomson Semiconducteurs Procede de programmation des cellules memoire d'une memoire et circuit pour la mise en oeuvre de ce procede
FR2623018B1 (fr) * 1987-11-06 1990-02-09 Thomson Semiconducteurs Circuit integre protege contre les decharges electrostatiques avec seuil de protection variable
FR2623016B1 (fr) * 1987-11-06 1991-06-14 Thomson Semiconducteurs Dispositif de fusion d'un fusible dans un circuit integre de type cmos
ES2029710T3 (es) * 1987-12-17 1992-09-01 Siemens Aktiengesellschaft Procedimiento y circuito para la cancelacion protegida contra la manipulacion de memorias ee-prom.
FR2642543B1 (fr) * 1989-01-27 1991-04-05 Gemplus Card Int Dispositif de securite pour circuit integre
FR2649817B1 (fr) * 1989-07-13 1993-12-24 Gemplus Card International Carte a microcircuit protegee contre l'intrusion
JP2624864B2 (ja) * 1990-02-28 1997-06-25 株式会社東芝 不揮発性半導体メモリ
FR2667714A1 (fr) * 1990-10-09 1992-04-10 Gemplus Card Int Procede pour repartir la memoire d'un circuit integre entre plusieurs applications.
FR2673016B1 (fr) * 1991-02-19 1993-04-30 Gemplus Card Int Procede de protection d'un circuit integre contre les utilisations frauduleuses.
FR2673316B1 (fr) * 1991-02-22 1994-12-23 Gemplus Card Int Dispositif d'adressage sequentiel d'une memoire, notamment pour carte a memoire.
FR2678094B1 (fr) * 1991-06-20 1993-10-08 France Telecom Carte a memoire de comptage de donnees et appareil de lecture.
FR2681180B1 (fr) * 1991-09-05 1996-10-25 Gemplus Card Int Circuit de regulation de tension de programmation, pour memoires programmables.
FR2686997B1 (fr) * 1992-01-30 1994-04-01 Gemplus Card International Carte a puce a deux contacts et procede de communication avec un lecteur de carte.
US5414664A (en) * 1993-05-28 1995-05-09 Macronix International Co., Ltd. Flash EPROM with block erase flags for over-erase protection

Also Published As

Publication number Publication date
EP0618591B1 (fr) 1997-01-02
FR2703501A1 (fr) 1994-10-07
JP3613688B2 (ja) 2005-01-26
FR2703501B1 (fr) 1995-05-19
DE69401291T2 (de) 1997-05-15
US5576989A (en) 1996-11-19
JPH0714395A (ja) 1995-01-17
EP0618591A1 (fr) 1994-10-05
DE69401291D1 (de) 1997-02-13
US5473564A (en) 1995-12-05

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