ES2107236T3 - Dispositivo y procedimiento de prueba para un circuito integrado soldado con una placa. - Google Patents

Dispositivo y procedimiento de prueba para un circuito integrado soldado con una placa.

Info

Publication number
ES2107236T3
ES2107236T3 ES94919624T ES94919624T ES2107236T3 ES 2107236 T3 ES2107236 T3 ES 2107236T3 ES 94919624 T ES94919624 T ES 94919624T ES 94919624 T ES94919624 T ES 94919624T ES 2107236 T3 ES2107236 T3 ES 2107236T3
Authority
ES
Spain
Prior art keywords
collector
measured
transistor
current
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES94919624T
Other languages
English (en)
Inventor
Manfred Buks
Karim Hosseini
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ITA Ingenieurburo fur Testaufgaben GmbH
Original Assignee
ITA Ingenieurburo fur Testaufgaben GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ITA Ingenieurburo fur Testaufgaben GmbH filed Critical ITA Ingenieurburo fur Testaufgaben GmbH
Application granted granted Critical
Publication of ES2107236T3 publication Critical patent/ES2107236T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/66—Testing of connections, e.g. of plugs or non-disconnectable joints
    • G01R31/67—Testing the correctness of wire connections in electric apparatus or circuits

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

LA INVENCION SE REFIERE A UN DISPOSITIVO DE TEST Y A UN PROCEDIMIENTO PARA CHEQUEAR SI LOS PASADORES DE UN CIRCUITO INTEGRADO SOLDADO ESTAN CONECTADOS CORRECTAMENTE CON LAS VIAS DE CIRCUITO DE UNA PLETINA, MEDIANTE MEDICION DE TRANSISTORES PARASITARIOS EN LA CORRECCION DE LAS CORRIENTES DE COLECTOR MEDIDAS CON REFERENCIA A LOS TRANSISTORES ADICIONALES, QUE ESTAN DISPUESTOS EN PARALELO POR MEDIO DE UN DIODO EN CIRCUITOS INTEGRADOS CMOS, CON COLECTOR EN V{SUB, CC}.
ES94919624T 1993-06-15 1994-06-11 Dispositivo y procedimiento de prueba para un circuito integrado soldado con una placa. Expired - Lifetime ES2107236T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4319710A DE4319710C1 (de) 1993-06-15 1993-06-15 Testverfahren für einen auf einer Platine eingelöteten IC und Testvorrichtung zum Durchführen des Testverfahrens

Publications (1)

Publication Number Publication Date
ES2107236T3 true ES2107236T3 (es) 1997-11-16

Family

ID=6490332

Family Applications (1)

Application Number Title Priority Date Filing Date
ES94919624T Expired - Lifetime ES2107236T3 (es) 1993-06-15 1994-06-11 Dispositivo y procedimiento de prueba para un circuito integrado soldado con una placa.

Country Status (13)

Country Link
US (1) US6188235B1 (es)
EP (1) EP0705439B1 (es)
JP (1) JPH08511345A (es)
KR (1) KR960703232A (es)
CN (1) CN1044644C (es)
AT (1) ATE157776T1 (es)
AU (1) AU686639B2 (es)
CA (1) CA2164415A1 (es)
DE (2) DE4319710C1 (es)
DK (1) DK0705439T3 (es)
ES (1) ES2107236T3 (es)
TW (1) TW249843B (es)
WO (1) WO1994029738A1 (es)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6720774B2 (en) * 2002-07-29 2004-04-13 Sun Microsystems, Inc. Interchangeable fan control board with fault detection
GB2394780B (en) * 2002-10-29 2006-06-14 Ifr Ltd A method of and apparatus for testing for integrated circuit contact defects
KR100565326B1 (ko) * 2004-05-25 2006-03-30 엘지전자 주식회사 이동통신 단말기의 엘씨디 컨넥터 체크 장치
US7279907B2 (en) * 2006-02-28 2007-10-09 Freescale Semiconductor, Inc. Method of testing for power and ground continuity of a semiconductor device
DE102008020667A1 (de) * 2008-04-24 2010-05-20 Continental Automotive Gmbh Verfahren zur Fehlerüberwachung an einem Beleuchtungsausgang eines Kraftfahrzeuges
CN101571570B (zh) * 2008-04-29 2013-05-22 京元电子股份有限公司 集成电路连续性测试方法及集成电路接触电阻的测量方法
CN101825681B (zh) * 2010-04-29 2013-07-31 上海宏力半导体制造有限公司 一种双极型晶体管电流放大系数测量方法
RU173641U1 (ru) * 2017-03-27 2017-09-04 Закрытое акционерное общество "ГРУППА КРЕМНИЙ ЭЛ" Тестовый планарный p-n-p транзистор
CN107424549B (zh) * 2017-09-28 2020-04-17 京东方科技集团股份有限公司 阈值电压漂移的检测方法和装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4779043A (en) * 1987-08-26 1988-10-18 Hewlett-Packard Company Reversed IC test device and method
US5254953A (en) * 1990-12-20 1993-10-19 Hewlett-Packard Company Identification of pin-open faults by capacitive coupling through the integrated circuit package
US5124660A (en) * 1990-12-20 1992-06-23 Hewlett-Packard Company Identification of pin-open faults by capacitive coupling through the integrated circuit package
DE4110551C1 (es) * 1991-03-30 1992-07-23 Ita Ingenieurbuero Fuer Testaufgaben Gmbh, 2000 Hamburg, De
JP3157683B2 (ja) * 1994-08-30 2001-04-16 株式会社 沖マイクロデザイン 半導体集積回路の静止時電流測定法、半導体集積回路

Also Published As

Publication number Publication date
DE4319710C1 (de) 1994-09-29
KR960703232A (ko) 1996-06-19
DK0705439T3 (da) 1998-04-14
CN1044644C (zh) 1999-08-11
US6188235B1 (en) 2001-02-13
AU686639B2 (en) 1998-02-12
CA2164415A1 (en) 1994-12-22
TW249843B (es) 1995-06-21
ATE157776T1 (de) 1997-09-15
EP0705439B1 (de) 1997-09-03
CN1125482A (zh) 1996-06-26
JPH08511345A (ja) 1996-11-26
WO1994029738A1 (de) 1994-12-22
DE59403978D1 (de) 1997-10-09
EP0705439A1 (de) 1996-04-10
AU7071594A (en) 1995-01-03

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