ES2109764T3 - Disposicion de circuito para la eliminacion de parasitos de una secuencia de impulsos de señales de sincronizacion. - Google Patents

Disposicion de circuito para la eliminacion de parasitos de una secuencia de impulsos de señales de sincronizacion.

Info

Publication number
ES2109764T3
ES2109764T3 ES95113633T ES95113633T ES2109764T3 ES 2109764 T3 ES2109764 T3 ES 2109764T3 ES 95113633 T ES95113633 T ES 95113633T ES 95113633 T ES95113633 T ES 95113633T ES 2109764 T3 ES2109764 T3 ES 2109764T3
Authority
ES
Spain
Prior art keywords
circuit
sequence
parasites
elimination
synchronization signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES95113633T
Other languages
English (en)
Inventor
Gerhard Ing Grad Prey
Stefan Dipl-Ing Leitol
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Application granted granted Critical
Publication of ES2109764T3 publication Critical patent/ES2109764T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125—Discriminating pulses
    • H03K5/1252—Suppression or limitation of noise or interference

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Noise Elimination (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Networks Using Active Elements (AREA)
  • Details Of Television Scanning (AREA)
  • Selective Calling Equipment (AREA)
  • Catching Or Destruction (AREA)

Abstract

LA INVENCION SE REFIERE A UN CIRCUITO (G1, G2) DE APOYO, AL QUE SE GUIA UNA SUCESION (CLK) DE IMPULSOS DE INTERCALO Y QUE DISPONE DE UNA INTERCEPCION DE IMPULSO Y SE ELABORA EN EL SALTO DE POTENCIAL QUE APARECE EN EL EXTREMO DEL IMPULSO DE FORMA INDEPENDIENTE DE SU ALTURA REAL EN LA ALTURA DE AMPLITUD DE IMPULSO EN LA SALIDA DEL CIRCUITO. EL VALOR DE POTENCIAL OBTENIDO SE MANTIENE INDEPENDIENTE DE OTRO DESARROLLO DE POTENCIAL EN LA ENTRADA PARA UN TENSION DE TIEMPO DETERMINADA POR MEDIO DE UN MIEMBRO (VZ) DE RETARDO, HASTA LA ATENUACION EVENTUAL DE LAS PERTURBACIONES.
ES95113633T 1994-09-23 1995-08-30 Disposicion de circuito para la eliminacion de parasitos de una secuencia de impulsos de señales de sincronizacion. Expired - Lifetime ES2109764T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4434084A DE4434084C1 (de) 1994-09-23 1994-09-23 Schaltungsanordnung zur Störbefreiung einer Taktsignalimpulsfolge

Publications (1)

Publication Number Publication Date
ES2109764T3 true ES2109764T3 (es) 1998-01-16

Family

ID=6529052

Family Applications (1)

Application Number Title Priority Date Filing Date
ES95113633T Expired - Lifetime ES2109764T3 (es) 1994-09-23 1995-08-30 Disposicion de circuito para la eliminacion de parasitos de una secuencia de impulsos de señales de sincronizacion.

Country Status (6)

Country Link
EP (1) EP0704787B1 (es)
AT (1) ATE160231T1 (es)
DE (2) DE4434084C1 (es)
DK (1) DK0704787T3 (es)
ES (1) ES2109764T3 (es)
GR (1) GR3025434T3 (es)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10164806B4 (de) * 2000-09-29 2005-03-31 Agilent Technologies, Inc. (n.d.Ges.d.Staates Delaware), Palo Alto Polaritätsausblendverzögerungsschaltung zum Ausblenden von Ausgleichsvorgängen

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0309849A1 (de) * 1987-09-28 1989-04-05 Siemens Aktiengesellschaft Anordnung zur Entzerrung der Impulsbreiten eines Digitalsignals
US4988892A (en) * 1989-06-02 1991-01-29 Atari Corporation Method and circuit for generating dependent clock signals
JPH03224020A (ja) * 1990-01-30 1991-10-03 Fujitsu Ltd クロック受信回路

Also Published As

Publication number Publication date
GR3025434T3 (en) 1998-02-27
ATE160231T1 (de) 1997-11-15
EP0704787A1 (de) 1996-04-03
DK0704787T3 (da) 1998-07-27
EP0704787B1 (de) 1997-11-12
DE59500979D1 (de) 1997-12-18
DE4434084C1 (de) 1996-01-25

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