ES2171948T3 - Procedimiento para la fabricacion de un elemento de soporte para chips semiconductores. - Google Patents

Procedimiento para la fabricacion de un elemento de soporte para chips semiconductores.

Info

Publication number
ES2171948T3
ES2171948T3 ES97925908T ES97925908T ES2171948T3 ES 2171948 T3 ES2171948 T3 ES 2171948T3 ES 97925908 T ES97925908 T ES 97925908T ES 97925908 T ES97925908 T ES 97925908T ES 2171948 T3 ES2171948 T3 ES 2171948T3
Authority
ES
Spain
Prior art keywords
chip
support element
semi
procedure
manufacture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES97925908T
Other languages
English (en)
Inventor
Michael Huber
Peter Stampka
Detlef Houdeau
Jurgen Fischer
Josef Heitzer
Helmut Graf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19623826A external-priority patent/DE19623826C2/de
Priority claimed from DE29621837U external-priority patent/DE29621837U1/de
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of ES2171948T3 publication Critical patent/ES2171948T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/688—Flexible insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/699—Insulating or insulated package substrates; Interposers; Redistribution layers for flat cards, e.g. credit cards
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
    • H10W76/42—Fillings
    • H10W76/47—Solid or gel fillings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07352—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in structures or sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Light Receiving Elements (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Turning (AREA)
  • Wire Bonding (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Die Bonding (AREA)

Abstract

ELEMENTO SOPORTE PARA UN CHIP (23) SEMICONDUCTOR, ESPECIALMENTE PARA MONTAJE EN TARJETAS DE CHIP, CON UN SUBSTRATO (15) QUE SOPORTA EL CHIP (23) Y UNA LAMINA (109 DE REFUERZO LAMINADA SOBRE LA CARA DEL SUBSTRATO (15) QUE PORTA EL CHIP (23). LA LAMINA (10) DE REFUERZO TIENE UNA CAVIDAD (14) PARA LA RECEPCION DEL CHIP (23) Y SUS CONDUCCIONES (24) DE CONEXION, CUYO BORDE ESTA PROVISTO CON UN MARCO (12) QUE FORMA UNA PIEZA INDIVIDUAL CON LA LAMINA (10).
ES97925908T 1996-06-14 1997-06-10 Procedimiento para la fabricacion de un elemento de soporte para chips semiconductores. Expired - Lifetime ES2171948T3 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19623826A DE19623826C2 (de) 1996-06-14 1996-06-14 Verfahren zur Herstellung eines Trägerelements für Halbleiterchips
DE29621837U DE29621837U1 (de) 1996-12-16 1996-12-16 Trägerelement für Halbleiterchips

Publications (1)

Publication Number Publication Date
ES2171948T3 true ES2171948T3 (es) 2002-09-16

Family

ID=26026591

Family Applications (1)

Application Number Title Priority Date Filing Date
ES97925908T Expired - Lifetime ES2171948T3 (es) 1996-06-14 1997-06-10 Procedimiento para la fabricacion de un elemento de soporte para chips semiconductores.

Country Status (11)

Country Link
EP (1) EP0904602B1 (es)
JP (1) JP3498800B2 (es)
CN (1) CN1156002C (es)
AT (1) ATE212752T1 (es)
BR (1) BR9709717A (es)
DE (1) DE59706247D1 (es)
ES (1) ES2171948T3 (es)
IN (1) IN192422B (es)
RU (1) RU2191446C2 (es)
UA (1) UA42106C2 (es)
WO (1) WO1997048133A1 (es)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2790850B1 (fr) * 1999-03-12 2004-02-27 Gemplus Card Int Procede de fabrication de dispositif electronique portable de type carte a puce
JP3314304B2 (ja) 1999-06-07 2002-08-12 アムコー テクノロジー コリア インコーポレーティド 半導体パッケージ用の回路基板
WO2004079822A1 (en) * 2003-03-07 2004-09-16 Koninklijke Philips Electronics N.V. Semiconductor device, semiconductor body and method of manufacturing thereof
CN102144291B (zh) * 2008-11-17 2015-11-25 先进封装技术私人有限公司 半导体基板、封装与装置
TWI421982B (zh) * 2008-11-21 2014-01-01 先進封裝技術私人有限公司 半導體導線元件及其製造方法
FR2974969B1 (fr) * 2011-05-03 2014-03-14 Alstom Transport Sa Dispositif d'interconnexion electrique d'au moins un composant electronique avec une alimentation electrique comprenant des moyens de diminution d'une inductance de boucle entre des premiere et deuxieme bornes
US20140239428A1 (en) * 2013-02-28 2014-08-28 Infineon Technologies Ag Chip arrangement and a method for manufacturing a chip arrangement

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61204788A (ja) * 1985-03-08 1986-09-10 Dainippon Printing Co Ltd 携持用電子装置
FR2645680B1 (fr) * 1989-04-07 1994-04-29 Thomson Microelectronics Sa Sg Encapsulation de modules electroniques et procede de fabrication
DE3924439A1 (de) * 1989-07-24 1991-04-18 Edgar Schneider Traegerelement mit wenigstens einem integrierten schaltkreis, insbesondere zum einbau in chip-karten, sowie verfahren zur herstellung dieser traegerelemente

Also Published As

Publication number Publication date
JP3498800B2 (ja) 2004-02-16
IN192422B (es) 2004-04-24
BR9709717A (pt) 1999-08-10
WO1997048133A1 (de) 1997-12-18
RU2191446C2 (ru) 2002-10-20
EP0904602A1 (de) 1999-03-31
EP0904602B1 (de) 2002-01-30
ATE212752T1 (de) 2002-02-15
CN1222253A (zh) 1999-07-07
UA42106C2 (uk) 2001-10-15
CN1156002C (zh) 2004-06-30
DE59706247D1 (de) 2002-03-14
JP2000512045A (ja) 2000-09-12

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