FR1479917A - Dispositif semi-conducteur - Google Patents
Dispositif semi-conducteurInfo
- Publication number
- FR1479917A FR1479917A FR7800A FR06007800A FR1479917A FR 1479917 A FR1479917 A FR 1479917A FR 7800 A FR7800 A FR 7800A FR 06007800 A FR06007800 A FR 06007800A FR 1479917 A FR1479917 A FR 1479917A
- Authority
- FR
- France
- Prior art keywords
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6302—Non-deposition formation processes
- H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
- H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
- H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
- H10P14/6309—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6302—Non-deposition formation processes
- H10P14/6322—Formation by thermal treatments
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/018—Manufacture or treatment of isolation regions comprising dielectric materials using selective deposition of crystalline silicon, e.g. using epitaxial growth of silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W15/00—Highly-doped buried regions of integrated devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W15/00—Highly-doped buried regions of integrated devices
- H10W15/01—Manufacture or treatment
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/049—Equivalence and options
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US454374A US3386865A (en) | 1965-05-10 | 1965-05-10 | Process of making planar semiconductor devices isolated by encapsulating oxide filled channels |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| FR1479917A true FR1479917A (fr) | 1967-05-05 |
Family
ID=23804355
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7800A Expired FR1479917A (fr) | 1965-05-10 | 1966-05-02 | Dispositif semi-conducteur |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US3386865A (fr) |
| FR (1) | FR1479917A (fr) |
| GB (1) | GB1116209A (fr) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2098322A1 (fr) * | 1970-07-10 | 1972-03-10 | Philips Nv | |
| FR2098323A2 (fr) * | 1966-10-05 | 1972-03-10 | Philips Nv |
Families Citing this family (62)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3370995A (en) * | 1965-08-02 | 1968-02-27 | Texas Instruments Inc | Method for fabricating electrically isolated semiconductor devices in integrated circuits |
| US7038290B1 (en) | 1965-09-28 | 2006-05-02 | Li Chou H | Integrated circuit device |
| US5696402A (en) * | 1965-09-28 | 1997-12-09 | Li; Chou H. | Integrated circuit device |
| US4946800A (en) * | 1965-09-28 | 1990-08-07 | Li Chou H | Method for making solid-state device utilizing isolation grooves |
| US4916513A (en) * | 1965-09-28 | 1990-04-10 | Li Chou H | Dielectrically isolated integrated circuit structure |
| US6849918B1 (en) | 1965-09-28 | 2005-02-01 | Chou H. Li | Miniaturized dielectrically isolated solid state device |
| NL159817B (nl) * | 1966-10-05 | 1979-03-15 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
| NL7010208A (fr) * | 1966-10-05 | 1972-01-12 | Philips Nv | |
| USRE28653E (en) * | 1968-04-23 | 1975-12-16 | Method of fabricating semiconductor devices | |
| GB1280022A (en) * | 1968-08-30 | 1972-07-05 | Mullard Ltd | Improvements in and relating to semiconductor devices |
| CA920281A (en) * | 1970-02-19 | 1973-01-30 | N.V. Philips Gloeilampenfabrieken | Method of manufacturing a semiconductor device and semiconductor device obtained by using the method |
| NL170902C (nl) * | 1970-07-10 | 1983-01-03 | Philips Nv | Halfgeleiderinrichting, in het bijzonder monolithische geintegreerde halfgeleiderschakeling. |
| NL170348C (nl) * | 1970-07-10 | 1982-10-18 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een tegen dotering en tegen thermische oxydatie maskerend masker wordt aangebracht, de door de vensters in het masker vrijgelaten delen van het oppervlak worden onderworpen aan een etsbehandeling voor het vormen van verdiepingen en het halfgeleiderlichaam met het masker wordt onderworpen aan een thermische oxydatiebehandeling voor het vormen van een oxydepatroon dat de verdiepingen althans ten dele opvult. |
| NL169936C (nl) * | 1970-07-10 | 1982-09-01 | Philips Nv | Halfgeleiderinrichting omvattende een halfgeleiderlichaam met een althans ten dele in het halfgeleiderlichaam verzonken oxydepatroon. |
| FR2098325B1 (fr) * | 1970-07-10 | 1977-04-22 | Philips Nv | |
| CH542517A (de) * | 1970-07-10 | 1973-09-30 | Philips Nv | Halbleitervorrichtung mit einem Transistor und Verfahren zur Herstellung der Halbleitervorrichtung |
| US3648125A (en) * | 1971-02-02 | 1972-03-07 | Fairchild Camera Instr Co | Method of fabricating integrated circuits with oxidized isolation and the resulting structure |
| NL173110C (nl) * | 1971-03-17 | 1983-12-01 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht. |
| NL170901C (nl) * | 1971-04-03 | 1983-01-03 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting. |
| NL166156C (nl) * | 1971-05-22 | 1981-06-15 | Philips Nv | Halfgeleiderinrichting bevattende ten minste een op een halfgeleidersubstraatlichaam aangebrachte halfge- leiderlaag met ten minste een isolatiezone, welke een in de halfgeleiderlaag verzonken isolatielaag uit door plaatselijke thermische oxydatie van het half- geleidermateriaal van de halfgeleiderlaag gevormd isolerend materiaal bevat en een werkwijze voor het vervaardigen daarvan. |
| US3947299A (en) * | 1971-05-22 | 1976-03-30 | U.S. Philips Corporation | Method of manufacturing semiconductor devices |
| US4965652A (en) * | 1971-06-07 | 1990-10-23 | International Business Machines Corporation | Dielectric isolation for high density semiconductor devices |
| US4396933A (en) * | 1971-06-18 | 1983-08-02 | International Business Machines Corporation | Dielectrically isolated semiconductor devices |
| US3928091A (en) * | 1971-09-27 | 1975-12-23 | Hitachi Ltd | Method for manufacturing a semiconductor device utilizing selective oxidation |
| JPS4852182A (fr) * | 1971-10-29 | 1973-07-21 | ||
| US3859127A (en) * | 1972-01-24 | 1975-01-07 | Motorola Inc | Method and material for passivating the junctions of mesa type semiconductor devices |
| US3828232A (en) * | 1972-02-28 | 1974-08-06 | Tokyo Shibaura Electric Co | Semiconductor target |
| US3861968A (en) * | 1972-06-19 | 1975-01-21 | Ibm | Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition |
| US3784847A (en) * | 1972-10-10 | 1974-01-08 | Gen Electric | Dielectric strip isolation for jfet or mesfet depletion-mode bucket-brigade circuit |
| JPS5624370B2 (fr) * | 1973-06-04 | 1981-06-05 | ||
| US4047195A (en) * | 1973-11-12 | 1977-09-06 | Scientific Micro Systems, Inc. | Semiconductor structure |
| US3986200A (en) * | 1974-01-02 | 1976-10-12 | Signetics Corporation | Semiconductor structure and method |
| US3883948A (en) * | 1974-01-02 | 1975-05-20 | Signetics Corp | Semiconductor structure and method |
| US3913124A (en) * | 1974-01-03 | 1975-10-14 | Motorola Inc | Integrated semiconductor transistor structure with epitaxial contact to the buried sub-collector including fabrication method therefor |
| US3919060A (en) * | 1974-06-14 | 1975-11-11 | Ibm | Method of fabricating semiconductor device embodying dielectric isolation |
| US3998673A (en) * | 1974-08-16 | 1976-12-21 | Pel Chow | Method for forming electrically-isolated regions in integrated circuits utilizing selective epitaxial growth |
| JPS5146083A (en) * | 1974-10-18 | 1976-04-20 | Hitachi Ltd | Handotaisochino seizohoho |
| US3962717A (en) * | 1974-10-29 | 1976-06-08 | Fairchild Camera And Instrument Corporation | Oxide isolated integrated injection logic with selective guard ring |
| US4005452A (en) * | 1974-11-15 | 1977-01-25 | International Telephone And Telegraph Corporation | Method for providing electrical isolating material in selected regions of a semiconductive material and the product produced thereby |
| JPS51135385A (en) * | 1975-03-06 | 1976-11-24 | Texas Instruments Inc | Method of producing semiconductor device |
| US3954523A (en) * | 1975-04-14 | 1976-05-04 | International Business Machines Corporation | Process for fabricating devices having dielectric isolation utilizing anodic treatment and selective oxidation |
| US3972754A (en) * | 1975-05-30 | 1976-08-03 | Ibm Corporation | Method for forming dielectric isolation in integrated circuits |
| US4542579A (en) * | 1975-06-30 | 1985-09-24 | International Business Machines Corporation | Method for forming aluminum oxide dielectric isolation in integrated circuits |
| JPS5518047B1 (fr) * | 1975-11-10 | 1980-05-16 | ||
| FR2341201A1 (fr) * | 1976-02-16 | 1977-09-09 | Radiotechnique Compelec | Procede d'isolement entre regions d'un dispositif semiconducteur et dispositif ainsi obtenu |
| US4198649A (en) * | 1976-09-03 | 1980-04-15 | Fairchild Camera And Instrument Corporation | Memory cell structure utilizing conductive buried regions |
| US4064527A (en) * | 1976-09-20 | 1977-12-20 | Intersil, Inc. | Integrated circuit having a buried load device |
| JPS5534619U (fr) * | 1978-08-25 | 1980-03-06 | ||
| JPS55130176A (en) * | 1979-03-30 | 1980-10-08 | Hitachi Ltd | Field effect semiconductor element and method of fabricating the same |
| US4231819A (en) * | 1979-07-27 | 1980-11-04 | Massachusetts Institute Of Technology | Dielectric isolation method using shallow oxide and polycrystalline silicon utilizing a preliminary etching step |
| US4283235A (en) * | 1979-07-27 | 1981-08-11 | Massachusetts Institute Of Technology | Dielectric isolation using shallow oxide and polycrystalline silicon utilizing selective oxidation |
| JPS5977776A (ja) * | 1982-10-25 | 1984-05-04 | Mitsubishi Electric Corp | 固体撮像素子 |
| US4658497A (en) * | 1983-01-03 | 1987-04-21 | Rca Corporation | Method of making an imaging array having a higher sensitivity |
| US4612701A (en) * | 1984-03-12 | 1986-09-23 | Harris Corporation | Method to reduce the height of the bird's head in oxide isolated processes |
| JPH0671043B2 (ja) * | 1984-08-31 | 1994-09-07 | 株式会社東芝 | シリコン結晶体構造の製造方法 |
| US4628591A (en) * | 1984-10-31 | 1986-12-16 | Texas Instruments Incorporated | Method for obtaining full oxide isolation of epitaxial islands in silicon utilizing selective oxidation of porous silicon |
| US4692992A (en) * | 1986-06-25 | 1987-09-15 | Rca Corporation | Method of forming isolation regions in a semiconductor device |
| US20040144999A1 (en) * | 1995-06-07 | 2004-07-29 | Li Chou H. | Integrated circuit device |
| US5883566A (en) * | 1997-02-24 | 1999-03-16 | International Business Machines Corporation | Noise-isolated buried resistor |
| US6177333B1 (en) * | 1999-01-14 | 2001-01-23 | Micron Technology, Inc. | Method for making a trench isolation for semiconductor devices |
| JP4610982B2 (ja) * | 2003-11-11 | 2011-01-12 | シャープ株式会社 | 半導体装置の製造方法 |
| US7691734B2 (en) * | 2007-03-01 | 2010-04-06 | International Business Machines Corporation | Deep trench based far subcollector reachthrough |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL286507A (fr) * | 1961-12-11 | |||
| US3265542A (en) * | 1962-03-15 | 1966-08-09 | Philco Corp | Semiconductor device and method for the fabrication thereof |
| US3234058A (en) * | 1962-06-27 | 1966-02-08 | Ibm | Method of forming an integral masking fixture by epitaxial growth |
| US3296040A (en) * | 1962-08-17 | 1967-01-03 | Fairchild Camera Instr Co | Epitaxially growing layers of semiconductor through openings in oxide mask |
| GB1047388A (fr) * | 1962-10-05 | |||
| US3206339A (en) * | 1963-09-30 | 1965-09-14 | Philco Corp | Method of growing geometricallydefined epitaxial layer without formation of undesirable crystallites |
| GB1095413A (fr) * | 1964-12-24 | |||
| US3343255A (en) * | 1965-06-14 | 1967-09-26 | Westinghouse Electric Corp | Structures for semiconductor integrated circuits and methods of forming them |
-
1965
- 1965-05-10 US US454374A patent/US3386865A/en not_active Expired - Lifetime
-
1966
- 1966-05-02 FR FR7800A patent/FR1479917A/fr not_active Expired
- 1966-05-02 GB GB19178/66A patent/GB1116209A/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2098323A2 (fr) * | 1966-10-05 | 1972-03-10 | Philips Nv | |
| FR2098322A1 (fr) * | 1970-07-10 | 1972-03-10 | Philips Nv |
Also Published As
| Publication number | Publication date |
|---|---|
| US3386865A (en) | 1968-06-04 |
| GB1116209A (en) | 1968-06-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| FR1516424A (fr) | Dispositif semi-conducteur | |
| FR1505959A (fr) | Dispositif semi-conducteur | |
| FR1475436A (fr) | Dispositif semi-conducteur | |
| AT263084B (de) | Halbleitervorrichtung | |
| CH474851A (de) | Halbleiteranordnung | |
| FR1505701A (fr) | Dispositif semi-conducteur | |
| FR1473738A (fr) | Dispositif à semi-conducteurs | |
| AT264589B (de) | Halbleiteranordnung | |
| AT269217B (de) | Halbleitervorrichtung | |
| CH437539A (de) | Halbleiteranordnung | |
| FR1517751A (fr) | Dispositif semi-conducteur | |
| FR1489272A (fr) | Dispositif semi-conducteur | |
| FR1486215A (fr) | Dispositif à semi-conducteur | |
| AT273227B (de) | Halbleitervorrichtung | |
| AT254987B (de) | Halbleiteranordnung | |
| CH443492A (de) | Halbleiteranordnung | |
| FR1519530A (fr) | Dispositif semi-conducteur | |
| FR1546644A (fr) | Dispositif semi-conducteur | |
| FR1518374A (fr) | Dispositif semi-conducteur | |
| FR1471729A (fr) | Dispositif semi-conducteur | |
| FR1470898A (fr) | Dispositif semi-conducteur | |
| FR1493348A (fr) | Dispositif semi-conducteur métla-oxyde | |
| FR1475243A (fr) | Dispositif semiconducteur | |
| FR1504181A (fr) | Dispositif semi-conducteur | |
| FR1471292A (fr) | Dispositif semi-conducteur perfectionné |