FR2272486A1 - - Google Patents
Info
- Publication number
- FR2272486A1 FR2272486A1 FR7515787A FR7515787A FR2272486A1 FR 2272486 A1 FR2272486 A1 FR 2272486A1 FR 7515787 A FR7515787 A FR 7515787A FR 7515787 A FR7515787 A FR 7515787A FR 2272486 A1 FR2272486 A1 FR 2272486A1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01326—Aspects related to lithography, isolation or planarisation of the conductor
- H10D64/0133—Aspects related to lithography, isolation or planarisation of the conductor at least part of the entire electrode being a sidewall spacer, being formed by transformation under a mask or being formed by plating at a sidewall
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/30—Diffusion for doping of conductive or resistive layers
- H10P32/302—Doping polycrystalline silicon or amorphous silicon layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/60—Wet etching
- H10P50/66—Wet etching of conductive or resistive materials
- H10P50/663—Wet etching of conductive or resistive materials by chemical means only
- H10P50/667—Wet etching of conductive or resistive materials by chemical means only by liquid etching only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB2258374A GB1477511A (en) | 1974-05-21 | 1974-05-21 | Methods of manufacturing semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2272486A1 true FR2272486A1 (2) | 1975-12-19 |
| FR2272486B1 FR2272486B1 (2) | 1979-01-19 |
Family
ID=10181779
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7515787A Expired FR2272486B1 (2) | 1974-05-21 | 1975-05-21 |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPS5617826B2 (2) |
| CA (1) | CA1040749A (2) |
| DE (1) | DE2522448A1 (2) |
| FR (1) | FR2272486B1 (2) |
| GB (1) | GB1477511A (2) |
| NL (1) | NL7505698A (2) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2341200A1 (fr) * | 1976-02-10 | 1977-09-09 | Intel Corp | Procede de formation d'une interconnexion a faible resistance dans des circuits integres mos a grilles en silicium et a canaux n |
| FR2475293A1 (fr) * | 1980-02-04 | 1981-08-07 | Fairchild Camera Instr Co | Procede de fabrication de transistor bipolaire lateral auto-aligne |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS598855Y2 (ja) * | 1978-09-01 | 1984-03-19 | 大阪電気株式会社 | ワイヤ送給装置 |
| JPS5546570A (en) * | 1978-09-30 | 1980-04-01 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Method of fabricating mos semiconductor device |
| JPS6070401U (ja) * | 1983-10-24 | 1985-05-18 | 株式会社月星製作所 | 車輪用スポ−ク |
| CN105824160B (zh) * | 2015-01-08 | 2020-06-16 | 群创光电股份有限公司 | 显示面板 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5542501B2 (2) * | 1974-01-29 | 1980-10-31 |
-
1974
- 1974-05-21 GB GB2258374A patent/GB1477511A/en not_active Expired
-
1975
- 1975-05-15 CA CA227,266A patent/CA1040749A/en not_active Expired
- 1975-05-15 NL NL7505698A patent/NL7505698A/xx not_active Application Discontinuation
- 1975-05-21 DE DE19752522448 patent/DE2522448A1/de not_active Withdrawn
- 1975-05-21 JP JP5979875A patent/JPS5617826B2/ja not_active Expired
- 1975-05-21 FR FR7515787A patent/FR2272486B1/fr not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2341200A1 (fr) * | 1976-02-10 | 1977-09-09 | Intel Corp | Procede de formation d'une interconnexion a faible resistance dans des circuits integres mos a grilles en silicium et a canaux n |
| FR2475293A1 (fr) * | 1980-02-04 | 1981-08-07 | Fairchild Camera Instr Co | Procede de fabrication de transistor bipolaire lateral auto-aligne |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS51282A (2) | 1976-01-05 |
| DE2522448A1 (de) | 1975-12-04 |
| FR2272486B1 (2) | 1979-01-19 |
| GB1477511A (en) | 1977-06-22 |
| CA1040749A (en) | 1978-10-17 |
| NL7505698A (nl) | 1975-11-25 |
| JPS5617826B2 (2) | 1981-04-24 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |