FR2378331A1 - Unite de memoire - Google Patents

Unite de memoire

Info

Publication number
FR2378331A1
FR2378331A1 FR7801826A FR7801826A FR2378331A1 FR 2378331 A1 FR2378331 A1 FR 2378331A1 FR 7801826 A FR7801826 A FR 7801826A FR 7801826 A FR7801826 A FR 7801826A FR 2378331 A1 FR2378331 A1 FR 2378331A1
Authority
FR
France
Prior art keywords
capacitor
transistor
scale integrated
memory unit
large number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7801826A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Inc
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of FR2378331A1 publication Critical patent/FR2378331A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

L'invention concerne une unité de mémoire. Une cellule de mémoire comprenant un transistor unique et une capacité associée constitue le bloc de construction fondamental du nouveau réseau de mémoire à accès aléatoire. L'invention s'applique à la fabrication des mémoires.
FR7801826A 1977-01-24 1978-01-23 Unite de memoire Withdrawn FR2378331A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US76180677A 1977-01-24 1977-01-24

Publications (1)

Publication Number Publication Date
FR2378331A1 true FR2378331A1 (fr) 1978-08-18

Family

ID=25063317

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7801826A Withdrawn FR2378331A1 (fr) 1977-01-24 1978-01-23 Unite de memoire

Country Status (6)

Country Link
JP (1) JPS5393737A (fr)
BE (1) BE863126A (fr)
DE (1) DE2802761A1 (fr)
FR (1) FR2378331A1 (fr)
IT (1) IT1106983B (fr)
NL (1) NL7800798A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0008946A3 (en) * 1978-09-08 1980-04-02 Fujitsu Limited A semiconductor memory device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR930006620B1 (ko) * 1990-11-06 1993-07-21 재단법인 한국전자통신연구소 저잡음 특성을 갖는 다이내믹 램

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3876992A (en) * 1972-11-01 1975-04-08 Ibm Bipolar transistor memory with capacitive storage
US3979734A (en) * 1975-06-16 1976-09-07 International Business Machines Corporation Multiple element charge storage memory cell

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3876992A (en) * 1972-11-01 1975-04-08 Ibm Bipolar transistor memory with capacitive storage
US3979734A (en) * 1975-06-16 1976-09-07 International Business Machines Corporation Multiple element charge storage memory cell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0008946A3 (en) * 1978-09-08 1980-04-02 Fujitsu Limited A semiconductor memory device

Also Published As

Publication number Publication date
NL7800798A (nl) 1978-07-26
IT1106983B (it) 1985-11-18
BE863126A (fr) 1978-05-16
IT7867112A0 (it) 1978-01-20
DE2802761A1 (de) 1978-07-27
JPS5393737A (en) 1978-08-17

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Legal Events

Date Code Title Description
ST Notification of lapse