FR2995134B1 - Procede de gravure d'un materiau semiconducteur cristallin par implantation ionique puis gravure chimique a base de chlorure d'hydrogene - Google Patents

Procede de gravure d'un materiau semiconducteur cristallin par implantation ionique puis gravure chimique a base de chlorure d'hydrogene

Info

Publication number
FR2995134B1
FR2995134B1 FR1258263A FR1258263A FR2995134B1 FR 2995134 B1 FR2995134 B1 FR 2995134B1 FR 1258263 A FR1258263 A FR 1258263A FR 1258263 A FR1258263 A FR 1258263A FR 2995134 B1 FR2995134 B1 FR 2995134B1
Authority
FR
France
Prior art keywords
semiconductor material
ion implantation
hydrogen chloride
crystalline semiconductor
chemical engineering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1258263A
Other languages
English (en)
Other versions
FR2995134A1 (fr
Inventor
Laurent Grenouillet
Maud Vinet
Romain Wacquez
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR1258263A priority Critical patent/FR2995134B1/fr
Priority to PCT/EP2013/068299 priority patent/WO2014037410A1/fr
Priority to US14/426,029 priority patent/US9570340B2/en
Publication of FR2995134A1 publication Critical patent/FR2995134A1/fr
Application granted granted Critical
Publication of FR2995134B1 publication Critical patent/FR2995134B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743—Silicon
    • H10D30/6744—Monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/64—Wet etching of semiconductor materials
    • H10P50/642—Chemical etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0145—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H10P30/221—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks characterised by the angle between the ion beam and the mask
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/222—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Element Separation (AREA)
FR1258263A 2012-09-05 2012-09-05 Procede de gravure d'un materiau semiconducteur cristallin par implantation ionique puis gravure chimique a base de chlorure d'hydrogene Expired - Fee Related FR2995134B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR1258263A FR2995134B1 (fr) 2012-09-05 2012-09-05 Procede de gravure d'un materiau semiconducteur cristallin par implantation ionique puis gravure chimique a base de chlorure d'hydrogene
PCT/EP2013/068299 WO2014037410A1 (fr) 2012-09-05 2013-09-04 Procédé de gravure d'un matériau semiconducteur cristallin par implantation ionique puis gravure chimique à base de chlorure d'hydrogène
US14/426,029 US9570340B2 (en) 2012-09-05 2013-09-04 Method of etching a crystalline semiconductor material by ion implantation and then chemical etching based on hydrogen chloride

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1258263A FR2995134B1 (fr) 2012-09-05 2012-09-05 Procede de gravure d'un materiau semiconducteur cristallin par implantation ionique puis gravure chimique a base de chlorure d'hydrogene

Publications (2)

Publication Number Publication Date
FR2995134A1 FR2995134A1 (fr) 2014-03-07
FR2995134B1 true FR2995134B1 (fr) 2015-12-18

Family

ID=47351847

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1258263A Expired - Fee Related FR2995134B1 (fr) 2012-09-05 2012-09-05 Procede de gravure d'un materiau semiconducteur cristallin par implantation ionique puis gravure chimique a base de chlorure d'hydrogene

Country Status (3)

Country Link
US (1) US9570340B2 (fr)
FR (1) FR2995134B1 (fr)
WO (1) WO2014037410A1 (fr)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3030875B1 (fr) 2014-12-22 2022-10-14 Commissariat Energie Atomique Procede d'obtention de motifs dans une couche
US9640385B2 (en) * 2015-02-16 2017-05-02 Applied Materials, Inc. Gate electrode material residual removal process
FR3033934B1 (fr) 2015-03-16 2017-04-07 Commissariat Energie Atomique Procede de realisation ameliore d'un transistor dans un empilement de couches semi-conductrices superposees
FR3044163B1 (fr) * 2015-11-25 2018-01-05 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de gravure selective d’un materiau semi-conducteur en solution.
FR3052294B1 (fr) 2016-06-03 2018-06-15 Commissariat Energie Atomique Procede de realisation de motifs par implantations ionique
US10761334B2 (en) * 2018-07-13 2020-09-01 Varian Semiconductor Equipment Associates, Inc. System and method for optimally forming gratings of diffracted optical elements
US10795173B2 (en) 2018-07-13 2020-10-06 Varian Semiconductor Equipment Associates, Inc. System and method for optimally forming gratings of diffracted optical elements
US11119405B2 (en) 2018-10-12 2021-09-14 Applied Materials, Inc. Techniques for forming angled structures
US11226439B2 (en) * 2018-11-09 2022-01-18 Applied Materials, Inc. System and method for forming surface relief gratings
US11315836B2 (en) * 2020-03-04 2022-04-26 International Business Machines Corporation Two-dimensional vertical fins
FR3116378A1 (fr) 2020-11-19 2022-05-20 Commissariat à l'Energie Atomique et aux Energies Alternatives Procédé de polissage d'un substrat semiconducteur

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JPS59194438A (ja) * 1983-04-18 1984-11-05 Mitsubishi Electric Corp 半導体装置のメサ台形成方法
JPS6289324A (ja) * 1985-10-16 1987-04-23 Nec Corp 半導体装置の製造方法
US5736435A (en) 1995-07-03 1998-04-07 Motorola, Inc. Process for fabricating a fully self-aligned soi mosfet
US6313008B1 (en) * 2001-01-25 2001-11-06 Chartered Semiconductor Manufacturing Inc. Method to form a balloon shaped STI using a micro machining technique to remove heavily doped silicon
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JP4664777B2 (ja) 2005-09-07 2011-04-06 株式会社東芝 半導体装置
US7776745B2 (en) 2006-02-10 2010-08-17 Stmicroelectronics S.A. Method for etching silicon-germanium in the presence of silicon
DE102006019934B4 (de) 2006-04-28 2009-10-29 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Ausbildung eines Feldeffekttransistors
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Also Published As

Publication number Publication date
FR2995134A1 (fr) 2014-03-07
US9570340B2 (en) 2017-02-14
WO2014037410A1 (fr) 2014-03-13
US20150214099A1 (en) 2015-07-30

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