FR3021806B1 - Procede de programmation d'une cellule memoire non volatile comprenant une grille de transistor de selection partagee - Google Patents

Procede de programmation d'une cellule memoire non volatile comprenant une grille de transistor de selection partagee

Info

Publication number
FR3021806B1
FR3021806B1 FR1454839A FR1454839A FR3021806B1 FR 3021806 B1 FR3021806 B1 FR 3021806B1 FR 1454839 A FR1454839 A FR 1454839A FR 1454839 A FR1454839 A FR 1454839A FR 3021806 B1 FR3021806 B1 FR 3021806B1
Authority
FR
France
Prior art keywords
memory cell
nonvolatile memory
selection transistor
transistor grid
programming nonvolatile
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1454839A
Other languages
English (en)
Other versions
FR3021806A1 (fr
Inventor
Rosa Francesco La
Stephan Niel
Arnaud Regnier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR1454839A priority Critical patent/FR3021806B1/fr
Priority to CN201510247063.1A priority patent/CN105280225B/zh
Priority to CN201520312733.9U priority patent/CN204904840U/zh
Priority to US14/719,913 priority patent/US9443598B2/en
Publication of FR3021806A1 publication Critical patent/FR3021806A1/fr
Application granted granted Critical
Publication of FR3021806B1 publication Critical patent/FR3021806B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • G11C16/0458—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates comprising two or more independent floating gates which store independent data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G11C16/0475—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] comprising two or more independent storage sites which store independent data
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
FR1454839A 2014-05-28 2014-05-28 Procede de programmation d'une cellule memoire non volatile comprenant une grille de transistor de selection partagee Expired - Fee Related FR3021806B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR1454839A FR3021806B1 (fr) 2014-05-28 2014-05-28 Procede de programmation d'une cellule memoire non volatile comprenant une grille de transistor de selection partagee
CN201510247063.1A CN105280225B (zh) 2014-05-28 2015-05-14 对包括共用选择晶体管栅极的非易失性存储器单元进行编程的方法
CN201520312733.9U CN204904840U (zh) 2014-05-28 2015-05-14 一种包括共用选择晶体管栅极的非易失性存储器单元
US14/719,913 US9443598B2 (en) 2014-05-28 2015-05-22 Method for programming a non-volatile memory cell comprising a shared select transistor gate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1454839A FR3021806B1 (fr) 2014-05-28 2014-05-28 Procede de programmation d'une cellule memoire non volatile comprenant une grille de transistor de selection partagee

Publications (2)

Publication Number Publication Date
FR3021806A1 FR3021806A1 (fr) 2015-12-04
FR3021806B1 true FR3021806B1 (fr) 2017-09-01

Family

ID=51905215

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1454839A Expired - Fee Related FR3021806B1 (fr) 2014-05-28 2014-05-28 Procede de programmation d'une cellule memoire non volatile comprenant une grille de transistor de selection partagee

Country Status (3)

Country Link
US (1) US9443598B2 (fr)
CN (2) CN204904840U (fr)
FR (1) FR3021806B1 (fr)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015151197A1 (fr) * 2014-03-31 2015-10-08 ルネサスエレクトロニクス株式会社 Dispositif semi-conducteur, programme de pré-écriture et programme de restauration
FR3021806B1 (fr) * 2014-05-28 2017-09-01 St Microelectronics Sa Procede de programmation d'une cellule memoire non volatile comprenant une grille de transistor de selection partagee
US9847133B2 (en) * 2016-01-19 2017-12-19 Ememory Technology Inc. Memory array capable of performing byte erase operation
FR3054920B1 (fr) 2016-08-05 2018-10-26 Stmicroelectronics (Rousset) Sas Dispositif compact de memoire non volatile
TWI626656B (zh) * 2017-04-24 2018-06-11 物聯記憶體科技股份有限公司 具有字元抹除與減少寫入干擾的非揮發性記憶體裝置
TWI632558B (zh) * 2017-05-01 2018-08-11 卡比科技有限公司 非揮發性記憶體裝置及其操作方法
US11011533B2 (en) 2018-01-10 2021-05-18 Ememory Technology Inc. Memory structure and programing and reading methods thereof
US10796763B2 (en) * 2018-01-26 2020-10-06 Stmicroelectronics (Rousset) Sas Method for programming a split-gate memory cell and corresponding memory device
CN109314113B (zh) * 2018-09-14 2020-04-28 长江存储科技有限责任公司 三维存储器件以及用于形成三维存储器件的方法
FR3091018B1 (fr) * 2018-12-21 2023-01-20 St Microelectronics Sa Mémoire de puce électronique
US11309353B2 (en) * 2020-04-30 2022-04-19 Taiwan Semiconductor Manufacturing Company, Ltd. Spacer-defined back-end transistor as memory selector
US12183397B2 (en) * 2021-05-13 2024-12-31 Taiwan Semiconductor Manufacturing Company, Ltd. Memory circuits and devices, and methods thereof
US12367919B2 (en) * 2021-12-07 2025-07-22 Micron Technology, Inc. Word line driver circuitry including shared driver gates, and associated methods, devices, and systems
US11984165B2 (en) 2022-05-24 2024-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Memory device with reduced area
CN119325248B (zh) * 2024-10-10 2025-10-17 浙江创芯集成电路有限公司 半导体结构及其形成方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2826496A1 (fr) * 2001-06-25 2002-12-27 St Microelectronics Sa Memoire eeprom protegee contre les effets d'un claquage de transistor d'acces
US7154785B2 (en) * 2004-06-25 2006-12-26 Micron Technology, Inc. Charge pump circuitry having adjustable current outputs
US8369148B2 (en) * 2007-11-06 2013-02-05 Macronix International Co., Ltd. Operation methods for memory cell and array thereof immune to punchthrough leakage
WO2009122569A1 (fr) * 2008-04-01 2009-10-08 株式会社 東芝 Dispositif d'enregistrement et de reproduction d'informations
US8923049B2 (en) * 2011-09-09 2014-12-30 Aplus Flash Technology, Inc 1T1b and 2T2b flash-based, data-oriented EEPROM design
FR2987697A1 (fr) * 2012-03-05 2013-09-06 St Microelectronics Rousset Procede de fabrication d'une memoire non volatile
FR2987696B1 (fr) * 2012-03-05 2014-11-21 St Microelectronics Rousset Procede de lecture ecriture de cellules memoire non volatiles
US8760923B2 (en) * 2012-08-28 2014-06-24 Freescale Semiconductor, Inc. Non-volatile memory (NVM) that uses soft programming
FR2996680A1 (fr) * 2012-10-10 2014-04-11 St Microelectronics Rousset Memoire non volatile comportant des transistors de selection verticaux
CN105027216B (zh) * 2013-03-14 2017-09-22 硅存储技术公司 非易失性存储器编程算法装置和方法
FR3021806B1 (fr) * 2014-05-28 2017-09-01 St Microelectronics Sa Procede de programmation d'une cellule memoire non volatile comprenant une grille de transistor de selection partagee
FR3025649B1 (fr) * 2014-09-09 2016-12-09 Stmicroelectronics Rousset Procede de polarisation d’un plan de source enterre d’une memoire non volatile a grilles de selection verticales

Also Published As

Publication number Publication date
FR3021806A1 (fr) 2015-12-04
CN204904840U (zh) 2015-12-23
CN105280225A (zh) 2016-01-27
CN105280225B (zh) 2019-07-16
US20150348635A1 (en) 2015-12-03
US9443598B2 (en) 2016-09-13

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