IL72337A - Latch-up immune,multiple retrograde well high density cmos fet - Google Patents
Latch-up immune,multiple retrograde well high density cmos fetInfo
- Publication number
- IL72337A IL72337A IL72337A IL7233784A IL72337A IL 72337 A IL72337 A IL 72337A IL 72337 A IL72337 A IL 72337A IL 7233784 A IL7233784 A IL 7233784A IL 72337 A IL72337 A IL 72337A
- Authority
- IL
- Israel
- Prior art keywords
- immune
- latch
- high density
- well high
- retrograde well
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/50—Physical imperfections
- H10D62/53—Physical imperfections the imperfections being within the semiconductor body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/854—Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
- H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
- H10P30/212—Through-implantation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/28—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P36/00—Gettering within semiconductor bodies
- H10P36/03—Gettering within semiconductor bodies within silicon bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/40—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections
- H10P95/402—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/531,546 US4633289A (en) | 1983-09-12 | 1983-09-12 | Latch-up immune, multiple retrograde well high density CMOS FET |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IL72337A0 IL72337A0 (en) | 1984-11-30 |
| IL72337A true IL72337A (en) | 1988-11-15 |
Family
ID=24118078
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IL72337A IL72337A (en) | 1983-09-12 | 1984-07-08 | Latch-up immune,multiple retrograde well high density cmos fet |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US4633289A (de) |
| EP (1) | EP0157779B1 (de) |
| JP (1) | JPH0628298B2 (de) |
| KR (1) | KR930004343B1 (de) |
| DE (1) | DE3376782D1 (de) |
| IL (1) | IL72337A (de) |
| WO (1) | WO1985001391A1 (de) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60123055A (ja) * | 1983-12-07 | 1985-07-01 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| US5247199A (en) * | 1986-01-15 | 1993-09-21 | Harris Corporation | Process for forming twin well CMOS integrated circuits |
| WO1987005443A1 (en) * | 1986-03-04 | 1987-09-11 | Motorola, Inc. | High/low doping profile for twin well process |
| US4829359A (en) * | 1987-05-29 | 1989-05-09 | Harris Corp. | CMOS device having reduced spacing between N and P channel |
| JP2965783B2 (ja) * | 1991-07-17 | 1999-10-18 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
| JPH05198666A (ja) * | 1991-11-20 | 1993-08-06 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP2978345B2 (ja) * | 1992-11-26 | 1999-11-15 | 三菱電機株式会社 | 半導体装置の製造方法 |
| DE19543922A1 (de) * | 1995-11-24 | 1997-05-28 | Siemens Ag | Verfahren zum Herabsetzen der Trägerspeicherladung in Halbleiterbauelementen |
| US5681761A (en) * | 1995-12-28 | 1997-10-28 | Philips Electronics North America Corporation | Microwave power SOI-MOSFET with high conductivity metal gate |
| FR2743938B1 (fr) * | 1996-01-19 | 1998-04-10 | Sgs Thomson Microelectronics | Composant de protection d'interface de lignes telephoniques |
| JP3958388B2 (ja) | 1996-08-26 | 2007-08-15 | 株式会社ルネサステクノロジ | 半導体装置 |
| KR100260559B1 (ko) | 1997-12-29 | 2000-07-01 | 윤종용 | 비휘발성 메모리 장치의 웰 구조 및 그 제조 방법 |
| US6245618B1 (en) | 1999-02-03 | 2001-06-12 | Advanced Micro Devices, Inc. | Mosfet with localized amorphous region with retrograde implantation |
| US7411250B2 (en) * | 2001-04-05 | 2008-08-12 | Peregrine Semiconductor Corporation | Radiation-hardened silicon-on-insulator CMOS device, and method of making the same |
| US6531739B2 (en) * | 2001-04-05 | 2003-03-11 | Peregrine Semiconductor Corporation | Radiation-hardened silicon-on-insulator CMOS device, and method of making the same |
| US8329564B2 (en) * | 2007-10-26 | 2012-12-11 | International Business Machines Corporation | Method for fabricating super-steep retrograde well MOSFET on SOI or bulk silicon substrate, and device fabricated in accordance with the method |
| US8298886B2 (en) * | 2010-02-08 | 2012-10-30 | Semiconductor Components Industries, Llc | Electronic device including doped regions between channel and drain regions and a process of forming the same |
| US8299560B2 (en) * | 2010-02-08 | 2012-10-30 | Semiconductor Components Industries, Llc | Electronic device including a buried insulating layer and a vertical conductive structure extending therethrough and a process of forming the same |
| US8389369B2 (en) * | 2010-02-08 | 2013-03-05 | Semiconductor Components Industries, Llc | Electronic device including a doped region disposed under and having a higher dopant concentration than a channel region and a process of forming the same |
| US9659979B2 (en) * | 2015-10-15 | 2017-05-23 | International Business Machines Corporation | Sensors including complementary lateral bipolar junction transistors |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4053925A (en) * | 1975-08-07 | 1977-10-11 | Ibm Corporation | Method and structure for controllng carrier lifetime in semiconductor devices |
| US4167425A (en) * | 1975-09-19 | 1979-09-11 | Siemens Aktiengesellschaft | Method for producing lateral bipolar transistor by ion-implantation and controlled temperature treatment |
| US4203126A (en) * | 1975-11-13 | 1980-05-13 | Siliconix, Inc. | CMOS structure and method utilizing retarded electric field for minimum latch-up |
| DE2627855A1 (de) * | 1976-06-22 | 1977-12-29 | Siemens Ag | Halbleiterbauelement mit wenigstens zwei, einen pn-uebergang bildenden zonen unterschiedlichen leitungstyps sowie verfahren zu dessen herstellung |
| FR2445617A1 (fr) * | 1978-12-28 | 1980-07-25 | Ibm France | Resistance a tension de claquage amelioree obtenue par une double implantation ionique dans un substrat semi-conducteur et son procede de fabrication |
-
1983
- 1983-09-12 US US06/531,546 patent/US4633289A/en not_active Expired - Lifetime
- 1983-12-12 WO PCT/US1983/001958 patent/WO1985001391A1/en not_active Ceased
- 1983-12-12 JP JP59500531A patent/JPH0628298B2/ja not_active Expired - Lifetime
- 1983-12-12 DE DE8484900432T patent/DE3376782D1/de not_active Expired
- 1983-12-12 EP EP84900432A patent/EP0157779B1/de not_active Expired
-
1984
- 1984-07-08 IL IL72337A patent/IL72337A/xx not_active IP Right Cessation
- 1984-09-08 KR KR1019840005516A patent/KR930004343B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| EP0157779A1 (de) | 1985-10-16 |
| EP0157779B1 (de) | 1988-05-25 |
| IL72337A0 (en) | 1984-11-30 |
| KR930004343B1 (ko) | 1993-05-26 |
| JPS60502178A (ja) | 1985-12-12 |
| US4633289A (en) | 1986-12-30 |
| KR850002688A (ko) | 1985-05-15 |
| DE3376782D1 (en) | 1988-06-30 |
| WO1985001391A1 (en) | 1985-03-28 |
| JPH0628298B2 (ja) | 1994-04-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RH | Patent void |