IT1197523B - Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolata con giunzioni aventi profondita' estremamente ridotta - Google Patents

Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolata con giunzioni aventi profondita' estremamente ridotta

Info

Publication number
IT1197523B
IT1197523B IT22182/86A IT2218286A IT1197523B IT 1197523 B IT1197523 B IT 1197523B IT 22182/86 A IT22182/86 A IT 22182/86A IT 2218286 A IT2218286 A IT 2218286A IT 1197523 B IT1197523 B IT 1197523B
Authority
IT
Italy
Prior art keywords
joints
isolated
gate
manufacture
field
Prior art date
Application number
IT22182/86A
Other languages
English (en)
Other versions
IT8622182A0 (it
Inventor
Laura Meda
Maria Luisa Polignano
Original Assignee
Sgs Microelettronica Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Microelettronica Spa filed Critical Sgs Microelettronica Spa
Priority to IT22182/86A priority Critical patent/IT1197523B/it
Publication of IT8622182A0 publication Critical patent/IT8622182A0/it
Priority to EP87115933A priority patent/EP0265958A3/en
Priority to JP62273600A priority patent/JPS63117459A/ja
Application granted granted Critical
Publication of IT1197523B publication Critical patent/IT1197523B/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/1414Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
IT22182/86A 1986-10-30 1986-10-30 Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolata con giunzioni aventi profondita' estremamente ridotta IT1197523B (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT22182/86A IT1197523B (it) 1986-10-30 1986-10-30 Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolata con giunzioni aventi profondita' estremamente ridotta
EP87115933A EP0265958A3 (en) 1986-10-30 1987-10-29 Process of making insulated- gate field-effect transistors
JP62273600A JPS63117459A (ja) 1986-10-30 1987-10-30 絶縁ゲート電界効果トランジスタの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT22182/86A IT1197523B (it) 1986-10-30 1986-10-30 Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolata con giunzioni aventi profondita' estremamente ridotta

Publications (2)

Publication Number Publication Date
IT8622182A0 IT8622182A0 (it) 1986-10-30
IT1197523B true IT1197523B (it) 1988-11-30

Family

ID=11192707

Family Applications (1)

Application Number Title Priority Date Filing Date
IT22182/86A IT1197523B (it) 1986-10-30 1986-10-30 Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolata con giunzioni aventi profondita' estremamente ridotta

Country Status (3)

Country Link
EP (1) EP0265958A3 (it)
JP (1) JPS63117459A (it)
IT (1) IT1197523B (it)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE59409300D1 (de) * 1993-06-23 2000-05-31 Siemens Ag Verfahren zur Herstellung von einem Isolationsgraben in einem Substrat für Smart-Power-Technologien
JP2002368012A (ja) * 2001-06-06 2002-12-20 Rohm Co Ltd 不純物拡散層の形成方法
JP4933957B2 (ja) * 2007-05-18 2012-05-16 住友ゴム工業株式会社 スポンジたわし

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56160034A (en) * 1980-05-14 1981-12-09 Fujitsu Ltd Impurity diffusion
CA1198226A (en) * 1982-06-01 1985-12-17 Eliezer Kinsbron Method for manufacturing a semiconductor device
JPS6063961A (ja) * 1983-08-30 1985-04-12 Fujitsu Ltd 半導体装置の製造方法
IT1213192B (it) * 1984-07-19 1989-12-14 Ates Componenti Elettron Processo per la fabbricazione di transistori ad effetto di campo agate isolato (igfet) ad elevata velocita' di risposta in circuiti integrati ad alta densita'.
IT1213234B (it) * 1984-10-25 1989-12-14 Sgs Thomson Microelectronics Procedimento perfezionato per la fabbricazione di dispositivi a semiconduttore dmos.

Also Published As

Publication number Publication date
EP0265958A3 (en) 1989-09-27
IT8622182A0 (it) 1986-10-30
EP0265958A2 (en) 1988-05-04
JPS63117459A (ja) 1988-05-21

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