IT1200785B - Migliorato procedimento di attaco in plasma (rie) per realizzare contatti metallo-semiconduttore di tipo ohmico - Google Patents
Migliorato procedimento di attaco in plasma (rie) per realizzare contatti metallo-semiconduttore di tipo ohmicoInfo
- Publication number
- IT1200785B IT1200785B IT22468/85A IT2246885A IT1200785B IT 1200785 B IT1200785 B IT 1200785B IT 22468/85 A IT22468/85 A IT 22468/85A IT 2246885 A IT2246885 A IT 2246885A IT 1200785 B IT1200785 B IT 1200785B
- Authority
- IT
- Italy
- Prior art keywords
- rie
- ohmic metal
- make ohmic
- improved plasma
- semiconductor contacts
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
- H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
- H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/082—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being tapered via holes
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT22468/85A IT1200785B (it) | 1985-10-14 | 1985-10-14 | Migliorato procedimento di attaco in plasma (rie) per realizzare contatti metallo-semiconduttore di tipo ohmico |
| EP86830254A EP0219465B1 (en) | 1985-10-14 | 1986-09-15 | Improved (rie) plasma etch process for making metal-semiconductor ohmic type contacts |
| DE8686830254T DE3681112D1 (de) | 1985-10-14 | 1986-09-15 | Plasmaaetzverfahren zur herstellung von metall-halbleiter-kontakte des ohmischen typs. |
| US06/907,342 US4806199A (en) | 1985-10-14 | 1986-09-15 | (RIE) Plasma process for making metal-semiconductor ohmic type contacts |
| JP61245142A JPH0821575B2 (ja) | 1985-10-14 | 1986-10-14 | 金属と半導体間にオ−ム型接触を形成するための改良されたrieプラズマエツチング法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT22468/85A IT1200785B (it) | 1985-10-14 | 1985-10-14 | Migliorato procedimento di attaco in plasma (rie) per realizzare contatti metallo-semiconduttore di tipo ohmico |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IT8522468A0 IT8522468A0 (it) | 1985-10-14 |
| IT1200785B true IT1200785B (it) | 1989-01-27 |
Family
ID=11196692
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT22468/85A IT1200785B (it) | 1985-10-14 | 1985-10-14 | Migliorato procedimento di attaco in plasma (rie) per realizzare contatti metallo-semiconduttore di tipo ohmico |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4806199A (it) |
| EP (1) | EP0219465B1 (it) |
| JP (1) | JPH0821575B2 (it) |
| DE (1) | DE3681112D1 (it) |
| IT (1) | IT1200785B (it) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IT1201840B (it) * | 1986-08-28 | 1989-02-02 | Sgs Microelettronica Spa | Procedimento per realizzare contatti ohmici metallo-semiconduttore |
| JPH0770523B2 (ja) * | 1987-05-19 | 1995-07-31 | 日本電気株式会社 | 半導体装置の製造方法 |
| KR910008983B1 (ko) * | 1988-12-20 | 1991-10-26 | 현대전자산업 주식회사 | 비등방성 식각을 이용한 잔유물 제거방법 |
| US5034091A (en) * | 1990-04-27 | 1991-07-23 | Hughes Aircraft Company | Method of forming an electrical via structure |
| JP3185150B2 (ja) * | 1991-03-15 | 2001-07-09 | 日本テキサス・インスツルメンツ株式会社 | 半導体装置の製造方法 |
| JP2997142B2 (ja) | 1992-01-24 | 2000-01-11 | アプライド マテリアルズ インコーポレイテッド | 集積回路構造の選択性の高い酸化物エッチングプロセス |
| US5312717A (en) * | 1992-09-24 | 1994-05-17 | International Business Machines Corporation | Residue free vertical pattern transfer with top surface imaging resists |
| DE4339465C2 (de) * | 1993-11-19 | 1997-05-28 | Gold Star Electronics | Verfahren zur Behandlung der Oberfläche eines einer Trockenätzung ausgesetzten Siliciumsubstrats |
| US5750441A (en) | 1996-05-20 | 1998-05-12 | Micron Technology, Inc. | Mask having a tapered profile used during the formation of a semiconductor device |
| US5893757A (en) * | 1997-01-13 | 1999-04-13 | Applied Komatsu Technology, Inc. | Tapered profile etching method |
| US6875371B1 (en) | 1998-06-22 | 2005-04-05 | Micron Technology, Inc. | Etchant with selectivity for doped silicon dioxide over undoped silicon dioxide and silicon nitride, processes which employ the etchant, and structures formed thereby |
| US6117791A (en) * | 1998-06-22 | 2000-09-12 | Micron Technology, Inc. | Etchant with selectivity for doped silicon dioxide over undoped silicon dioxide and silicon nitride, processes which employ the etchant, and structures formed thereby |
| US7173339B1 (en) | 1998-06-22 | 2007-02-06 | Micron Technology, Inc. | Semiconductor device having a substrate an undoped silicon oxide structure and an overlaying doped silicon oxide structure with a sidewall terminating at the undoped silicon oxide structure |
| US6281142B1 (en) * | 1999-06-04 | 2001-08-28 | Micron Technology, Inc. | Dielectric cure for reducing oxygen vacancies |
| JP4896367B2 (ja) * | 2003-10-23 | 2012-03-14 | パナソニック株式会社 | 電子部品の処理方法及び装置 |
| WO2013092759A2 (en) * | 2011-12-21 | 2013-06-27 | Solvay Sa | Method for etching of sio2 layers on thin wafers |
| CN103779271B (zh) * | 2012-10-26 | 2017-04-05 | 中微半导体设备(上海)有限公司 | 一种倒锥形轮廓刻蚀方法 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4268374A (en) * | 1979-08-09 | 1981-05-19 | Bell Telephone Laboratories, Incorporated | High capacity sputter-etching apparatus |
| US4349409A (en) * | 1980-05-12 | 1982-09-14 | Fujitsu Limited | Method and apparatus for plasma etching |
| JPS56158873A (en) * | 1980-05-14 | 1981-12-07 | Hitachi Ltd | Dry etching method |
| DE3103177A1 (de) * | 1981-01-30 | 1982-08-26 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von polysiliziumstrukturen bis in den 1 (my)m-bereich auf integrierte halbleiterschaltungen enthaltenden substraten durch plasmaaetzen |
| US4599243A (en) * | 1982-12-23 | 1986-07-08 | International Business Machines Corporation | Use of plasma polymerized organosilicon films in fabrication of lift-off masks |
| US4534826A (en) * | 1983-12-29 | 1985-08-13 | Ibm Corporation | Trench etch process for dielectric isolation |
| US4484979A (en) * | 1984-04-16 | 1984-11-27 | At&T Bell Laboratories | Two-step anisotropic etching process for patterning a layer without penetrating through an underlying thinner layer |
| US4528066A (en) * | 1984-07-06 | 1985-07-09 | Ibm Corporation | Selective anisotropic reactive ion etching process for polysilicide composite structures |
| US4582581A (en) * | 1985-05-09 | 1986-04-15 | Allied Corporation | Boron trifluoride system for plasma etching of silicon dioxide |
| US4631248A (en) * | 1985-06-21 | 1986-12-23 | Lsi Logic Corporation | Method for forming an electrical contact in an integrated circuit |
| US4687543A (en) * | 1986-02-21 | 1987-08-18 | Tegal Corporation | Selective plasma etching during formation of integrated circuitry |
-
1985
- 1985-10-14 IT IT22468/85A patent/IT1200785B/it active
-
1986
- 1986-09-15 US US06/907,342 patent/US4806199A/en not_active Expired - Lifetime
- 1986-09-15 DE DE8686830254T patent/DE3681112D1/de not_active Expired - Lifetime
- 1986-09-15 EP EP86830254A patent/EP0219465B1/en not_active Expired
- 1986-10-14 JP JP61245142A patent/JPH0821575B2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE3681112D1 (de) | 1991-10-02 |
| IT8522468A0 (it) | 1985-10-14 |
| EP0219465A2 (en) | 1987-04-22 |
| EP0219465A3 (en) | 1988-03-30 |
| EP0219465B1 (en) | 1991-08-28 |
| JPS6289333A (ja) | 1987-04-23 |
| US4806199A (en) | 1989-02-21 |
| JPH0821575B2 (ja) | 1996-03-04 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19971030 |