IT1215380B - Cella di memoria eprom a due semicelle simmetriche con gate flottante separata. - Google Patents

Cella di memoria eprom a due semicelle simmetriche con gate flottante separata.

Info

Publication number: IT1215380B
Authority: IT; Italy
Prior art keywords: floating gate; eprom memory; cell; memory cell; separate floating
Prior art date: 1987-03-12

Application number

IT8719656A

Other languages

English (en)

Other versions

IT8719656A0 (it

Inventor

Giuseppe Corda

Original Assignee

Sgs Microelettronica Spa

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1987-03-12

Filing date

1987-03-12

Publication date

1990-02-08

1987-03-12 Application filed by Sgs Microelettronica Spa filed Critical Sgs Microelettronica Spa

1987-03-12 Priority to IT8719656A priority Critical patent/IT1215380B/it

1987-03-12 Publication of IT8719656A0 publication Critical patent/IT8719656A0/it

1988-03-04 Priority to EP88200420A priority patent/EP0282137B1/en

1988-03-04 Priority to DE88200420T priority patent/DE3886571T2/de

1988-03-11 Priority to JP5650188A priority patent/JP2673529B2/ja

1988-03-14 Priority to US07/167,986 priority patent/US4896295A/en

1990-02-08 Application granted granted Critical

1990-02-08 Publication of IT1215380B publication Critical patent/IT1215380B/it

Links

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/681—Floating-gate IGFETs having only two programming levels

Landscapes

Engineering & Computer Science (AREA)
Microelectronics & Electronic Packaging (AREA)
Non-Volatile Memory (AREA)
Read Only Memory (AREA)
Semiconductor Memories (AREA)

IT8719656A 1987-03-12 1987-03-12 Cella di memoria eprom a due semicelle simmetriche con gate flottante separata. IT1215380B (it)

Priority Applications (5)

Application Number	Priority Date	Filing Date	Title
IT8719656A IT1215380B (it)	1987-03-12	1987-03-12	Cella di memoria eprom a due semicelle simmetriche con gate flottante separata.
EP88200420A EP0282137B1 (en)	1987-03-12	1988-03-04	EPROM memory cell with two symmetrical half-cells and separate floating gates
DE88200420T DE3886571T2 (de)	1987-03-12	1988-03-04	EPROM-Speicherzelle mit zwei symmetrischen Halbzellen und mit getrennten schwebenden Gittern.
JP5650188A JP2673529B2 (ja)	1987-03-12	1988-03-11	Ｅｐｒｏｍメモリセルマトリックス
US07/167,986 US4896295A (en)	1987-03-12	1988-03-14	Eprom memory cell with two symmetrical half-cells and separate floating gates

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
IT8719656A IT1215380B (it)	1987-03-12	1987-03-12	Cella di memoria eprom a due semicelle simmetriche con gate flottante separata.

Publications (2)

Publication Number	Publication Date
IT8719656A0 IT8719656A0 (it)	1987-03-12
IT1215380B true IT1215380B (it)	1990-02-08

Family

ID=11160124

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
IT8719656A IT1215380B (it)	1987-03-12	1987-03-12	Cella di memoria eprom a due semicelle simmetriche con gate flottante separata.

Country Status (5)

Country	Link
US (1)	US4896295A (it)
EP (1)	EP0282137B1 (it)
JP (1)	JP2673529B2 (it)
DE (1)	DE3886571T2 (it)
IT (1)	IT1215380B (it)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
IT1217403B (it) *	1988-04-12	1990-03-22	Sgs Thomson Microelectronics	Matrice di memoria a tovaglia con celle eprom sfalsate
US5051796A (en) *	1988-11-10	1991-09-24	Texas Instruments Incorporated	Cross-point contact-free array with a high-density floating-gate structure
US5238855A (en) *	1988-11-10	1993-08-24	Texas Instruments Incorporated	Cross-point contact-free array with a high-density floating-gate structure
IT1229131B (it) *	1989-03-09	1991-07-22	Sgs Thomson Microelectronics	Matrice di memoria eprom con struttura a tovaglia e procedimento per la sua fabbricazione.
FR2663147A1 (fr) *	1990-06-12	1991-12-13	Sgs Thomson Microelectronics	Memoire programmable a double transistor a grille flottante.
JP2685966B2 (ja) *	1990-06-22	1997-12-08	株式会社東芝	不揮発性半導体記憶装置
US5291045A (en) *	1991-03-29	1994-03-01	Kabushiki Kaisha Toshiba	Non-volatile semiconductor memory device using a differential cell in a memory cell
JP2848211B2 (ja) *	1993-10-08	1999-01-20	日本電気株式会社	不揮発性半導体記憶装置
US6329245B1 (en) *	1999-12-20	2001-12-11	Chartered Semiconductor Manufacturing Ltd.	Flash memory array structure with reduced bit-line pitch
US7973557B2 (en) *	2008-05-02	2011-07-05	Texas Instruments Incorporated	IC having programmable digital logic cells
JP5522296B2 (ja) *	2013-06-03	2014-06-18	凸版印刷株式会社	不揮発性半導体記憶装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4377818A (en) *	1978-11-02	1983-03-22	Texas Instruments Incorporated	High density electrically programmable ROM
JPS5728364A (en) *	1980-07-28	1982-02-16	Fujitsu Ltd	Semiconductor memory device
JPS5961189A (ja) *	1982-09-15	1984-04-07	ナシヨナル・セミコンダクタ−・コ−ポレ−シヨン	高密度型ｅｐｒｏｍメモリ−・アレ−
US4546454A (en) *	1982-11-05	1985-10-08	Seeq Technology, Inc.	Non-volatile memory cell fuse element
US4639893A (en) *	1984-05-15	1987-01-27	Wafer Scale Integration, Inc.	Self-aligned split gate EPROM
IT1213241B (it) *	1984-11-07	1989-12-14	Ates Componenti Elettron	Matrice di memoria eprom con celle elementari simmetriche mos e suo metodo di scrittura.
US4597060A (en) *	1985-05-01	1986-06-24	Texas Instruments Incorporated	EPROM array and method for fabricating
US4774202A (en) *	1985-11-07	1988-09-27	Sprague Electric Company	Memory device with interconnected polysilicon layers and method for making

1987
- 1987-03-12 IT IT8719656A patent/IT1215380B/it active
1988
- 1988-03-04 EP EP88200420A patent/EP0282137B1/en not_active Expired - Lifetime
- 1988-03-04 DE DE88200420T patent/DE3886571T2/de not_active Expired - Fee Related
- 1988-03-11 JP JP5650188A patent/JP2673529B2/ja not_active Expired - Fee Related
- 1988-03-14 US US07/167,986 patent/US4896295A/en not_active Expired - Lifetime

Also Published As

Publication number	Publication date
EP0282137A2 (en)	1988-09-14
DE3886571T2 (de)	1994-04-28
IT8719656A0 (it)	1987-03-12
JPS63249376A (ja)	1988-10-17
JP2673529B2 (ja)	1997-11-05
EP0282137B1 (en)	1993-12-29
EP0282137A3 (en)	1990-03-14
US4896295A (en)	1990-01-23
DE3886571D1 (de)	1994-02-10

Legal Events

Date	Code	Title	Description
1999-10-27	TA	Fee payment date (situation as of event date), data collected since 19931001	Effective date: 19970329

Publication	Publication Date	Title
DE68917807D1 (de)	1994-10-06	Speicheranordnung mit schwebendem Gate.
DE3885408D1 (de)	1993-12-09	Nichtflüchtige Speicherzelle.
DE3481879D1 (de)	1990-05-10	Doppeltor-speicheranordnung.
DE3888603D1 (de)	1994-04-28	Halbleiterbauelement mit Floating-Gate.
DE3275790D1 (en)	1987-04-23	Cmos memory cell with floating memory gate
IT8520258A0 (it)	1985-04-05	Doccia con custodia.
DE3788645D1 (de)	1994-02-10	Sonnenzelle mit verbesserter stirnflächenmetallisierung.
DE3582861D1 (de)	1991-06-20	Brennstoffzellensystem.
IL59060A (en)	1982-03-31	Substrate coupled floating gate memory cell
AU4171085A (en)	1985-11-14	Semiconductor floating gate memory cell
NO893484D0 (no)	1989-08-30	Brenselcelle.
IT1238539B (it)	1993-08-18	Cella elettrochimica.
DE3863095D1 (de)	1991-07-11	Korrosionsbestaendige brennstoffzellenstruktur.
DE3674738D1 (de)	1990-11-08	Brennstoffzellenplatten.
DE3579704D1 (de)	1990-10-25	Flachzelle.
DE3586385D1 (de)	1992-08-27	Integrierte gate-matrixstruktur.
NL193296B (nl)	1999-01-04	EPROM-geheugenmatrix met symmetrische elementaire MOS-cellen.
DE3767729D1 (de)	1991-03-07	Assoziativspeicherzelle.
IT1215380B (it)	1990-02-08	Cella di memoria eprom a due semicelle simmetriche con gate flottante separata.
GB2085226B (en)	1985-08-21	Floating gate eprom cells
DE3576613D1 (de)	1990-04-19	Brennstoffzellenvorrichtungen.
DE3850567D1 (de)	1994-08-11	DRAM-Zelle mit verstärkter Ladung.
NL192550B (nl)	1997-05-01	Brandstofcel.
DE3778044D1 (de)	1992-05-14	Kassettenladegeraet mit seitenplatten.
DE3854005D1 (de)	1995-07-27	Speicherzelle.