IT1250463B - Procedimento per la fabbricazione di transistori con struttura gate -isolante -semiconduttore. - Google Patents

Procedimento per la fabbricazione di transistori con struttura gate -isolante -semiconduttore.

Info

Publication number
IT1250463B
IT1250463B ITRM910621A ITRM910621A IT1250463B IT 1250463 B IT1250463 B IT 1250463B IT RM910621 A ITRM910621 A IT RM910621A IT RM910621 A ITRM910621 A IT RM910621A IT 1250463 B IT1250463 B IT 1250463B
Authority
IT
Italy
Prior art keywords
conductivity
type
gate
insulating
carried out
Prior art date
Application number
ITRM910621A
Other languages
English (en)
Inventor
Kyoung-Tae Kim
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITRM910621A0 publication Critical patent/ITRM910621A0/it
Publication of ITRM910621A1 publication Critical patent/ITRM910621A1/it
Application granted granted Critical
Publication of IT1250463B publication Critical patent/IT1250463B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01318—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN
    • H10D64/0132—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN the conductor being a metallic silicide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01318—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H10D64/668—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers the layer being a silicide, e.g. TiSi2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H10D64/669—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers the conductor further comprising additional layers of alloy material, compound material or organic material, e.g. TaN/TiAlN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/694—Inorganic materials composed of nitrides
    • H10P14/6943—Inorganic materials composed of nitrides containing silicon
    • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

Viene illustrato un metodo per la fabbricazione di un transistore avente una struttura di gate-isolante-semiconduttore. Il primo procedimento viene effettuato formando uno strato isolante di gate sulla superficie del substrato di semiconduttore di un primo tipo di conduttività, in cui viene formata un'area di canale avente il primo tipo di conduttività oppure un secondo tipo di conduttività. Successivamente viene effettuato un secondo processo per formare sequenzialmente un primo strato conduttore realizzato con nitruro di titanio sulla superficie dello strato di isolante di gate, e formando un secondo strato conduttore che ha una conduttività superiore del primo strato conduttore. Viene effettuato un terzo processo per formare sequenzialmente elettrodi di gate in una data zona mediante incisione selettiva del primo e del secondo degli strati conduttori e dello strato di isolante di gate, e formando zone di source e drain del secondo tipo di conduttività per mezzo di impianto di ioni o diffusione.
ITRM910621A 1990-08-20 1991-08-19 Procedimento per la fabbricazione di transistori con struttura gate -isolante -semiconduttore. IT1250463B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900012815A KR920005242A (ko) 1990-08-20 1990-08-20 게이트-절연체-반도체의 구조를 가지는 트랜지스터의 제조방법

Publications (3)

Publication Number Publication Date
ITRM910621A0 ITRM910621A0 (it) 1991-08-19
ITRM910621A1 ITRM910621A1 (it) 1993-02-19
IT1250463B true IT1250463B (it) 1995-04-07

Family

ID=19302524

Family Applications (1)

Application Number Title Priority Date Filing Date
ITRM910621A IT1250463B (it) 1990-08-20 1991-08-19 Procedimento per la fabbricazione di transistori con struttura gate -isolante -semiconduttore.

Country Status (5)

Country Link
KR (1) KR920005242A (it)
DE (1) DE4114166A1 (it)
FR (1) FR2665980A1 (it)
GB (1) GB2247349A (it)
IT (1) IT1250463B (it)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940010393A (ko) * 1992-10-05 1994-05-26 윌리엄 이. 힐러 티타늄 질화물과 폴리실리콘으로 구성되는 적층된 층들을 이용하는 게이트 전극
US6084279A (en) * 1997-03-31 2000-07-04 Motorola Inc. Semiconductor device having a metal containing layer overlying a gate dielectric
KR100345364B1 (ko) * 1998-12-28 2002-09-18 주식회사 하이닉스반도체 반도체 소자의 게이트전극 형성방법
JP3287403B2 (ja) * 1999-02-19 2002-06-04 日本電気株式会社 Ｍｉｓ型電界効果トランジスタ及びその製造方法
AU6918300A (en) * 1999-09-24 2001-04-30 Intel Corporation A nonvolatile memory device with a high work function floating-gate and method of fabrication
US6518618B1 (en) 1999-12-03 2003-02-11 Intel Corporation Integrated memory cell and method of fabrication
US6388327B1 (en) 2001-01-09 2002-05-14 International Business Machines Corporation Capping layer for improved silicide formation in narrow semiconductor structures
CN1296971C (zh) * 2004-09-29 2007-01-24 中国科学院微电子研究所 一种适用于纳米器件制造的硅化物工艺

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3879746A (en) * 1972-05-30 1975-04-22 Bell Telephone Labor Inc Gate metallization structure
JPS57155775A (en) * 1981-03-23 1982-09-25 Hitachi Ltd Semiconductor device
JPS5925273A (ja) * 1982-08-03 1984-02-09 Toshiba Corp 半導体装置及びその製造方法
US4570328A (en) * 1983-03-07 1986-02-18 Motorola, Inc. Method of producing titanium nitride MOS device gate electrode
US4605947A (en) * 1983-03-07 1986-08-12 Motorola Inc. Titanium nitride MOS device gate electrode and method of producing
KR920009916B1 (ko) * 1984-08-27 1992-11-06 아메리칸 텔리폰 앤드 텔레그라프 캄파니 직접 회로 소자용 확산 장벽층 및 그 형성 방법
GB2164491B (en) * 1984-09-14 1988-04-07 Stc Plc Semiconductor devices
JPS61208869A (ja) * 1985-03-14 1986-09-17 Nec Corp 半導体装置及びその製造方法
EP0613180A3 (en) * 1985-05-13 1994-10-19 Toshiba Kk Semiconductor arrangement with connecting electrodes.
JPS6254960A (ja) * 1985-09-04 1987-03-10 Nec Corp Ｍｉｓ形電界効果トランジスタ
US4707721A (en) * 1986-02-20 1987-11-17 Texas Instruments Incorporated Passivated dual dielectric gate system and method for fabricating same
JPS62219966A (ja) * 1986-03-22 1987-09-28 Toshiba Corp 半導体装置
JPS63174371A (ja) * 1987-01-13 1988-07-18 Nec Corp 電界効果トランジスタ
JPH07109824B2 (ja) * 1987-07-22 1995-11-22 松下電子工業株式会社 半導体装置の製造方法
US4990997A (en) * 1988-04-20 1991-02-05 Fujitsu Limited Crystal grain diffusion barrier structure for a semiconductor device
JPH0228377A (ja) * 1988-06-09 1990-01-30 Fujitsu Ltd 半導体装置、電界効果トランジスタ、および、キャパシタの製造方法
JPH0687501B2 (ja) * 1988-09-29 1994-11-02 シャープ株式会社 半導体装置のゲート電極の製造方法

Also Published As

Publication number Publication date
GB9117195D0 (en) 1991-09-25
GB2247349A (en) 1992-02-26
KR920005242A (ko) 1992-03-28
DE4114166A1 (de) 1992-02-27
ITRM910621A1 (it) 1993-02-19
ITRM910621A0 (it) 1991-08-19
FR2665980A1 (fr) 1992-02-21

Similar Documents

Publication Publication Date Title
DE69728259D1 (de) Siliciumkarbid-cmos und herstellungsverfahren
KR970063682A (ko) 전위 전압 강하 및 스위칭 파워 손실을 개선시킨 쇼트 채널 igbt
KR950021772A (ko) 적어도 하나의 모오스(mos) 트랜지스터를 구비한 집적회로의 제조방법
TW357461B (en) Ferroelectric transistors, semiconductor storage devices, method of operating ferroelectric transistors and method of manufacturing ferromagnetic transistors
US4198252A (en) MNOS memory device
IT1250463B (it) Procedimento per la fabbricazione di transistori con struttura gate -isolante -semiconduttore.
KR100221061B1 (ko) 반도체장치 및 그 제조방법
KR100537101B1 (ko) 수직형 트랜지스터의 제조방법
WO1998053491A3 (en) Manufacture of a semiconductor device with a mos transistor having an ldd structure
KR920020758A (ko) Mos 트랜지스터 제조방법
RU2000122320A (ru) Способ изготовления мощного дмоп-транзистора
ATE470953T1 (de) Herstellungsverfahren für einen transistor auf einem soi-substrat
KR970054227A (ko) Nand형 비휘발성 메모리 소자 및 그 제조방법
KR100319449B1 (ko) 극소 채널 소자의 제조방법
KR930005272A (ko) Ldd형 mos 트랜지스터 및 그의 제조방법
ATE32805T1 (de) Verfahren zum herstellen von integrierten mosfeldeffekttransistoren mit einer aus metallsiliziden bestehenden zusaetzlichen leiterbahnebene.
KR940007662B1 (ko) 얕은 접합 모스패트 제조방법
KR0140959B1 (ko) Mosfet 제조방법
KR940016927A (ko) 트렌치(Trench) 구조를 이용한 수직 채널을 갖는 모스트랜지스터(MOS-FET) 제조방법
KR970003682A (ko) 저도핑 드레인 구조의 모스 트랜지스터 제조 방법
KR100322417B1 (ko) Soi mosfet의 장점을 갖는 mosfet 및 그 제조방법
DE69027312D1 (de) Feldeffekttransistor mit fermi-schwellenspannung
KR970030505A (ko) 얕은 소스/드레인 결합 영역 형성방법
KR970030900A (ko) 박막트랜지스터 제조방법
KR19980048203A (ko) 이중게이트구조를 갖는 모스트랜지스터 및 그 제조방법

Legal Events

Date Code Title Description
0001 Granted