IT1254810B - Dispositivo per sopprimere il rumore di alimentazione in circuiti integrati a semiconduttore. - Google Patents

Dispositivo per sopprimere il rumore di alimentazione in circuiti integrati a semiconduttore.

Info

Publication number
IT1254810B
IT1254810B ITMI920375A ITMI920375A IT1254810B IT 1254810 B IT1254810 B IT 1254810B IT MI920375 A ITMI920375 A IT MI920375A IT MI920375 A ITMI920375 A IT MI920375A IT 1254810 B IT1254810 B IT 1254810B
Authority
IT
Italy
Prior art keywords
power
suppress
integrated circuit
semiconductor integrated
substrate
Prior art date
Application number
ITMI920375A
Other languages
English (en)
Inventor
Deok-Min Lee
Yong-Ho Park
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI920375A0 publication Critical patent/ITMI920375A0/it
Publication of ITMI920375A1 publication Critical patent/ITMI920375A1/it
Application granted granted Critical
Publication of IT1254810B publication Critical patent/IT1254810B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/475—Capacitors in combination with leadframes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B15/00—Suppression or limitation of noise or interference
    • H04B15/005—Reducing noise, e.g. humm, from the supply
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/992—Noise prevention, e.g. preventing crosstalk
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/427—Power or ground buses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)
  • Filters And Equalizers (AREA)

Abstract

E' descritto un dispositivo a circuito integrato a semiconduttore sopprimere i rumori di alimentazione indotti su una linea di alimentazione durante funzionamento ad alta velocità del dispositivo. Sul lato posteriore di un substrato di semiconduttore avente un circuito integrato formato su esso, è depositata a guisa di rivestimento una pellicola dielettrica avente elevata permittività, così da formare una grande capacità tra un telaietto adduttori del contenitore ed il substrato. Successivamente, potenza avente polarità opposta a quella di un'alimentazione di potenza applicata al substrato è collegata al telaietto adduttori così da formare un condensatore di disaccoppiamento tra terminali di potenza o alimentazione di una piastrina. In tal modo, il rumore di alimentazione è ridotto e l'area di progettazione nel circuito integrato può essere ridotta.
ITMI920375A 1991-08-19 1992-02-20 Dispositivo per sopprimere il rumore di alimentazione in circuiti integrati a semiconduttore. IT1254810B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910014266A KR930005334A (ko) 1991-08-19 1991-08-19 전원 잡음 억제를 위한 집적회로

Publications (3)

Publication Number Publication Date
ITMI920375A0 ITMI920375A0 (it) 1992-02-20
ITMI920375A1 ITMI920375A1 (it) 1993-08-20
IT1254810B true IT1254810B (it) 1995-10-11

Family

ID=19318748

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI920375A IT1254810B (it) 1991-08-19 1992-02-20 Dispositivo per sopprimere il rumore di alimentazione in circuiti integrati a semiconduttore.

Country Status (7)

Country Link
JP (1) JPH0547808A (it)
KR (1) KR930005334A (it)
DE (1) DE4206278A1 (it)
FR (1) FR2680602A1 (it)
GB (1) GB2258943A (it)
IT (1) IT1254810B (it)
TW (1) TW200631B (it)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU6900096A (en) * 1995-09-29 1997-04-17 Analog Devices, Inc. Integrated circuit and supply decoupling capacitor therefor
JP2007173339A (ja) 2005-12-20 2007-07-05 Nec Electronics Corp 半導体回路
CN114864557A (zh) * 2022-04-21 2022-08-05 海南摩尔兄弟科技有限公司 一种芯片封装结构、雾化器、电子雾化装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1816023A1 (de) * 1968-12-20 1970-06-25 Philips Patentverwaltung Baustein mit elektronischer Schaltung
JPS58164246A (ja) * 1982-03-24 1983-09-29 Nec Corp 半導体装置
US4516123A (en) * 1982-12-27 1985-05-07 At&T Bell Laboratories Integrated circuit including logic array with distributed ground connections
JPS6167231A (ja) * 1984-09-10 1986-04-07 Matsushita Electric Ind Co Ltd 半導体装置
JPS61108160A (ja) * 1984-11-01 1986-05-26 Nec Corp コンデンサ内蔵型半導体装置及びその製造方法
US4737830A (en) * 1986-01-08 1988-04-12 Advanced Micro Devices, Inc. Integrated circuit structure having compensating means for self-inductance effects
JP2674073B2 (ja) * 1988-03-17 1997-11-05 松下電器産業株式会社 集積回路装置
JPH01305543A (ja) * 1988-06-03 1989-12-08 New Japan Radio Co Ltd 半導体装置
JPH02224367A (ja) * 1989-02-27 1990-09-06 Ricoh Co Ltd コンデンサをもつ半導体装置

Also Published As

Publication number Publication date
FR2680602A1 (fr) 1993-02-26
GB2258943A (en) 1993-02-24
TW200631B (it) 1993-02-21
ITMI920375A1 (it) 1993-08-20
JPH0547808A (ja) 1993-02-26
KR930005334A (ko) 1993-03-23
DE4206278A1 (de) 1993-02-25
ITMI920375A0 (it) 1992-02-20
GB9204460D0 (en) 1992-04-15

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Legal Events

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0001 Granted