IT1255411B - Dispositivo a semiconduttore e suo metodo di fabbricazione - Google Patents

Dispositivo a semiconduttore e suo metodo di fabbricazione

Info

Publication number
IT1255411B
IT1255411B ITMI921651A ITMI921651A IT1255411B IT 1255411 B IT1255411 B IT 1255411B IT MI921651 A ITMI921651 A IT MI921651A IT MI921651 A ITMI921651 A IT MI921651A IT 1255411 B IT1255411 B IT 1255411B
Authority
IT
Italy
Prior art keywords
semiconductor device
layer
insulating layer
opening
manufacturing
Prior art date
Application number
ITMI921651A
Other languages
English (en)
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=19316918&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=IT1255411(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI921651A0 publication Critical patent/ITMI921651A0/it
Publication of ITMI921651A1 publication Critical patent/ITMI921651A1/it
Application granted granted Critical
Publication of IT1255411B publication Critical patent/IT1255411B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2041—Photolithographic processes
    • H10P76/2043—Photolithographic processes using an anti-reflective coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/047—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/047—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein
    • H10W20/049—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein by diffusing alloying elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/052—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by treatments not introducing additional elements therein
    • H10W20/0526—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by treatments not introducing additional elements therein by thermal treatment thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H10W20/057—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by selectively depositing, e.g. by using selective CVD or plating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H10W20/059—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by reflowing or applying pressure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H10W20/0633—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material using subtractive patterning of the conductive members
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/064—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying
    • H10W20/066—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying by forming silicides of refractory metals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4405—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4451—Semiconductor materials, e.g. polysilicon

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

Dispositivo a semiconduttore comprendente uno strato di cablaggio formato da: un substrato semiconduttore; uno strato isolante avente un'apertura formata su detto substrato semiconduttore, detta apertura espone una porzione di una superficie di uno strato sottostante di detto strato isolante; un primo stato conduttivo formato su detto strato isolante e che riempie completamente detta apertura, e detto primo strato conduttivo formato da un materiale che non produce un precipitato di silicio in un successivo stadio di trattamento termico.
ITMI921651A 1991-07-08 1992-07-07 Dispositivo a semiconduttore e suo metodo di fabbricazione IT1255411B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR910011543 1991-07-08

Publications (3)

Publication Number Publication Date
ITMI921651A0 ITMI921651A0 (it) 1992-07-07
ITMI921651A1 ITMI921651A1 (it) 1994-01-07
IT1255411B true IT1255411B (it) 1995-10-31

Family

ID=19316918

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI921651A IT1255411B (it) 1991-07-08 1992-07-07 Dispositivo a semiconduttore e suo metodo di fabbricazione

Country Status (9)

Country Link
US (2) US5355020A (it)
JP (1) JP3006735B2 (it)
KR (1) KR960006340B1 (it)
CN (1) CN1031436C (it)
DE (1) DE4222142B4 (it)
FR (1) FR2679069B1 (it)
GB (1) GB2257564B (it)
IT (1) IT1255411B (it)
TW (1) TW520072U (it)

Families Citing this family (74)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960001601B1 (ko) * 1992-01-23 1996-02-02 삼성전자주식회사 반도체 장치의 접촉구 매몰방법 및 구조
TW520072U (en) * 1991-07-08 2003-02-01 Samsung Electronics Co Ltd A semiconductor device having a multi-layer metal contact
JPH07135188A (ja) * 1993-11-11 1995-05-23 Toshiba Corp 半導体装置の製造方法
EP0697723A3 (en) * 1994-08-15 1997-04-16 Ibm Process for metallizing an insulating layer
US5777486A (en) * 1994-10-03 1998-07-07 United Microelectronics Corporation Electromigration test pattern simulating semiconductor components
US5561083A (en) * 1994-12-29 1996-10-01 Lucent Technologies Inc. Method of making multilayered Al-alloy structure for metal conductors
US5625233A (en) * 1995-01-13 1997-04-29 Ibm Corporation Thin film multi-layer oxygen diffusion barrier consisting of refractory metal, refractory metal aluminide, and aluminum oxide
KR960042974A (it) * 1995-05-23 1996-12-21
US5962923A (en) * 1995-08-07 1999-10-05 Applied Materials, Inc. Semiconductor device having a low thermal budget metal filling and planarization of contacts, vias and trenches
KR100270593B1 (ko) * 1996-06-11 2000-12-01 포만 제프리 엘 부분 중첩 상호 접속 구조 및 그 제조 방법
JPH1027797A (ja) * 1996-07-10 1998-01-27 Oki Electric Ind Co Ltd Ａｌ／Ｔｉ積層配線およびその形成方法
US5691250A (en) * 1996-08-29 1997-11-25 Taiwan Semiconductor Manufacturing Company, Ltd Method of forming a metal contact to a novel polysilicon contact extension
US5994218A (en) * 1996-09-30 1999-11-30 Kabushiki Kaisha Toshiba Method of forming electrical connections for a semiconductor device
JPH10125865A (ja) * 1996-10-15 1998-05-15 Fujitsu Ltd 半導体装置、半導体記憶装置、およびその製造方法
US6071810A (en) * 1996-12-24 2000-06-06 Kabushiki Kaisha Toshiba Method of filling contact holes and wiring grooves of a semiconductor device
US6143645A (en) * 1997-02-03 2000-11-07 Texas Instruments Incorporated Reduced temperature contact/via filling
US6593657B1 (en) * 1997-03-03 2003-07-15 Micron Technology, Inc. Contact integration article
US5858873A (en) * 1997-03-12 1999-01-12 Lucent Technologies Inc. Integrated circuit having amorphous silicide layer in contacts and vias and method of manufacture thereof
US5895267A (en) * 1997-07-09 1999-04-20 Lsi Logic Corporation Method to obtain a low resistivity and conformity chemical vapor deposition titanium film
US5960315A (en) * 1997-07-10 1999-09-28 International Business Machines Corporation Tapered via using sidewall spacer reflow
JP3279234B2 (ja) * 1997-10-27 2002-04-30 キヤノン株式会社 半導体装置の製造方法
US6605531B1 (en) * 1997-11-26 2003-08-12 Applied Materials, Inc. Hole-filling technique using CVD aluminum and PVD aluminum integration
US6177348B1 (en) * 1998-01-20 2001-01-23 International Business Machines Corporation Low temperature via fill using liquid phase transport
US6121126A (en) * 1998-02-25 2000-09-19 Micron Technologies, Inc. Methods and structures for metal interconnections in integrated circuits
US6284316B1 (en) * 1998-02-25 2001-09-04 Micron Technology, Inc. Chemical vapor deposition of titanium
US6140236A (en) * 1998-04-21 2000-10-31 Kabushiki Kaisha Toshiba High throughput A1-Cu thin film sputtering process on small contact via for manufacturable beol wiring
US6815303B2 (en) * 1998-04-29 2004-11-09 Micron Technology, Inc. Bipolar transistors with low-resistance emitter contacts
US5994219A (en) * 1998-06-04 1999-11-30 Taiwan Semiconductor Manufacturing Company, Ltd. Add one process step to control the SI distribution of Alsicu to improved metal residue process window
US6289496B1 (en) * 1998-06-29 2001-09-11 Xilinx, Inc. Placement of input-output design objects into a programmable gate array supporting multiple voltage standards
US6625795B1 (en) 1998-06-29 2003-09-23 Xilinx, Inc. Method and apparatus for placement of input-output design objects into a programmable gate array
US6949464B1 (en) 1998-09-03 2005-09-27 Micron Technology, Inc. Contact/via force fill techniques
US6124205A (en) 1998-09-03 2000-09-26 Micron Technology, Inc. Contact/via force fill process
US6417094B1 (en) * 1998-12-31 2002-07-09 Newport Fab, Llc Dual-damascene interconnect structures and methods of fabricating same
TW483152B (en) * 1999-07-01 2002-04-11 Ibm Improved methods of forming the buried strap and its quantum barrier in deep trench cell capacitors
US6221767B1 (en) * 1999-10-28 2001-04-24 United Microelectronics Corp. Method of fabricating a silicide landing pad
US6245656B1 (en) 1999-11-08 2001-06-12 Vanguard International Semiconductor Corporation Method for producing multi-level contacts
US6413863B1 (en) 2000-01-24 2002-07-02 Taiwan Semiconductor Manufacturing Company Method to resolve the passivation surface roughness during formation of the AlCu pad for the copper process
US6194310B1 (en) * 2000-06-01 2001-02-27 Sharp Laboratories Of America, Inc. Method of forming amorphous conducting diffusion barriers
US6373135B1 (en) * 2000-09-14 2002-04-16 Infineon Technologies Ag Semiconductor structure and method of fabrication
US6468908B1 (en) 2001-07-09 2002-10-22 Taiwan Semiconductor Manufacturing Company Al-Cu alloy sputtering method with post-metal quench
US6531388B2 (en) * 2001-07-26 2003-03-11 Samsung Electronics Co., Ltd. Method of forming an aluminum film for use in manufacturing a semiconductor device
JP2005086118A (ja) * 2003-09-11 2005-03-31 Renesas Technology Corp 半導体装置
CN100346454C (zh) * 2004-04-22 2007-10-31 复旦大学 一种硅基器件的金属化接触层结构的制备方法
DE102004048219A1 (de) * 2004-09-30 2006-04-06 Basf Ag Kontaktierung thermoelektrischer Materialien
KR100784106B1 (ko) * 2006-09-08 2007-12-10 주식회사 하이닉스반도체 반도체 소자의 금속 배선 형성 방법
KR100818711B1 (ko) * 2006-12-07 2008-04-01 주식회사 하이닉스반도체 반도체 소자의 소자분리막 형성방법
US8159035B2 (en) * 2007-07-09 2012-04-17 Taiwan Semiconductor Manufacturing Co., Ltd. Metal gates of PMOS devices having high work functions
US9548206B2 (en) 2010-02-11 2017-01-17 Cree, Inc. Ohmic contact structure for group III nitride semiconductor device having improved surface morphology and well-defined edge features
US8563372B2 (en) * 2010-02-11 2013-10-22 Cree, Inc. Methods of forming contact structures including alternating metal and silicon layers and related devices
US9214352B2 (en) 2010-02-11 2015-12-15 Cree, Inc. Ohmic contact to semiconductor device
EP2616771B8 (en) 2010-09-18 2018-12-19 Fairchild Semiconductor Corporation Micromachined monolithic 6-axis inertial sensor
KR101443730B1 (ko) 2010-09-18 2014-09-23 페어차일드 세미컨덕터 코포레이션 미세기계화 다이, 및 직교 오차가 작은 서스펜션을 제조하는 방법
EP2616822B1 (en) 2010-09-18 2015-07-01 Fairchild Semiconductor Corporation Micromachined 3-axis accelerometer with a single proof-mass
KR20130057485A (ko) 2010-09-18 2013-05-31 페어차일드 세미컨덕터 코포레이션 미세 전자 기계 시스템에 미치는 응력을 감소시키기 위한 패키징
US9278845B2 (en) 2010-09-18 2016-03-08 Fairchild Semiconductor Corporation MEMS multi-axis gyroscope Z-axis electrode structure
EP2616389B1 (en) 2010-09-18 2017-04-05 Fairchild Semiconductor Corporation Multi-die mems package
WO2012040211A2 (en) 2010-09-20 2012-03-29 Fairchild Semiconductor Corporation Microelectromechanical pressure sensor including reference capacitor
US9670574B2 (en) 2011-02-16 2017-06-06 Spts Technologies Limited Methods of depositing aluminium layers
GB201102673D0 (en) * 2011-02-16 2011-03-30 Spp Process Technology Systems Uk Ltd Methods of depositing aluminium layers
CN102956499A (zh) * 2011-08-23 2013-03-06 广东中显科技有限公司 多晶硅薄膜的制备方法
US9488693B2 (en) 2012-04-04 2016-11-08 Fairchild Semiconductor Corporation Self test of MEMS accelerometer with ASICS integrated capacitors
EP2647952B1 (en) 2012-04-05 2017-11-15 Fairchild Semiconductor Corporation Mems device automatic-gain control loop for mechanical amplitude drive
EP2647955B8 (en) 2012-04-05 2018-12-19 Fairchild Semiconductor Corporation MEMS device quadrature phase shift cancellation
EP2648334B1 (en) 2012-04-05 2020-06-10 Fairchild Semiconductor Corporation Mems device front-end charge amplifier
US9625272B2 (en) 2012-04-12 2017-04-18 Fairchild Semiconductor Corporation MEMS quadrature cancellation and signal demodulation
DE102013014881B4 (de) 2012-09-12 2023-05-04 Fairchild Semiconductor Corporation Verbesserte Silizium-Durchkontaktierung mit einer Füllung aus mehreren Materialien
TWI514628B (zh) * 2013-10-24 2015-12-21 Lextar Electronics Corp 電極結構與具有電極結構的發光二極體結構
KR20150057148A (ko) * 2013-11-18 2015-05-28 삼성전자주식회사 반도체 장치
CN104253088B (zh) * 2014-04-23 2019-06-11 上海华虹宏力半导体制造有限公司 防止铝尖楔的成膜工艺方法
CN112301317B (zh) * 2020-10-30 2021-05-18 连云港恒顺工业科技有限公司 爪式真空泵转子表面处理工艺
US20230187337A1 (en) * 2021-12-14 2023-06-15 Karumbu Meyyappan Flexible liquid metal connection device and method
CN114973952A (zh) * 2022-05-26 2022-08-30 华为技术有限公司 支撑组件及其制备方法、显示屏组件、电子设备
US12451309B2 (en) 2023-05-30 2025-10-21 Atomic Machines, Inc. Stabilized liquid-solid electrical contact
JP2025040607A (ja) * 2023-09-12 2025-03-25 Tdk株式会社 電子部品

Family Cites Families (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US1157581A (en) * 1915-02-12 1915-10-19 August F Raldeano Fortune-telling device.
JPS52109370A (en) * 1976-03-10 1977-09-13 Nec Corp Semiconductor device
DE2649773A1 (de) * 1976-10-29 1978-05-11 Bosch Gmbh Robert Halbleiteranordnung
JPS56105660A (en) * 1980-01-28 1981-08-22 Nec Corp Semiconductor device
JPS56134757A (en) * 1980-03-26 1981-10-21 Nec Corp Complementary type mos semiconductor device and its manufacture
JPS592352A (ja) * 1982-06-28 1984-01-07 Toshiba Corp 半導体装置の製造方法
US4520554A (en) * 1983-02-10 1985-06-04 Rca Corporation Method of making a multi-level metallization structure for semiconductor device
JPS59154040A (ja) * 1983-02-22 1984-09-03 Toshiba Corp 半導体装置の製造方法
JPS605560A (ja) * 1983-06-23 1985-01-12 Fujitsu Ltd 半導体装置
DE3326142A1 (de) * 1983-07-20 1985-01-31 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit einer aus aluminium oder aus einer aluminiumlegierung bestehenden aeusseren kontaktleiterbahnebene
JPS6063926A (ja) * 1983-08-31 1985-04-12 Fujitsu Ltd 半導体装置の製造方法
JPS6068614A (ja) * 1983-09-26 1985-04-19 Fujitsu Ltd 半導体装置の製造方法
FR2555365B1 (fr) * 1983-11-22 1986-08-29 Efcis Procede de fabrication de circuit integre avec connexions de siliciure de tantale et circuit integre realise selon ce procede
US4720908A (en) * 1984-07-11 1988-01-26 Texas Instruments Incorporated Process for making contacts and interconnects for holes having vertical sidewalls
DE3663871D1 (en) * 1985-04-11 1989-07-13 Siemens Ag Integrated semiconductor circuit having an aluminium or aluminium alloy contact conductor path and an intermediate tantalum silicide layer as a diffusion barrier
JPS61280636A (ja) * 1985-06-05 1986-12-11 Nec Corp 半導体装置の製造方法
US4796081A (en) * 1986-05-02 1989-01-03 Advanced Micro Devices, Inc. Low resistance metal contact for silicon devices
JPS6353949A (ja) * 1986-08-25 1988-03-08 Hitachi Ltd 金属配線の形成方法
JPS6384024A (ja) * 1986-09-26 1988-04-14 Seiko Epson Corp 半導体装置の製造方法
JPS6399546A (ja) * 1986-10-16 1988-04-30 Hitachi Ltd 半導体装置の製造方法
JPS63162854A (ja) * 1986-12-25 1988-07-06 Fujitsu Ltd 金属膜形成方法
US4884123A (en) * 1987-02-19 1989-11-28 Advanced Micro Devices, Inc. Contact plug and interconnect employing a barrier lining and a backfilled conductor material
JPH0622235B2 (ja) * 1987-05-21 1994-03-23 日本電気株式会社 半導体装置の製造方法
JPS6445163A (en) * 1987-08-14 1989-02-17 Seiko Epson Corp Semiconductor device
US4910580A (en) * 1987-08-27 1990-03-20 Siemens Aktiengesellschaft Method for manufacturing a low-impedance, planar metallization composed of aluminum or of an aluminum alloy
US4987562A (en) * 1987-08-28 1991-01-22 Fujitsu Limited Semiconductor layer structure having an aluminum-silicon alloy layer
JPH01175245A (ja) * 1987-12-29 1989-07-11 Fujitsu Ltd 半導体装置及びその製造方法
JPH01243452A (ja) * 1988-03-25 1989-09-28 Hitachi Ltd 半導体集積回路装置
JP2695185B2 (ja) * 1988-05-02 1997-12-24 株式会社日立製作所 半導体集積回路装置及びその製造方法
JPH0268926A (ja) * 1988-09-02 1990-03-08 Seiko Epson Corp 半導体装置の製造方法
DE3830720A1 (de) * 1988-09-09 1990-03-22 Philips Nv Verfahren zum herstellen von halbleiterbauelementen
US5260604A (en) * 1988-09-27 1993-11-09 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with improved immunity to contact and conductor defects
JPH02159065A (ja) * 1988-12-13 1990-06-19 Matsushita Electric Ind Co Ltd コンタクト電極の形成方法
JPH02181919A (ja) * 1989-01-09 1990-07-16 Seiko Epson Corp 半導体装置の製造方法
JP2578193B2 (ja) * 1989-02-01 1997-02-05 沖電気工業株式会社 半導体素子の製造方法
JPH0316130A (ja) * 1989-03-31 1991-01-24 Oki Electric Ind Co Ltd レーザフロー技術を用いた電極配線の形成方法
US4997518A (en) * 1989-03-31 1991-03-05 Oki Electric Industry Co., Ltd. Method for forming an electrode layer by a laser flow technique
US4992152A (en) * 1989-04-20 1991-02-12 Eastman Kodak Company Reducing hillocking in aluminum layers formed on substrates
JPH02310919A (ja) * 1989-05-25 1990-12-26 Yamaha Corp 半導体装置における配線形成方法
US5019533A (en) * 1989-05-26 1991-05-28 The United States Of America As Represented By The Adminstrator Of The National Aeronautics And Space Administration Thermal treatment of silicon integrated circuit chips to prevent and heal voids in aluminum metallization
JPH0341717A (ja) * 1989-07-07 1991-02-22 Seiko Epson Corp 半導体装置の製造方法
JPH03114224A (ja) * 1989-09-27 1991-05-15 Seiko Instr Inc 電極の形成方法
US4970176A (en) * 1989-09-29 1990-11-13 Motorola, Inc. Multiple step metallization process
JPH03155131A (ja) * 1989-11-13 1991-07-03 Sanyo Electric Co Ltd 半導体装置の製造方法
US5108951A (en) * 1990-11-05 1992-04-28 Sgs-Thomson Microelectronics, Inc. Method for forming a metal contact
US4999160A (en) * 1989-12-04 1991-03-12 Micron Technology, Inc. Aluminum alloy containing copper, silicon and titanium for VLSI devices
DE4200809C2 (de) * 1991-03-20 1996-12-12 Samsung Electronics Co Ltd Verfahren zur Bildung einer metallischen Verdrahtungsschicht in einem Halbleiterbauelement
TW520072U (en) * 1991-07-08 2003-02-01 Samsung Electronics Co Ltd A semiconductor device having a multi-layer metal contact
EP0533254A3 (en) * 1991-09-19 1993-06-23 N.V. Philips' Gloeilampenfabrieken Method of manufacturing a semiconductor device whereby a layer comprising aluminium is deposited on a surface for a semiconductor body
US5561083A (en) * 1994-12-29 1996-10-01 Lucent Technologies Inc. Method of making multilayered Al-alloy structure for metal conductors

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JP3006735B2 (ja) 2000-02-07
GB9214440D0 (en) 1992-08-19
KR930003257A (ko) 1993-02-24
GB2257564A (en) 1993-01-13
US5355020A (en) 1994-10-11
JPH05190549A (ja) 1993-07-30
DE4222142A1 (de) 1993-01-21
CN1068444A (zh) 1993-01-27
ITMI921651A1 (it) 1994-01-07
DE4222142B4 (de) 2006-08-03
FR2679069B1 (fr) 1994-02-11
CN1031436C (zh) 1996-03-27
ITMI921651A0 (it) 1992-07-07
FR2679069A1 (fr) 1993-01-15
KR960006340B1 (ko) 1996-05-13
GB2257564B (en) 1995-06-28
US5843842A (en) 1998-12-01
TW520072U (en) 2003-02-01

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