IT1283799B1 - Dispositivo a semicondutture e suo procedimento di fabbricazione - Google Patents

Dispositivo a semicondutture e suo procedimento di fabbricazione

Info

Publication number
IT1283799B1
IT1283799B1 IT96MI001748A ITMI961748A IT1283799B1 IT 1283799 B1 IT1283799 B1 IT 1283799B1 IT 96MI001748 A IT96MI001748 A IT 96MI001748A IT MI961748 A ITMI961748 A IT MI961748A IT 1283799 B1 IT1283799 B1 IT 1283799B1
Authority
IT
Italy
Prior art keywords
semiconducture
manufacturing process
manufacturing
semiconducture device
Prior art date
Application number
IT96MI001748A
Other languages
English (en)
Inventor
Junko Matsubara
Toru Tajima
Shigeru Harada
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of ITMI961748A0 publication Critical patent/ITMI961748A0/it
Publication of ITMI961748A1 publication Critical patent/ITMI961748A1/it
Application granted granted Critical
Publication of IT1283799B1 publication Critical patent/IT1283799B1/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6536Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light
    • H10P14/6538Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to radiation, e.g. visible light by exposure to UV light
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6684Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H10P14/6686Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90Thermal treatments, e.g. annealing or sintering
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/093Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48Insulating materials thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6342Liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating
IT96MI001748A 1995-08-23 1996-08-12 Dispositivo a semicondutture e suo procedimento di fabbricazione IT1283799B1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7214798A JPH0964037A (ja) 1995-08-23 1995-08-23 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
ITMI961748A0 ITMI961748A0 (it) 1996-08-12
ITMI961748A1 ITMI961748A1 (it) 1998-02-12
IT1283799B1 true IT1283799B1 (it) 1998-04-30

Family

ID=16661706

Family Applications (1)

Application Number Title Priority Date Filing Date
IT96MI001748A IT1283799B1 (it) 1995-08-23 1996-08-12 Dispositivo a semicondutture e suo procedimento di fabbricazione

Country Status (6)

Country Link
US (1) US5976626A (it)
JP (1) JPH0964037A (it)
KR (1) KR100266428B1 (it)
DE (1) DE19630342C2 (it)
IT (1) IT1283799B1 (it)
TW (1) TW291598B (it)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3916284B2 (ja) 1997-02-28 2007-05-16 東京応化工業株式会社 多層配線構造の形成方法
JPH1116904A (ja) 1997-06-26 1999-01-22 Mitsubishi Electric Corp 半導体装置及びその製造方法
DE19804375B4 (de) * 1997-06-26 2005-05-19 Mitsubishi Denki K.K. Verfahren zur Herstellung eines Zwischenschichtisolierfilmes
KR100459686B1 (ko) * 1997-06-27 2005-01-17 삼성전자주식회사 반도체장치의콘택홀형성방법
KR100413044B1 (ko) * 1997-06-30 2004-03-09 주식회사 하이닉스반도체 반도체 장치의 비아홀 형성 방법
KR100460803B1 (ko) * 1997-07-15 2005-04-06 삼성전자주식회사 반도체소자제조방법
JP3226021B2 (ja) * 1997-09-02 2001-11-05 日本電気株式会社 半導体装置の製造方法
US6274516B1 (en) * 1997-10-27 2001-08-14 Canon Kabushiki Kaisha Process for manufacturing interlayer insulating film and display apparatus using this film and its manufacturing method
JP2000077410A (ja) 1998-08-27 2000-03-14 Tokyo Ohka Kogyo Co Ltd 多層配線構造の形成方法
JP3329290B2 (ja) 1998-11-27 2002-09-30 日本電気株式会社 半導体装置の製造方法
KR100355864B1 (ko) * 1999-12-31 2002-10-12 아남반도체 주식회사 반도체 소자의 제조 방법
KR100325616B1 (ko) * 1999-12-31 2002-02-25 황인길 반도체 소자의 제조 방법
JP3676185B2 (ja) * 2000-04-14 2005-07-27 シャープ株式会社 半導体装置
US6232217B1 (en) 2000-06-05 2001-05-15 Chartered Semiconductor Manufacturing Ltd. Post treatment of via opening by N-containing plasma or H-containing plasma for elimination of fluorine species in the FSG near the surfaces of the via opening
US6358842B1 (en) 2000-08-07 2002-03-19 Chartered Semiconductor Manufacturing Ltd. Method to form damascene interconnects with sidewall passivation to protect organic dielectrics
JP2006228990A (ja) * 2005-02-17 2006-08-31 Toshiba Corp 半導体装置の製造方法、及び製造装置
JP4899365B2 (ja) * 2005-07-20 2012-03-21 富士電機株式会社 半導体装置の製造方法
KR100694477B1 (ko) * 2005-12-29 2007-03-12 매그나칩 반도체 유한회사 에스램셀 및 그의 제조 방법
US20150206794A1 (en) * 2014-01-17 2015-07-23 Taiwan Semiconductor Manufacturing Company, Ltd. Method for Removing Micro Scratches In Chemical Mechanical Polishing Processes
US11884839B2 (en) * 2016-08-29 2024-01-30 Nissan Chemical Corporation Acetal-protected silanol group-containing polysiloxane composition

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60235711A (ja) * 1984-05-07 1985-11-22 Fujitsu Ltd SiO2膜の形成方法
US4676868A (en) * 1986-04-23 1987-06-30 Fairchild Semiconductor Corporation Method for planarizing semiconductor substrates
KR910008980B1 (ko) * 1988-12-20 1991-10-26 현대전자산업 주식회사 자외선을 이용한 s.o.g 박막 경화 방법
US5003062A (en) * 1990-04-19 1991-03-26 Taiwan Semiconductor Manufacturing Co. Semiconductor planarization process for submicron devices
US5189502A (en) * 1990-05-08 1993-02-23 Nec Corporation Semiconductor device having ventilative insulating films
CA2026605C (en) * 1990-10-01 2001-07-17 Luc Ouellet Multi-level interconnection cmos devices including sog
JPH05121572A (ja) * 1991-10-25 1993-05-18 Fujitsu Ltd 半導体装置の製造方法
JPH0616410A (ja) * 1991-12-13 1994-01-25 Alps Electric Co Ltd 絶縁膜およびその製造方法
JPH05243223A (ja) * 1992-02-28 1993-09-21 Fujitsu Ltd 集積回路装置の製造方法
JPH06112191A (ja) * 1992-09-28 1994-04-22 Fujitsu Ltd 半導体装置
JP2809018B2 (ja) * 1992-11-26 1998-10-08 日本電気株式会社 半導体装置およびその製造方法
JP3217528B2 (ja) * 1993-03-12 2001-10-09 沖電気工業株式会社 ケイ酸ガラス薄膜の形成方法
US5459086A (en) * 1994-11-07 1995-10-17 United Microelectronics Corporation Metal via sidewall tilt angle implant for SOG

Also Published As

Publication number Publication date
JPH0964037A (ja) 1997-03-07
US5976626A (en) 1999-11-02
DE19630342C2 (de) 2003-06-18
ITMI961748A1 (it) 1998-02-12
TW291598B (en) 1996-11-21
DE19630342A1 (de) 1997-02-27
KR100266428B1 (ko) 2000-09-15
KR970013070A (ko) 1997-03-29
ITMI961748A0 (it) 1996-08-12

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