IT1296441B1 - Processo per la fabbricazione di un dispositivo a gate mos a canali p con impianto di base attraverso la finestra di contatto - Google Patents

Processo per la fabbricazione di un dispositivo a gate mos a canali p con impianto di base attraverso la finestra di contatto

Info

Publication number
IT1296441B1
IT1296441B1 IT97MI002545A ITMI972545A IT1296441B1 IT 1296441 B1 IT1296441 B1 IT 1296441B1 IT 97MI002545 A IT97MI002545 A IT 97MI002545A IT MI972545 A ITMI972545 A IT MI972545A IT 1296441 B1 IT1296441 B1 IT 1296441B1
Authority
IT
Italy
Prior art keywords
manufacturing
mos device
contact window
channel gate
gate mos
Prior art date
Application number
IT97MI002545A
Other languages
English (en)
Inventor
Daniel M Kinzer
Original Assignee
Int Rectifier Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Int Rectifier Corp filed Critical Int Rectifier Corp
Publication of ITMI972545A1 publication Critical patent/ITMI972545A1/it
Application granted granted Critical
Publication of IT1296441B1 publication Critical patent/IT1296441B1/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • H10D12/032Manufacture or treatment of IGBTs of vertical IGBTs
    • H10D12/035Etching a recess in the emitter region 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00Bonding of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • H10D12/461Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D18/00Thyristors
    • H10D18/40Thyristors with turn-on by field effect 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D18/00Thyristors
    • H10D18/60Gate-turn-off devices 
    • H10D18/65Gate-turn-off devices  with turn-off by field effect 
    • H10D18/655Gate-turn-off devices  with turn-off by field effect  produced by insulated gate structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/192Base regions of thyristors
    • H10D62/206Cathode base regions of thyristors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393Body regions of DMOS transistors or IGBTs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0102Manufacture or treatment of thyristors having built-in components, e.g. thyristor having built-in diode
    • H10D84/0105Manufacture or treatment of thyristors having built-in components, e.g. thyristor having built-in diode the built-in components being field-effect devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251Source or drain electrodes for field-effect devices
    • H10D64/256Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies
IT97MI002545A 1996-11-18 1997-11-17 Processo per la fabbricazione di un dispositivo a gate mos a canali p con impianto di base attraverso la finestra di contatto IT1296441B1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US3105196P 1996-11-18 1996-11-18

Publications (2)

Publication Number Publication Date
ITMI972545A1 ITMI972545A1 (it) 1999-05-17
IT1296441B1 true IT1296441B1 (it) 1999-06-25

Family

ID=21857412

Family Applications (1)

Application Number Title Priority Date Filing Date
IT97MI002545A IT1296441B1 (it) 1996-11-18 1997-11-17 Processo per la fabbricazione di un dispositivo a gate mos a canali p con impianto di base attraverso la finestra di contatto

Country Status (9)

Country Link
US (2) US5879968A (it)
JP (1) JPH10229193A (it)
KR (1) KR100272051B1 (it)
DE (1) DE19750221B4 (it)
FR (1) FR2756664A1 (it)
GB (1) GB2319395B (it)
IT (1) IT1296441B1 (it)
SG (1) SG60150A1 (it)
TW (1) TW367624B (it)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6939776B2 (en) * 1998-09-29 2005-09-06 Sanyo Electric Co., Ltd. Semiconductor device and a method of fabricating the same
US6472327B2 (en) * 1999-08-03 2002-10-29 Advanced Micro Devices, Inc. Method and system for etching tunnel oxide to reduce undercutting during memory array fabrication
DE10055886A1 (de) * 2000-11-08 2002-05-29 Humboldt Uni Zu Berlin Univers Impfstoffe, die rekombinante Hantavirusproteine enthalten, Verfahren zu iher Herstellung und ihre Verwendung
DE10134546A1 (de) * 2001-07-16 2003-02-06 X Fab Ges Zur Fertigung Von Wa VDMOS-Transistor und Verfahren zu seiner Herstellung
DE10235000B4 (de) * 2002-07-31 2007-01-04 Infineon Technologies Ag Verfahren zur Bildung einer Kanalzone eines Transistors und NMOS-Transistor
US6870218B2 (en) * 2002-12-10 2005-03-22 Fairchild Semiconductor Corporation Integrated circuit structure with improved LDMOS design
US7388379B2 (en) * 2003-05-01 2008-06-17 Pathfinder Energy Services, Inc. Series-resonant tuning of a downhole loop antenna
JP4748951B2 (ja) * 2004-06-01 2011-08-17 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
CN101593695B (zh) * 2008-05-30 2011-06-15 中芯国际集成电路制造(上海)有限公司 功率场效应管晶片弯曲的解决方法
TWI425575B (zh) * 2010-07-09 2014-02-01 陳自雄 低閘容金氧半p-n接面二極體結構及其製作方法
CN104576359B (zh) * 2013-10-23 2017-10-27 无锡华润上华科技有限公司 功率二极管的制备方法
DE102015121299B4 (de) 2015-12-08 2017-08-10 Zippy Technology Corp. Spitzenstrom-Aufzeichnungsmodul
CN114460368B (zh) * 2020-11-09 2023-05-16 长鑫存储技术有限公司 接触电阻的测试方法与装置
US11719730B2 (en) 2020-11-09 2023-08-08 Changxin Memory Technologies, Inc. Test method and device for contact resistor

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6021571A (ja) * 1983-07-15 1985-02-02 Tdk Corp 半導体装置及びその製造方法
DE3402867A1 (de) * 1984-01-27 1985-08-01 Siemens AG, 1000 Berlin und 8000 München Halbleiterbauelement mit kontaktloch
JPH0834311B2 (ja) * 1987-06-10 1996-03-29 日本電装株式会社 半導体装置の製造方法
JPH0247874A (ja) * 1988-08-10 1990-02-16 Fuji Electric Co Ltd Mos型半導体装置の製造方法
US4898835A (en) * 1988-10-12 1990-02-06 Sgs-Thomson Microelectronics, Inc. Single mask totally self-aligned power MOSFET cell fabrication process
JPH0783122B2 (ja) * 1988-12-01 1995-09-06 富士電機株式会社 半導体装置の製造方法
US5072266A (en) * 1988-12-27 1991-12-10 Siliconix Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
JPH04152536A (ja) * 1990-10-16 1992-05-26 Fuji Electric Co Ltd Mis型半導体装置の製造方法
JP3168763B2 (ja) * 1992-03-30 2001-05-21 株式会社デンソー 半導体装置及びその製造方法
DE69330603T2 (de) * 1993-09-30 2002-07-04 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, Catania Verfahren zur Metallisierung und Verbindung bei der Herstellung von Leistungshalbleiterbauelementen
US5486715A (en) * 1993-10-15 1996-01-23 Ixys Corporation High frequency MOS device
EP0654829A1 (en) * 1993-11-12 1995-05-24 STMicroelectronics, Inc. Increased density MOS-gated double diffused semiconductor devices
US5795793A (en) * 1994-09-01 1998-08-18 International Rectifier Corporation Process for manufacture of MOS gated device with reduced mask count
KR0143459B1 (ko) * 1995-05-22 1998-07-01 한민구 모오스 게이트형 전력 트랜지스터

Also Published As

Publication number Publication date
DE19750221B4 (de) 2004-06-03
KR100272051B1 (ko) 2000-12-01
DE19750221A1 (de) 1998-05-20
FR2756664A1 (fr) 1998-06-05
GB2319395B (en) 2001-07-04
KR19980042422A (ko) 1998-08-17
US5879968A (en) 1999-03-09
ITMI972545A1 (it) 1999-05-17
JPH10229193A (ja) 1998-08-25
SG60150A1 (en) 1999-02-22
GB2319395A (en) 1998-05-20
GB9724413D0 (en) 1998-01-14
US6207974B1 (en) 2001-03-27
TW367624B (en) 1999-08-21

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