Classifications

• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
  • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
  • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
  • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
  • G11C29/46—Test trigger logic
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
  • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
  • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
  • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
  • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
  • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10B—ELECTRONIC MEMORY DEVICES
  • H10B10/00—Static random access memory [SRAM] devices
  • H10B10/15—Static random access memory [SRAM] devices comprising a resistor load element

Landscapes

• Engineering & Computer Science (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Computer Hardware Design (AREA)
• Semiconductor Integrated Circuits (AREA)
• For Increasing The Reliability Of Semiconductor Memories (AREA)
• Testing Or Measuring Of Semiconductors Or The Like (AREA)
• Design And Manufacture Of Integrated Circuits (AREA)
• Static Random-Access Memory (AREA)
• Tests Of Electronic Circuits (AREA)

Applications Claiming Priority (1)

Publications (3)

Family

ID=16750052

Family Applications (1)

Country Status (4)

Families Citing this family (12)

Family Cites Families (4)

• 1993
  • 1993-09-06 JP JP5220369A patent/JPH0774318A/ja active Pending
• 1994
  • 1994-04-13 US US08/226,849 patent/US5450362A/en not_active Expired - Fee Related
  • 1994-04-18 KR KR1019940008059A patent/KR0135712B1/ko not_active Expired - Fee Related
  • 1994-04-18 IT ITMI940742A patent/IT1270038B/it active IP Right Grant

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