ITTO980557A0 - Metodo di programmazione rapida per effetto tunnel di memorie a porta flottante - Google Patents

Metodo di programmazione rapida per effetto tunnel di memorie a porta flottante

Info

Publication number
ITTO980557A0
ITTO980557A0 IT98TO000557A ITTO980557A ITTO980557A0 IT TO980557 A0 ITTO980557 A0 IT TO980557A0 IT 98TO000557 A IT98TO000557 A IT 98TO000557A IT TO980557 A ITTO980557 A IT TO980557A IT TO980557 A0 ITTO980557 A0 IT TO980557A0
Authority
IT
Italy
Prior art keywords
programming method
tunnel effect
floating door
rapid programming
memory tunnel
Prior art date
Application number
IT98TO000557A
Other languages
English (en)
Inventor
Bruno Ricco'
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT98TO000557A priority Critical patent/ITTO980557A1/it
Publication of ITTO980557A0 publication Critical patent/ITTO980557A0/it
Priority to US09/344,425 priority patent/US6172913B1/en
Publication of ITTO980557A1 publication Critical patent/ITTO980557A1/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628Programming or writing circuits; Data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/565Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using capacitive charge storage elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
IT98TO000557A 1998-06-26 1998-06-26 Metodo di programmazione rapida per effetto tunnel di memorie a porta flottante ITTO980557A1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT98TO000557A ITTO980557A1 (it) 1998-06-26 1998-06-26 Metodo di programmazione rapida per effetto tunnel di memorie a porta flottante
US09/344,425 US6172913B1 (en) 1998-06-26 1999-06-25 Method for fast programming floating gate memories by tunnel effect

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT98TO000557A ITTO980557A1 (it) 1998-06-26 1998-06-26 Metodo di programmazione rapida per effetto tunnel di memorie a porta flottante

Publications (2)

Publication Number Publication Date
ITTO980557A0 true ITTO980557A0 (it) 1998-06-26
ITTO980557A1 ITTO980557A1 (it) 1999-12-26

Family

ID=11416880

Family Applications (1)

Application Number Title Priority Date Filing Date
IT98TO000557A ITTO980557A1 (it) 1998-06-26 1998-06-26 Metodo di programmazione rapida per effetto tunnel di memorie a porta flottante

Country Status (2)

Country Link
US (1) US6172913B1 (it)
IT (1) ITTO980557A1 (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7366013B2 (en) * 2005-12-09 2008-04-29 Micron Technology, Inc. Single level cell programming in a multiple level cell non-volatile memory device
US10861550B1 (en) * 2019-06-06 2020-12-08 Microchip Technology Incorporated Flash memory cell adapted for low voltage and/or non-volatile performance

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5986931A (en) * 1997-01-02 1999-11-16 Caywood; John M. Low voltage single CMOS electrically erasable read-only memory
KR100272037B1 (ko) * 1997-02-27 2000-12-01 니시무로 타이죠 불휘발성 반도체 기억 장치
JPH10256400A (ja) * 1997-03-10 1998-09-25 Mitsubishi Electric Corp 不揮発性半導体記憶装置
US6009017A (en) * 1998-03-13 1999-12-28 Macronix International Co., Ltd. Floating gate memory with substrate band-to-band tunneling induced hot electron injection

Also Published As

Publication number Publication date
US6172913B1 (en) 2001-01-09
ITTO980557A1 (it) 1999-12-26

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