JP4351214B2 - 電子装置及びその製造方法 - Google Patents

電子装置及びその製造方法 Download PDF

Info

Publication number
JP4351214B2
JP4351214B2 JP2005515288A JP2005515288A JP4351214B2 JP 4351214 B2 JP4351214 B2 JP 4351214B2 JP 2005515288 A JP2005515288 A JP 2005515288A JP 2005515288 A JP2005515288 A JP 2005515288A JP 4351214 B2 JP4351214 B2 JP 4351214B2
Authority
JP
Japan
Prior art keywords
interposer
electronic
electronic device
electronic element
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005515288A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2005045925A1 (ja
Inventor
英次 高池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Publication of JPWO2005045925A1 publication Critical patent/JPWO2005045925A1/ja
Application granted granted Critical
Publication of JP4351214B2 publication Critical patent/JP4351214B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/28—Arrangements for cooling comprising Peltier coolers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/293—Configurations of stacked chips characterised by non-galvanic coupling between the chips, e.g. capacitive coupling
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
    • G02B6/4214—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/43—Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01221—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition
    • H10W72/01225—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition in solid form, e.g. by using a powder or by stud bumping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07321—Aligning
    • H10W72/07327—Aligning involving guiding structures, e.g. spacers or supporting members
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/142—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations exposing the passive side of the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
JP2005515288A 2003-11-07 2004-11-01 電子装置及びその製造方法 Expired - Fee Related JP4351214B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2003377892 2003-11-07
JP2003377892 2003-11-07
JP2004130217 2004-04-26
JP2004130217 2004-04-26
PCT/JP2004/016244 WO2005045925A1 (ja) 2003-11-07 2004-11-01 電子装置及びその製造方法

Publications (2)

Publication Number Publication Date
JPWO2005045925A1 JPWO2005045925A1 (ja) 2007-05-24
JP4351214B2 true JP4351214B2 (ja) 2009-10-28

Family

ID=34575923

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005515288A Expired - Fee Related JP4351214B2 (ja) 2003-11-07 2004-11-01 電子装置及びその製造方法

Country Status (6)

Country Link
US (1) US7847411B2 (2)
EP (1) EP1681717B1 (2)
JP (1) JP4351214B2 (2)
KR (1) KR100784454B1 (2)
TW (1) TW200524101A (2)
WO (1) WO2005045925A1 (2)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006278906A (ja) * 2005-03-30 2006-10-12 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
JP4716819B2 (ja) * 2005-08-22 2011-07-06 新光電気工業株式会社 インターポーザの製造方法
JP2007170830A (ja) * 2005-12-19 2007-07-05 Fujikura Ltd 半導体圧力センサ及びその製造方法
JP2007184426A (ja) * 2006-01-06 2007-07-19 Shinko Electric Ind Co Ltd 半導体装置の製造方法
KR100771874B1 (ko) * 2006-07-06 2007-11-01 삼성전자주식회사 반도체 탭 패키지 및 그 제조방법
JP4783692B2 (ja) * 2006-08-10 2011-09-28 新光電気工業株式会社 キャパシタ内蔵基板及びその製造方法と電子部品装置
US7659151B2 (en) * 2007-04-12 2010-02-09 Micron Technology, Inc. Flip chip with interposer, and methods of making same
JP5238182B2 (ja) * 2007-04-19 2013-07-17 株式会社フジクラ 積層配線基板の製造方法
US9610758B2 (en) 2007-06-21 2017-04-04 General Electric Company Method of making demountable interconnect structure
US9953910B2 (en) * 2007-06-21 2018-04-24 General Electric Company Demountable interconnect structure
JP2009224616A (ja) * 2008-03-17 2009-10-01 Shinko Electric Ind Co Ltd 電子部品内蔵基板及びその製造方法、及び半導体装置
CN101364568B (zh) * 2008-07-10 2011-11-30 旭丽电子(广州)有限公司 镜头模块的制造方法及以该方法所制成的镜头模块
KR101013551B1 (ko) * 2008-08-29 2011-02-14 주식회사 하이닉스반도체 반도체 패키지 및 이의 제조 방법
US8383457B2 (en) 2010-09-03 2013-02-26 Stats Chippac, Ltd. Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect
USRE48111E1 (en) 2009-08-21 2020-07-21 JCET Semiconductor (Shaoxing) Co. Ltd. Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect
US8169058B2 (en) 2009-08-21 2012-05-01 Stats Chippac, Ltd. Semiconductor device and method of stacking die on leadframe electrically connected by conductive pillars
US8237278B2 (en) * 2009-11-16 2012-08-07 International Business Machines Corporation Configurable interposer
WO2011101170A1 (de) * 2010-02-22 2011-08-25 Andreas Jakob Verfahren und anordnung zum herstellen eines halbleitermoduls
DE102010025966B4 (de) * 2010-07-02 2012-03-08 Schott Ag Interposer und Verfahren zum Herstellen von Löchern in einem Interposer
JP5537446B2 (ja) * 2011-01-14 2014-07-02 株式会社東芝 発光装置、発光モジュール、発光装置の製造方法
EP4050649A1 (en) * 2011-08-16 2022-08-31 Intel Corporation Offset interposers for large-bottom packages and large-die package-on-package structures
WO2013100995A1 (en) 2011-12-28 2013-07-04 Intel Corporation Photonic package architecture
US9288909B2 (en) * 2012-02-01 2016-03-15 Marvell World Trade Ltd. Ball grid array package substrate with through holes and method of forming same
US9761506B2 (en) * 2012-02-23 2017-09-12 Rohm Co., Ltd. Semiconductor device and fabrication method for the same
JP2014038910A (ja) * 2012-08-13 2014-02-27 Toshiba Corp 光電気集積パッケージモジュール
US9490240B2 (en) * 2012-09-28 2016-11-08 Intel Corporation Film interposer for integrated circuit devices
JP2014072494A (ja) * 2012-10-01 2014-04-21 Toshiba Corp 半導体装置及びその製造方法
US10483132B2 (en) 2012-12-28 2019-11-19 Taiwan Semiconductor Manufacturing Company, Ltd. Post-passivation interconnect structure and method of forming the same
US9721812B2 (en) * 2015-11-20 2017-08-01 International Business Machines Corporation Optical device with precoated underfill
JP7145515B2 (ja) * 2017-04-28 2022-10-03 国立研究開発法人産業技術総合研究所 光電子集積回路及びコンピューティング装置
JP6573415B1 (ja) * 2018-11-15 2019-09-11 有限会社アイピーシステムズ ビア配線形成用基板及びビア配線形成用基板の製造方法並びに半導体装置実装部品の製造方法
KR102301877B1 (ko) * 2019-12-27 2021-09-15 웨이브로드 주식회사 반도체 발광소자
US11966090B2 (en) * 2021-03-03 2024-04-23 Taiwan Semiconductor Manufacturing Co., Ltd. Heterogeneous packaging integration of photonic and electronic elements
WO2022209438A1 (ja) * 2021-03-29 2022-10-06 株式会社村田製作所 電子部品パッケージ、電子部品ユニットおよび電子部品パッケージの製造方法
US12009272B2 (en) * 2021-11-15 2024-06-11 Texas Instruments Incorporated Integral redistribution layer for WCSP
US20240304440A1 (en) * 2023-03-06 2024-09-12 Fabric8Labs, Inc. Electrochemical-additive manufacturing systems with protected electrode arrays
US20250076599A1 (en) * 2023-09-05 2025-03-06 Taiwan Semiconductor Manufacturing Company Limited Interposer with planar sidewall surface for optical coupling and methods of forming the same

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4811082A (en) * 1986-11-12 1989-03-07 International Business Machines Corporation High performance integrated circuit packaging structure
JPH0636407B2 (ja) * 1988-11-05 1994-05-11 信越半導体株式会社 半導体ウエーハ接合方法
US6586835B1 (en) * 1998-08-31 2003-07-01 Micron Technology, Inc. Compact system module with built-in thermoelectric cooling
US6306680B1 (en) 1999-02-22 2001-10-23 General Electric Company Power overlay chip scale packages for discrete power devices
JP2000349194A (ja) * 1999-06-08 2000-12-15 Matsushita Electric Ind Co Ltd 半導体装置の製造方法および半導体装置
JP2001007236A (ja) * 1999-06-17 2001-01-12 Nitto Denko Corp ウェハー状積層体および半導体素子パッケージならびにウェハー状積層体の製造方法
JP2001223287A (ja) * 2000-02-07 2001-08-17 Mitsui High Tec Inc インターポーザーの製造方法
US7271491B1 (en) * 2000-08-31 2007-09-18 Micron Technology, Inc. Carrier for wafer-scale package and wafer-scale package including the carrier
JP2002134545A (ja) * 2000-10-26 2002-05-10 Oki Electric Ind Co Ltd 半導体集積回路チップ及び基板、並びにその製造方法
JP2002164369A (ja) 2000-11-28 2002-06-07 Sony Corp 半導体装置およびその製造方法
US6937479B2 (en) * 2001-08-21 2005-08-30 The Charles Stark Draper Laboratory, Inc. Sensor isolation system
US7418163B2 (en) * 2002-03-28 2008-08-26 Chakravorty Kishore K Optoelectrical package
JP2004079701A (ja) * 2002-08-14 2004-03-11 Sony Corp 半導体装置及びその製造方法
JP2004140037A (ja) * 2002-10-15 2004-05-13 Oki Electric Ind Co Ltd 半導体装置、及びその製造方法
JP3808030B2 (ja) * 2002-11-28 2006-08-09 沖電気工業株式会社 半導体装置及びその製造方法

Also Published As

Publication number Publication date
EP1681717A4 (en) 2009-07-29
KR100784454B1 (ko) 2007-12-11
JPWO2005045925A1 (ja) 2007-05-24
TW200524101A (en) 2005-07-16
US7847411B2 (en) 2010-12-07
US20070158832A1 (en) 2007-07-12
TWI353045B (2) 2011-11-21
WO2005045925A1 (ja) 2005-05-19
EP1681717A1 (en) 2006-07-19
EP1681717B1 (en) 2017-03-29
KR20060080236A (ko) 2006-07-07

Similar Documents

Publication Publication Date Title
JP4351214B2 (ja) 電子装置及びその製造方法
CN100461371C (zh) 半导体芯片及其制造方法、半导体装置及其制造方法
US7915076B2 (en) Hybrid module and method of manufacturing the same
JP4425936B2 (ja) 光モジュール
US7413929B2 (en) Integrated chip package structure using organic substrate and method of manufacturing the same
KR100427925B1 (ko) 반도체 장치 및 그 제조 방법
JP4163689B2 (ja) 電気光学組立品
JPH10135270A (ja) 半導体装置及びその製造方法
US20250286341A1 (en) Method for preparing optoelectronic integrated semiconductor packaging structure
JP2007287801A (ja) 電気・光混載三次元半導体モジュール及びハイブリット回路装置並びに携帯型電話機
JP7044653B2 (ja) 半導体装置および半導体装置の製造方法
JP2009222935A (ja) 光導波路モジュール、光導波路モジュールの製造方法
JP2006528834A (ja) カプセル化された光パッケージ
JP2005195991A (ja) 光電複合装置及びこの装置に用いられる光導波路、並びに光電複合装置の実装構造
CN115685456B (zh) 封装结构及其形成方法
JP2006270036A (ja) ハイブリットモジュール及びその製造方法
JP2004193221A (ja) 半導体回路素子・光学素子混載ハイブリットモジュール及びその製造方法
JP4655674B2 (ja) 光電変換装置及びその製造方法、並びに光導波モジュール及び光情報処理装置
KR100239387B1 (ko) 가요성(可僥性) 회로 기판을 이용한 볼 그리드 어레이(Ball Grid Array : BGA) 반도체 패키지 및 그 제조 방법
JPH09148482A (ja) 半導体装置
JP3670220B2 (ja) 半導体装置の製造方法
JP5104039B2 (ja) 光基板の製造方法
JP2005252041A (ja) 光電変換装置及びその実装構造、インターポーザー、並びに光情報処理装置
JP2005181645A (ja) 光導波路及びその製造方法、並びに光情報処理装置
CN117192700A (zh) 一种集成光子封装结构及其形成方法

Legal Events

Date Code Title Description
A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090407

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090601

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090721

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090723

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120731

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4351214

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120731

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130731

Year of fee payment: 4

LAPS Cancellation because of no payment of annual fees