JP4700472B2 - 基板およびこの上にヘテロエピタキシャル堆積した珪素とゲルマニウムからなる層を有する多層構造体の製造方法 - Google Patents
基板およびこの上にヘテロエピタキシャル堆積した珪素とゲルマニウムからなる層を有する多層構造体の製造方法 Download PDFInfo
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- JP4700472B2 JP4700472B2 JP2005319746A JP2005319746A JP4700472B2 JP 4700472 B2 JP4700472 B2 JP 4700472B2 JP 2005319746 A JP2005319746 A JP 2005319746A JP 2005319746 A JP2005319746 A JP 2005319746A JP 4700472 B2 JP4700472 B2 JP 4700472B2
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2902—Materials being Group IVA materials
- H10P14/2905—Silicon, silicon germanium or germanium
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3204—Materials thereof being Group IVA semiconducting materials
- H10P14/3211—Silicon, silicon germanium or germanium
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3242—Structure
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3242—Structure
- H10P14/3244—Layer structure
- H10P14/3254—Graded layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3411—Silicon, silicon germanium or germanium
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- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Recrystallisation Techniques (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Chemical Vapour Deposition (AREA)
Description
基板上にヘテロエピタキシャル堆積した、組成Si1−xGexを有し、珪素の格子定数と異なる格子定数を有する珪素とゲルマニウムからなる層(SiGe層)を準備し、
SiGe層上にねじれのずれを結合する組成Si1−yGeyを有する薄い中間層を堆積し、
前記中間層上に少なくとも1個の他の層を堆積する
ことからなる多層構造体の製造方法である。
珪素からなる基板ウェーハを単独ウェーハエピタキシャル反応器中で減圧下で処理した。以下の処理工程を実施した。
工程1:反応器を充填する
工程2:水素(H2ベーク)下1120℃の温度で基板ウェーハを熱処理する
工程3:800〜900℃の温度で成長するゲルマニウム部分(勾配のある層)(0〜20%)を有するSiGe層を堆積する
工程4:ゲルマニウム20%の一定の割合を有する珪素とゲルマニウムからなる緩衝層(一定の組成の層)を堆積する
工程5:700℃の温度で張設された珪素からなる厚さ18nmの層を堆積する
工程6:反応器から得られた多層構造体を取り出す。
比較例と同じ形式の他の基板ウェーハを比較例と同じ反応器中で処理したが、以下の点が相違した。
工程1〜3:比較例と同じ
工程4:1050℃の温度で塩化水素、ジクロロシランおよびゲルマンの混合物を導入することによりゲルマニウム20%の一定の割合を有する珪素とゲルマニウムからなる中間層を堆積する
工程5〜7:比較例の工程4〜6と同じ。
中間層の検査を横断面TEM(透過型電子顕微鏡、X−TEM)で行った。図1は勾配のある層(ずれの網状組織を有する)と一定の組成の層の間の中間層(境界層)を明らかに示す。中間層の厚さは約2〜3nmである。図2は中間層中の深いSiGe層からのずれをどのように捕捉するかを示す。ずれはSiGe層と中間層の間の境界面の内部に延びるが、緩衝層には更に成長しない。
Claims (8)
- 珪素からなる表面上にヘテロエピタキシャル堆積した、組成Si1−xGexを有し、珪素の格子定数と異なる格子定数を有する珪素とゲルマニウムからなる層(SiGe層)を準備し、SiGe層上に、900〜1100℃の温度で最高で50nm/分の堆積速度で、2〜30nmの厚さを有する、ねじれのずれを結合する組成Si1−yGeyを有する珪素とゲルマニウムからなる薄い中間層を堆積し、前記中間層上に少なくとも1個の他の層を堆積することからなり、前記他の層は一定の組成Si 1-z Ge z を有する弛緩したヘテロエピタキシャル層であるか又は張設した珪素からなる層であり、かつ前記中間層を堆積するためにSiGe層を水素、ハロゲン化水素化合物、珪素化合物およびゲルマニウム化合物を含有するガス状混合物にさらす、多層構造体の製造方法。
- 中間層を気圧または減圧下で堆積する請求項1記載の方法。
- 中間層を堆積する際にハロゲン化水素としてHClを使用する請求項1記載の方法。
- 中間層を堆積する際に珪素化合物としてジクロロシランを使用する請求項1記載の方法。
- 中間層を堆積する際にゲルマニウム化合物としてGeH4を使用する請求項1記載の方法。
- ガス状混合物が一方でハロゲン化水素および他方で珪素化合物およびゲルマニウム化合物を100:1〜1:1の容積比で含有する請求項1記載の方法。
- SiGe層を層として準備し、前記層内でSiGe層の厚さに沿ってゲルマニウム濃度が増加する請求項1から6までのいずれか1項記載の方法。
- 中間層に組成Si1−zGezを有する弛緩した前記ヘテロエピタキシャル層を堆積し、組成Si1−zGezを有する弛緩したヘテロエピタキシャル層に張設した珪素からなる層を堆積する請求項1から7までのいずれか1項記載の方法。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102004053307A DE102004053307B4 (de) | 2004-11-04 | 2004-11-04 | Mehrschichtenstruktur umfassend ein Substrat und eine darauf heteroepitaktisch abgeschiedene Schicht aus Silicium und Germanium und ein Verfahren zu deren Herstellung |
| DE102004053307.5 | 2004-11-04 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006135329A JP2006135329A (ja) | 2006-05-25 |
| JP4700472B2 true JP4700472B2 (ja) | 2011-06-15 |
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| Application Number | Title | Priority Date | Filing Date |
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| JP2005319746A Expired - Lifetime JP4700472B2 (ja) | 2004-11-04 | 2005-11-02 | 基板およびこの上にヘテロエピタキシャル堆積した珪素とゲルマニウムからなる層を有する多層構造体の製造方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US7723214B2 (ja) |
| JP (1) | JP4700472B2 (ja) |
| KR (1) | KR100797131B1 (ja) |
| CN (1) | CN100580893C (ja) |
| DE (1) | DE102004053307B4 (ja) |
| FR (1) | FR2878072B1 (ja) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102008062685A1 (de) * | 2008-12-17 | 2010-06-24 | Siltronic Ag | Halbleiterscheibe mit einer SiGe-Schicht und Verfahren zur Herstellung der SiGe-Schicht |
| CN102117741B (zh) * | 2010-01-06 | 2013-03-13 | 上海华虹Nec电子有限公司 | 改善锗硅或锗硅碳单晶与多晶交界面形貌的方法 |
| US20150194307A1 (en) * | 2014-01-06 | 2015-07-09 | Globalfoundries Inc. | Strained fin structures and methods of fabrication |
| US9752224B2 (en) * | 2015-08-05 | 2017-09-05 | Applied Materials, Inc. | Structure for relaxed SiGe buffers including method and apparatus for forming |
| US9922941B1 (en) | 2016-09-21 | 2018-03-20 | International Business Machines Corporation | Thin low defect relaxed silicon germanium layers on bulk silicon substrates |
| US10535516B2 (en) * | 2018-02-01 | 2020-01-14 | Asm Ip Holdings B.V. | Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures |
| CN110265402B (zh) * | 2019-06-27 | 2020-09-18 | 长江存储科技有限责任公司 | 一种3d nand存储器件及其制造方法 |
| CN115832078B (zh) * | 2022-11-25 | 2026-01-27 | 中国科学院微电子研究所 | 一种光电探测器及其制造方法 |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US5442205A (en) * | 1991-04-24 | 1995-08-15 | At&T Corp. | Semiconductor heterostructure devices with strained semiconductor layers |
| CA2062134C (en) * | 1991-05-31 | 1997-03-25 | Ibm | Low Defect Densiry/Arbitrary Lattice Constant Heteroepitaxial Layers |
| DE69827824T3 (de) * | 1997-06-24 | 2009-09-03 | Massachusetts Institute Of Technology, Cambridge | Kontrolle der verspannungsdichte durch verwendung von gradientenschichten und durch planarisierung |
| JP3324573B2 (ja) * | 1999-07-19 | 2002-09-17 | 日本電気株式会社 | 半導体装置の製造方法および製造装置 |
| US6524935B1 (en) * | 2000-09-29 | 2003-02-25 | International Business Machines Corporation | Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique |
| JP4221928B2 (ja) | 2001-12-28 | 2009-02-12 | 株式会社Sumco | 半導体基板及び電界効果型トランジスタ並びにこれらの製造方法 |
| US6515335B1 (en) * | 2002-01-04 | 2003-02-04 | International Business Machines Corporation | Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same |
| US6562703B1 (en) * | 2002-03-13 | 2003-05-13 | Sharp Laboratories Of America, Inc. | Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content |
| US6995430B2 (en) * | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
| US7008857B2 (en) * | 2002-08-26 | 2006-03-07 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Recycling a wafer comprising a buffer layer, after having separated a thin layer therefrom |
| US8187377B2 (en) | 2002-10-04 | 2012-05-29 | Silicon Genesis Corporation | Non-contact etch annealing of strained layers |
| US7332417B2 (en) * | 2003-01-27 | 2008-02-19 | Amberwave Systems Corporation | Semiconductor structures with structural homogeneity |
| JP4306266B2 (ja) * | 2003-02-04 | 2009-07-29 | 株式会社Sumco | 半導体基板の製造方法 |
| US6960781B2 (en) * | 2003-03-07 | 2005-11-01 | Amberwave Systems Corporation | Shallow trench isolation process |
| WO2004081986A2 (en) * | 2003-03-12 | 2004-09-23 | Asm America Inc. | Method to planarize and reduce defect density of silicon germanium |
| US6882025B2 (en) * | 2003-04-25 | 2005-04-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained-channel transistor and methods of manufacture |
| US6831350B1 (en) * | 2003-10-02 | 2004-12-14 | Freescale Semiconductor, Inc. | Semiconductor structure with different lattice constant materials and method for forming the same |
| US6902965B2 (en) * | 2003-10-31 | 2005-06-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained silicon structure |
| JP2006108365A (ja) * | 2004-10-05 | 2006-04-20 | Renesas Technology Corp | 半導体装置およびその製造方法 |
-
2004
- 2004-11-04 DE DE102004053307A patent/DE102004053307B4/de not_active Expired - Lifetime
-
2005
- 2005-10-24 KR KR1020050100111A patent/KR100797131B1/ko not_active Expired - Lifetime
- 2005-10-31 US US11/263,192 patent/US7723214B2/en active Active
- 2005-11-02 FR FR0511147A patent/FR2878072B1/fr not_active Expired - Lifetime
- 2005-11-02 JP JP2005319746A patent/JP4700472B2/ja not_active Expired - Lifetime
- 2005-11-04 CN CN200510116264A patent/CN100580893C/zh not_active Expired - Lifetime
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2009
- 2009-09-29 US US12/568,882 patent/US20100019278A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| US20100019278A1 (en) | 2010-01-28 |
| CN100580893C (zh) | 2010-01-13 |
| CN1773686A (zh) | 2006-05-17 |
| DE102004053307B4 (de) | 2010-01-07 |
| DE102004053307A1 (de) | 2006-05-11 |
| KR100797131B1 (ko) | 2008-01-22 |
| FR2878072B1 (fr) | 2011-07-22 |
| KR20060049306A (ko) | 2006-05-18 |
| US20060091502A1 (en) | 2006-05-04 |
| US7723214B2 (en) | 2010-05-25 |
| FR2878072A1 (fr) | 2006-05-19 |
| JP2006135329A (ja) | 2006-05-25 |
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