JP5295932B2 - 半導体パッケージ及びその評価方法、並びにその製造方法 - Google Patents
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Description
[第1の実施の形態に係る半導体パッケージの構造]
図2は、第1の実施の形態に係る半導体パッケージを例示する断面図である。図2を参照するに、第1の実施の形態に係る半導体パッケージ10は、半導体素子20が多層配線基板30の略中央部にはんだバンプ40を介して実装されアンダーフィル樹脂50で封止され、更に、半導体素子20が熱伝導部材60を介して放熱板70に接している構造を有する。
次に、第1の実施の形態に係る半導体パッケージにおける熱伝導部材の性能評価方法について説明する。図3は、第1の実施の形態に係る半導体パッケージにおける熱伝導部材の性能評価方法について説明するための図(その1)である。図3において、図2と同一部分については、同一符号を付し、その説明は省略する場合がある。
次に、第1の実施の形態に係る半導体パッケージの製造方法について説明する。図7〜図11は、第1の実施の形態に係る半導体パッケージの製造工程を例示する図である。図7〜図11において、図2と同一部分については、同一符号を付し、その説明は省略する場合がある。
第1の実施の形態の変形例では、熱伝導部材を複数の領域に分割し、複数の領域のそれぞれに対応する検査用電極を設ける例を示す。
第2の実施の形態では、貫通電極23に代えて外部電極80を設ける例を示す。図14は、第2の実施の形態に係る半導体パッケージを例示する平面図である。図15は、第2の実施の形態に係る半導体パッケージを例示する断面図である。但し、図14において、図15に示す放熱板70は省略されている。
第3の実施の形態では、貫通電極23に代えて外部電極81を設ける例を示す。図17は、第3の実施の形態に係る半導体パッケージを例示する平面図である。図18は、第3の実施の形態に係る半導体パッケージを例示する断面図である。但し、図17において、図18に示す放熱板70は省略されている。
第4の実施の形態では、貫通電極23に代えて外部電極82を設ける例を示す。図20は、第4の実施の形態に係る半導体パッケージを例示する平面図である。図21は、第4の実施の形態に係る半導体パッケージを例示する断面図である。但し、図20において、図21に示す放熱板70は省略されている。
20、20A 半導体素子
21 半導体基板
22 電極パッド
23 貫通電極
29 貫通孔
30 多層配線基板
31 第1配線層
32 第1絶縁層
32x 第1ビアホール
33 第2配線層
34 第2絶縁層
34x 第2ビアホール
35 第3配線層
36 ソルダーレジスト層
36x 開口部
39 検査用パッド
40 はんだバンプ
41、42 プレソルダ
50 アンダーフィル樹脂
60 熱伝導部材
61、62 高電気伝導材
70 放熱板
80、81、82 外部電極
83 はんだ
90 直流電源
91、92 導線
93 矢印
Claims (10)
- 配線基板と、
前記配線基板上に実装された半導体素子と、
前記半導体素子上に設けられた導電性の熱伝導部材と、
前記熱伝導部材の前記半導体素子側の面に接し、前記熱伝導部材と電気的に導通する検査用電極と、
前記熱伝導部材の前記半導体素子側の面と反対側の面に接する導電性の放熱板と、を有し、
前記検査用電極と、前記熱伝導部材と、前記放熱板とは、直列に接続された電流経路をなし、前記検査用電極が一方の電流入出力部となり、前記放熱板が他方の電流入出力部となる半導体パッケージ。 - 前記検査用電極は、前記半導体素子を貫通し、一端が前記熱伝導部材の前記半導体素子側の面に接する貫通電極と、
前記貫通電極と電気的に接続された、前記配線基板の配線層と、を有する請求項1記載の半導体パッケージ。 - 前記検査用電極は、前記半導体素子の前記熱伝導部材側の面の少なくとも一部に形成され、前記熱伝導部材の前記半導体素子側の面に接する金属層を有する請求項1記載の半導体パッケージ。
- 前記検査用電極は、前記半導体素子の前記熱伝導部材側の面の少なくとも一部に設けられ、前記熱伝導部材の前記半導体素子側の面に接する金属板を有する請求項1記載の半導体パッケージ。
- 前記検査用電極は、前記配線基板の配線層を有し、前記配線基板の配線層を介して、前記配線基板の前記半導体素子が実装されていない側の面に引き出されている請求項1乃至4の何れか一項記載の半導体パッケージ。
- 前記熱伝導部材は複数の領域に分割され、
前記複数の領域のそれぞれに対応する前記検査用電極が設けられた請求項1乃至5の何れか一項記載の半導体パッケージ。 - 請求項1乃至6の何れか一項記載の半導体パッケージにおいて、
前記放熱板から前記熱伝導部材を介して前記検査用電極に至る部分の電気抵抗を測定し、
前記電気抵抗の測定値に基づいて、前記熱伝導部材と前記放熱板及び前記半導体素子との接触熱抵抗の大小を評価する半導体パッケージの評価方法。 - 前記接触熱抵抗の大小は、予め求めた前記電気抵抗と前記接触熱抵抗との対応関係に基づいて評価する請求項7記載の半導体パッケージの評価方法。
- 前記熱伝導部材は複数の領域に分割され、
前記複数の領域のそれぞれに対応する前記検査用電極が設けられ、
前記領域毎に、前記放熱板から前記熱伝導部材を介して前記検査用電極に至る部分の電気抵抗を測定し、
前記電気抵抗の測定値に基づいて、前記領域毎に、前記熱伝導部材と前記放熱板及び前記半導体素子との接触熱抵抗の大小を評価する請求項7又は8に記載の半導体パッケージの評価方法。 - 配線基板と、
前記配線基板上に実装された半導体素子と、
前記半導体素子上に設けられた導電性の熱伝導部材と、
前記熱伝導部材の前記半導体素子側の面に接し、前記熱伝導部材と電気的に導通する検査用電極と、
前記熱伝導部材の前記半導体素子側の面と反対側の面に接する導電性の放熱板と、を有する半導体パッケージの製造方法であって、
請求項7乃至9の何れか一項記載の半導体パッケージの評価方法により、前記熱伝導部材と前記放熱板及び前記半導体素子との接触熱抵抗の大小を評価する工程を有する半導体パッケージの製造方法。
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