JP5807220B2 - インターポーザ及びそれを用いた半導体モジュール - Google Patents

インターポーザ及びそれを用いた半導体モジュール Download PDF

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Publication number
JP5807220B2
JP5807220B2 JP2010294618A JP2010294618A JP5807220B2 JP 5807220 B2 JP5807220 B2 JP 5807220B2 JP 2010294618 A JP2010294618 A JP 2010294618A JP 2010294618 A JP2010294618 A JP 2010294618A JP 5807220 B2 JP5807220 B2 JP 5807220B2
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JP
Japan
Prior art keywords
semiconductor device
interposer
heat
semiconductor
wall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2010294618A
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English (en)
Japanese (ja)
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JP2012142458A (ja
Inventor
學 盆子原
學 盆子原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZyCube Co Ltd
Original Assignee
ZyCube Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ZyCube Co Ltd filed Critical ZyCube Co Ltd
Priority to JP2010294618A priority Critical patent/JP5807220B2/ja
Priority to US13/977,908 priority patent/US9386685B2/en
Priority to TW100149435A priority patent/TW201241919A/zh
Priority to PCT/JP2011/080528 priority patent/WO2012091140A1/ja
Publication of JP2012142458A publication Critical patent/JP2012142458A/ja
Application granted granted Critical
Publication of JP5807220B2 publication Critical patent/JP5807220B2/ja
Expired - Fee Related legal-status Critical Current
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/20—Modifications to facilitate cooling, ventilating, or heating
    • H05K7/20218—Modifications to facilitate cooling, ventilating, or heating using a liquid coolant without phase change in electronic enclosures
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/20—Modifications to facilitate cooling, ventilating, or heating
    • H05K7/2039—Modifications to facilitate cooling, ventilating, or heating characterised by the heat transfer by conduction from the heat generating element to a dissipating body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/40—Arrangements for thermal protection or thermal control involving heat exchange by flowing fluids
    • H10W40/43—Arrangements for thermal protection or thermal control involving heat exchange by flowing fluids by flowing gases, e.g. forced air cooling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/40—Arrangements for thermal protection or thermal control involving heat exchange by flowing fluids
    • H10W40/47—Arrangements for thermal protection or thermal control involving heat exchange by flowing fluids by flowing liquids, e.g. forced water cooling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/823—Interconnections through encapsulations, e.g. pillars through molded resin on a lateral side a chip
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/22—Configurations of stacked chips the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/231—Configurations of stacked chips the stacked chips being on both top and bottom sides of an auxiliary carrier having no electrical connection structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Thermal Sciences (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP2010294618A 2010-12-30 2010-12-30 インターポーザ及びそれを用いた半導体モジュール Expired - Fee Related JP5807220B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2010294618A JP5807220B2 (ja) 2010-12-30 2010-12-30 インターポーザ及びそれを用いた半導体モジュール
US13/977,908 US9386685B2 (en) 2010-12-30 2011-12-28 Interposer and semiconductor module using the same
TW100149435A TW201241919A (en) 2010-12-30 2011-12-28 Interposer and semiconductor module using same
PCT/JP2011/080528 WO2012091140A1 (ja) 2010-12-30 2011-12-28 インターポーザ及びそれを用いた半導体モジュール

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010294618A JP5807220B2 (ja) 2010-12-30 2010-12-30 インターポーザ及びそれを用いた半導体モジュール

Publications (2)

Publication Number Publication Date
JP2012142458A JP2012142458A (ja) 2012-07-26
JP5807220B2 true JP5807220B2 (ja) 2015-11-10

Family

ID=46383227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010294618A Expired - Fee Related JP5807220B2 (ja) 2010-12-30 2010-12-30 インターポーザ及びそれを用いた半導体モジュール

Country Status (4)

Country Link
US (1) US9386685B2 (2)
JP (1) JP5807220B2 (2)
TW (1) TW201241919A (2)
WO (1) WO2012091140A1 (2)

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JP2016021493A (ja) * 2014-07-14 2016-02-04 富士通株式会社 光伝送装置および製造方法
EP3048643A1 (en) * 2015-01-23 2016-07-27 Alcatel Lucent Device and method
TWM519879U (zh) * 2015-08-03 2016-04-01 道登電子材料股份有限公司 電子裝置之改良散熱結構
JP6531603B2 (ja) * 2015-10-01 2019-06-19 富士通株式会社 電子部品、電子装置及び電子装置の製造方法
KR20170001989U (ko) * 2015-11-30 2017-06-08 다우톤 일렉트로닉 머티리얼스 코. 컴퍼니 리미티드 전자장치의 개량 냉각구조
NL2018389A (en) * 2016-03-07 2017-09-12 Asml Netherlands Bv Multilayer Reflector, Method of Manufacturing a Multilayer Reflector and Lithographic Apparatus
US9646916B1 (en) * 2016-06-29 2017-05-09 International Business Machines Corporation Method and apparatus to facilitate direct surface cooling of a chip within a 3D stack of chips using optical interconnect
US10921536B2 (en) * 2017-05-18 2021-02-16 Arista Networks, Inc. Heat sink for optical transceiver
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US11127716B2 (en) * 2018-04-12 2021-09-21 Analog Devices International Unlimited Company Mounting structures for integrated device packages
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US11546991B2 (en) 2020-03-11 2023-01-03 Peter C. Salmon Densely packed electronic systems
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Also Published As

Publication number Publication date
JP2012142458A (ja) 2012-07-26
TWI560773B (2) 2016-12-01
US20140016270A1 (en) 2014-01-16
US9386685B2 (en) 2016-07-05
WO2012091140A1 (ja) 2012-07-05
TW201241919A (en) 2012-10-16

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