JPH01101643A - Test device for semiconductor - Google Patents

Abstract

PURPOSE:To form with ease a bad sample wafer where a pellet is not broken by testing a semiconductor without interruption while discharging data from a testing/counting part without automated marking upon a continuous fail stop being attained. CONSTITUTION:The title capacitor device includes a probe part 1 having a prober in contact with a plurality of pellets to be tested located in a semiconductor wafer W placed on a wafer stage WS, a testing/counting part 2 for counting the good and bad numbers of a test result of the pellets, a control part 3 outputting a data discharge signal SD from another output terminal to the testing/counting part 1 without outputting a marking signal SM where the successive bad numbers are beyond a predetermined number and clearing the data while testing in succession the semiconductor to a final pellet in the wafer and outputting a stop signal, and a marking unit 4. Accordingly, even, with successive bad pellets the test is not obstructed for fun. Thus, a bad sample wafer for analysis of sample quality can be prepared with ease.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor testing device, and more particularly to a semiconductor testing device for probe testing of pellets within a semiconductor wafer.

[Conventional technology]

Generally, a marking device is added to a probing test for testing the characteristics of pellets within a wafer, and defective pellets are mechanically marked by scratching or the like.

When a predetermined number of pellet defects occur consecutively, the test equipment automatically stops at that point (hereinafter referred to as continuous fail stop), and then the operator manually marks the pellets. The method used was to turn off the device, turn on the ejection signal switch to clear the data, and then restart the device.

The test data for the pellets is recorded on tape and is also used for analyzing the quality of the pellets.

[Problem that the invention seeks to solve]

In the conventional semiconductor test equipment described above, continuous fail-stops reduce the operating time of expensive equipment, and
If continuous fail-stop is not applied, wafers that can be used for adjusting the manufacturing equipment will be destroyed as defective sample wafers, and there is also the problem that quality analysis of defective pellets cannot be performed.

The purpose of the present invention is to avoid unintentionally stopping the pellet in the case of continuous defective pellets, and to obtain defective sample wafers for quality analysis.
The purpose of the present invention is to provide a test device for semiconductors that can be created.

[Means for solving problems]

The semiconductor testing apparatus of the present invention includes a probe section having a prober that sequentially contacts a plurality of pellets under test in a semiconductor wafer, ([31 one input end receives a test start signal of the probe section; (C) a test/counting unit whose output terminal outputs a signal representing the test result by testing the pellets under test and counting the number of test results, and whose output terminal outputs a signal representing the test result; and outputs a marking signal to one output terminal only when the kernel/defective result signal is a defective result signal and the number of consecutive defects is smaller than a predetermined value, and the number of consecutive defects is equal to the predetermined value. In the above case, the marking signal is not output and the data discharge signal is output from the other output terminal.
a control unit that outputs a stop signal to a counting unit to continue the test and outputs a stop signal after completing the test of the final pellet in the semiconductor wafer;
The marking section has an output end that supplies a marker signal to the probe section.

〔Example〕

Next, with reference to the drawings regarding an embodiment of the present invention, a semiconductor testing apparatus includes a probe section 1 having a prober that contacts a plurality of pellets to be tested within a semiconductor wafer W mounted on a wafer stage WSK, and an input terminal. receives the test start signal SS from the probe section 1, counts the number of good and bad test results of the pellet, and outputs the test result signal 8. Probe part 1
The input terminal of the test/counting section 2 to which the iC is applied receives the pass/fail result signal SR from the probe section l and counts it, and if the defect result signal is smaller than a predetermined value of the number of continuous defects, one output terminal If the number of consecutive defects exceeds a predetermined value, the marking signal SM is not outputted and the data discharge signal SD is outputted from the other output terminal to the test/counting section 1 to clear the data. The controller 3 outputs a stop signal after continuing the test up to the last pellet in the wafer, and the input end receives the marking signal SM, and the output end receives the marker signal S.
The marking device 4 includes a marking device 4 that supplies the marker M to the marker M of the probe section l.

FIG. 2 is a flowchart for explaining the operation of the block diagram of FIG.

First, before starting the test, the number of consecutive fail stops is set in advance to a predetermined value.

Next, the test start signal Ss is output from the probe device to start the test.

When the probe unit 1 is touched by the test plate, the probe comes into contact with the probe unit 1, and the signal from the test/counter unit 2 is used to determine whether the product is good or bad.

Here, if the pellet to be tested is good, the number of non-defective items on the counter in the test/counting section 2 is increased by one, the number of defective items in the control section 3 is set to K, and the pellet is prepared for measurement. Return to movement and repeat this flow.

If the pellet to be tested is defective, the number of defects on the counter in the test/counting section 2 is increased by one, and 1 is added to the number of consecutive defects in the control section 3 to perform 1-king.

Here, when the control unit 3 determines continuous fail-stop,
Move on to another point A.

The probe section J prepares for measurement by moving the pellet.
Determine if there is a pellet to be tested, and if so, start the test.
The counting unit 2Vc determines whether the product is good or bad.

After that, the number of good and defective numbers is counted inside the test/counting section 2, but the marking and continuous fail-stop judgment is not performed, and the test/counting section 2 clears the data discharge by the signal SD from the control section 3. conduct.

Then, after the test is repeated from the initial preparation stage and all the pellets to be tested are finished, an alarm stops the test.

[Example 2] FIG. 3 is a block diagram of a second embodiment of the invention.

The semiconductor testing apparatus is similar to the semiconductor testing apparatus shown in FIG. 1, except that the control section 3a is different from the control section 3.

The control section 3a receives the test start signal Ss of the probe section 1, skips a predetermined number of times (k-1), and outputs a pseudo-good result signal SG to the probe section 1, and the test result of the test/counting section 2. It has a conversion gate C that receives the signal SR and converts it into a good signal.

That is, the test start signal 8 output from the probe section 1
B sets a predetermined number k from gate GK and calculates (k-t)(
i! The test result signal SR to be sent back to the probe section IVc during that time is a pseudo-good signal SG.

In addition, the good/bad result signal SR sent from the testing/counting section 2
are all converted into pseudo-good result signals by the conversion game 1-CK for judgment, so no marking signal SM is output.

FIG. 4 is a block diagram for explaining the operation of the block diagram in FIG. 3.
0-Chart.

The flowchart is B! :B' It is the same as the 70-chart of FIG. 2, except that a test pellet number determining unit is provided between the points to set the predetermined value to 3.

In this case, after the number of consecutive failures exceeds the number of consecutive fail stops K and the pellets enter the flow at point A, the pellets are tested every three pellets, that is, two pellets are skipped, so the number of pellets tested decreases and an alarm occurs. Stops faster.

〔Effect of the invention〕

As explained above, the present invention allows testing to be performed without automatically marking when a continuous fail-stop occurs.
By continuing the test while discharging the data from the counter, it is possible to easily create defective sample wafers with undamaged pellets, and by smoothly analyzing wafer defects, the quality of semiconductors can be improved. It has a quick effect.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a first embodiment of the present invention. 2 is a flowchart for explaining the operation of the block diagram in FIG. 1, FIG. 3 is a block diagram of the second embodiment of the present invention, and FIG. 4 is a flowchart for explaining the operation of the block diagram in FIG. 3. This is a useless flowchart. 1... Probe part, 2... ifi1w
Experiment - Counting section, 3゜3a... Control section, 4...
・・Marking part, M・・・・Marker, SD・・・・
...Data discharge signal, '・SM...Marking signal, SR...Test result signal, Ss...
...Test start signal, Sl! l...Marker signal,
W... Semiconductor wafer. Agent: Patent Attorney Susumu Uchihara I

Claims (1)

[Scope of Claims] (A) A probe section having a prober that sequentially contacts a plurality of pellets under test in a semiconductor wafer; (B) One input end receives a test start signal from the probe section; a test/counting unit that tests the pellets to be tested and counts the number of good and bad test results, and has an output terminal that outputs a signal of the test result; (C) an input terminal that outputs the good and bad result signal; receive and count,
A marking signal is output to one output terminal only when the good/bad result signal is a bad result signal and the number of consecutive defects is smaller than a predetermined value, and when the number of consecutive defects is greater than or equal to the predetermined value, the marking signal is outputted to one output terminal. Control that continues the test by outputting a data discharge signal from the other output terminal to the test/counting section without outputting a marking signal, and outputs a stop signal after completing the test of the final pellet in the semiconductor wafer. (D) a marking section whose input end receives the marking signal and whose output end supplies the marker signal to the probe section.