JPH01111237A - Debugging device - Google Patents

Abstract

PURPOSE:To improve the program debugging speed by adding a break processing means, a break condition setting means and a resetting means into a substitute storage after removing a ROM of a system to be tested and connecting the substitute storage instead. CONSTITUTION:A break condition setting means 12 interprets the control information written into a 2nd substitute storage 2 via a control information writing circuit 3 and writes the trigger information into a microprocessor 31. A resetting means 13 gives a specific instruction to the microprocessor 31 and resets a break state to an executing state of a program to be debugged. A break processing means 11 works when the microprocessor 31 is shifted to a break state based on the trigger information and interprets the control information written into the storage 2 to start both means 12 and 13. Thus the program debugging speed is increased.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a debug device that connects to a system under test to which a microprocessor is applied and debugs a program.

(Prior Art) FIG. 2 shows a block diagram of a conventional debugging device. A conventional debugging device will be explained using drawings.

When the system under test 30 is put into practical use, the microprocessor 31 is installed in the system under test and executes a program stored in the storage device 32. in general,
After creating a program, it is necessary to debug the program. During debugging, the microprocessor 31 originally used in the system under test 30 is replaced with the substitute microprocessor 21 and the program stored in the storage device 32 is executed.

Control signals, data, and addresses of the substitute microprocessor 21 are connected via the first buffer 22 and the bus S to the CPU socket of the system under test 30 in which the microprocessor 31 is originally to be installed.

Breakpoint information t is stored in a register within the breakpoint detection circuit 23.

The proxy microprocessor 21 sequentially reads instructions from the storage 1 device 32 and executes them. When the contents of the bus S match the breakpoint information t, the breakpoint detection circuit 23 sends an interrupt signal U to the substitute microprocessor 21. The break state detection circuit 24 detects the point in time when the proxy microprocessor 21 shifts to interrupt processing based on the interrupt signal U, and generates a break state signal V indicating that the system is in a break state. This break state signal V is sent to the first buffer 2 via an inverter 25.
Turn off 2. On the other hand, this break state signal V turns on the second buffer 26. When the second buffer 26 is turned on, the bus S is connected via the second buffer 26 to the monitor program storage 27 and the acting microprocessor 21 executes another program stored in the monitor program storage 27. Start. This completes the break process.

When subsequently executing the program stored in the storage device 32 again, the monitor program control information W is stored in the monitor program storage device 27. Based on the monitor program control information W, the monitor program storage device 27 instructs the proxy microprocessor 21 to enter a state in which the program stored in the storage device 32 is executed.
Send to. The break state detection circuit 24 is connected to the storage device 3.
2 and inverts the break state signal V. This inverted break state signal V is transmitted to the first buffer 22.
is turned on, and the second buffer 26 is also turned off.

In this state, the device starts executing the program stored in the storage device 32.

(Problems to be Solved by the Invention) However, such a debugging device has the following problems.

(a) It was necessary to connect the proxy microprocessor 21 and the storage device 32 with a cable via the first buffer 22, which caused waveform distortion during signal transmission, making it impossible to increase the execution speed.

(b) The presence of the buffer causes signal propagation delays due to the buffer, making it impossible to increase execution speed.

(c) The clock that determines the execution speed of microprocessors has recently become faster and faster, and programs cannot be executed in real time under such high-speed clocks.

(d) Because of the problem in (c) above, it may be proposed to lower the clock speed, but in that case the system under test would not have been tested in a state where it would be put to practical use.

(e) Each time the type of microprocessor 31 changes, each element constituting the debugging device must also be changed, which requires a great deal of time to develop the debugging device.

(f) Consumers of debugging equipment for debugging systems under test had to purchase new debugging equipment every time the type of microprocessor changed.

(Means for Solving the Problems) This invention has been made to solve these problems, and it is possible to put the system under test into practical use while the system under test is equipped with a microprocessor. It is possible to debug with .

Instead of replacing the microprocessor of the system under test with a substitute microprocessor of the debug device, the ROM of the system under test was removed and the first and second substitute storage devices were connected. A break processing means for maintaining a break state is stored in the first proxy storage device, and trigger information for starting break processing under desired conditions according to control information stored in the second proxy storage device is provided to the microprocessor. By providing break condition setting means for writing and return means for returning from break processing to the debugged program according to control information stored in the second proxy storage device, it has the same debugging function as the conventional one, It also achieved high-speed real-time execution.

Furthermore, the debugging device according to the present invention only acts as a ROM, and the support for each microprocessor can be adjusted by simply rewriting the break processing means, break condition setting means, and return means. This makes it easy to connect to the system.

(Embodiment) FIG. 1 shows a block diagram of an embodiment according to the present invention. The present invention will be specifically described with reference to embodiments shown in the drawings. In FIG. 1, a system under test 30 includes a microprocessor 31, a storage device 32, a ROM circuit 33, a ROM
It is constituted by a control circuit 35. The first proxy storage device 1 and the second proxy storage device 2 are connected to the system under test 30.
The receiver has the function of the ROM circuit 33, and the connector 3
4 to the ROM control circuit 35, and an address signal a, a control signal b1, and a data signal C are exchanged.

The second proxy storage device 2 is connected so that the control information d can be written by the control information writing circuit 3.

The operation of the debugging device configured in this way will be explained. The break condition setting means 12 interprets the control information written in the second proxy storage device 2 by the control information writing circuit 3, and sets the trigger information to the break condition in the microprocessor 31 so that the break processing is started. Write to register.

The return means 13 sends a specific instruction to the microprocessor 31.
The microprocessor 31 is returned from the break state to the execution state of the program to be debugged.

The break processing means 11 is activated when the microprocessor 31 enters the break state according to trigger information written in the break register, maintains the break state, and writes the control information to the second proxy storage device by the control information writing circuit 3. 2, and if the control information is a return command or a break condition, the return means and break condition setting means are activated, respectively.

(Effects of the Invention) As described above, according to the present invention, instead of replacing the microprocessor of the system under test with a substitute microprocessor of the debug device, the ROM of the system under test is
(a) Since waveform distortion and signal propagation delay do not occur during signal transmission, execution You can increase your speed.

(b) Since the execution speed of the microprocessor can be increased, programs can be executed in real time even under high-speed clocks, and the system under test can be tested while it is in practical use.

(c) When the type of microprocessor changes, some of the elements that make up the debugging device can be easily changed, which shortens the time it takes to develop the debugging device, which is also a disadvantage to the users of the debugging device. I don't give anything.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing an example of a conventional debugging device. In the figure, l is a first proxy storage device, 2 is a second proxy storage device, 3 is a control information writing circuit, 11 is a break processing means, 12 is a break condition setting means, 13 is a return means, 30
is the system under test, 31 is the microprocessor, 32 is the storage device, 33 is the ROM circuit, 34 is the connector, 35 is the ROM control circuit, 36 is the bus, a is the address signal, b is the control signal, C is the data signal, d is control information. Patent applicant: Anritsu Corporation Representative: Patent attorney: Ryutabe Koike

Claims (2)

[Claims] 1. A system under test (3) equipped with a microprocessor (31) and a ROM circuit (33) for storing programs.
0), the address signal (a) from the ROM circuit and the control signal (
b) and sends a data signal (c) to said R on behalf of said system under test in response to said address signal and said control signal.
The first proxy storage device (1) and the second
an alternate storage device (2); a control information writing circuit (3) for writing control information (d) into the second alternate storage device; and a break in the first alternate storage device to maintain a break state. a processing means (11); and a break condition setting means (12) for writing into the microprocessor trigger information for starting the break processing under desired conditions in accordance with control information stored in the second proxy storage device. ,
A debugging device comprising: a return means (13) for returning from break processing to the debugged program according to control information stored in the second proxy storage device. 2. 2. The debugging apparatus according to claim 1, wherein said break condition setting means (12) rewrites a desired instruction of a program of said system under test into an instruction for activating said break processing.