JPH01117319A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a shallow impurity diffusion layer having high surface impurity density by a method wherein a solidstate diffusion source and a silicon wafer are quickly heated up simultaneously in a vacuum state using a lamp annealing device, the temperature is raised to the target temperature by stages in two or more stages, impurities are diffused on the wafer, they are cooled down, nitrogen is made to flow at the same time, and the impurities are discharged. CONSTITUTION:The atmospheric air containing moisture is brought into the quartz tube 5, the nitrogen to be used to prevent the change of B2O3 density on the surface of a boron plus plate 10 is allowed to flow, and the quartz tube 5 is airtightly sealed by a chamber door 7. A silicon wafer 11 is placed in the tube 5, the tube 5 is heated up while it is being evacuated to +mTorr, the above-mentioned state is maintained until the surface temperature of the boron plus plate 10 and the silicon wafer 11 is made uniform. Besides, their temperature is raised to the prescribed diffusion temperature by heating them for several seconds, and the prescribed diffusion layer is obtained. When the heat treatment is finished, the evacuating operation is stopped, nitrogen is made to flow, temperature is dropped, and after the above-mentioned state is maintained for several tens of seconds, they are quickly cooled down to the room temperature.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for forming an impurity diffusion layer in a silicon substrate by thermal diffusion using a solid diffusion source. The present invention relates to a method of forming a shallow impurity diffusion layer such as a base layer of an NPN transistor or an emitter layer of a PNP transistor by a rapid heating and cooling method using a lamp annealing device or the like using a source.

[Prior Art] Conventionally, this type of impurity diffusion layer has been formed using a boron plus plate 10 and a silicon wafer, as shown in FIG. 111 are arranged in a quartz boat 16 so that their surfaces face each other, and the quartz boat 16 in which boron plus plates 10 and silicon wafers 11 are arranged alternately is placed inside the quartz furnace core tube 11 of a diffusion furnace maintained at a predetermined temperature. This was carried out by entering the furnace at a constant speed, heat-treating in a nitrogen atmosphere for a period of time to obtain a predetermined diffusion layer, and then exiting the furnace at a constant speed. The boron plus plate 10 is made of high purity 8203, SiO2, Aj? It is a glass ceramic whose main component is 203, and by heat treatment, B2O3 in the boron plus plate 10 is volatilized, 8203 is attached to the facing silicon wafer 11, and the heboron in the silicon wafer 11 is diffused to form a boron diffusion layer. was forming. In order to obtain a stable, uniform, and reproducible boron diffusion layer, B2 volatilized from the boron plus plate 10 is
It is necessary to keep the amount of B203 constant, and the amount of B203 volatilized depends on the concentration gradient of B203 in the boron plus plate 10. When water is adsorbed on B2O3, HBO2 with high vapor pressure
The concentration gradient of B2O3 in the boron plus plate 10 changes in order to create a Care must be taken to avoid moisture in the atmosphere and in the storage of boron plus board 1o.

[Problems to be Solved by the Invention] The formation of the conventional impurity diffusion layer described above is not uniform because the boron plus plate 10 and the silicon wafer are arranged in the same quartz boat, placed in a diffusion furnace, and heat-treated on a lot-by-lot basis. It is difficult to carry out a single-hour heat treatment to form a reproducible shallow impurity diffusion layer, and silicon wafers are often left in a humid atmosphere when converted into quartz boats, and quartz boats are often placed in diffusion furnaces. Because air containing moisture is drawn into the diffusion furnace during furnace or unloading, moisture is adsorbed on the surface of the boron plus plate, and B2O3 changes to HBO2 with high vapor pressure, resulting in a low B2O3 concentration on the surface of the boron plus plate. As a result, it becomes impossible to obtain a uniform and reproducible impurity diffusion layer.
This method has the disadvantage of causing deterioration of device characteristics and reduction in yield.

An object of the present invention is to provide a method for manufacturing a semiconductor device that eliminates the above-mentioned problems.

[Differences between the invention and the prior art] In contrast to the above-described conventional method in which impurity diffusion is performed in a diffusion furnace using a solid diffusion source, the present invention can form a shallow diffusion layer by performing impurity diffusion in a lamp annealing device. Furthermore, it is possible to protect solid diffusion sources such as boron plus plates and PBN plates, which are susceptible to atmospheric moisture, from moisture, creating a stable, uniform, and reproducible impurity diffusion layer. The difference is that it can be formed easily, improves device characteristics, and improves yield.

[Means for Solving the Problems] The present invention provides a method for forming an impurity diffusion layer using a solid diffusion source, in which the solid diffusion source and the silicon wafer are simultaneously rapidly heated in vacuum using a lamp annealing device, and the solid diffusion source and the silicon wafer are rapidly heated in two stages. The temperature is raised stepwise to the target temperature, and impurities are diffused into the silicon wafer in the vacuum. When the desired impurity diffusion layer is obtained, nitrogen is flowed at the same time as cooling to remove the impurities. This is a method for manufacturing a semiconductor device characterized by evacuation.

[Example] Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a plan view showing an apparatus according to a first embodiment of the present invention, and FIG. 2 is a longitudinal sectional view thereof. The lamp annealing device is clean tunnel 1. Nitrogen piping 2-inch V member part 3. Cassette storage section 4. Consisting of vacuum equipment, etc., there is a wafer transfer section within the clean tunnel 1, and a chamber section 3 consisting of a quartz tube 5° wafer support stand 6. It consists of a chamber door 7, a door drive section 8, a tungsten halogen lamp 9, etc.

Inside the clean tunnel 1, nitrogen is flowing to prevent moisture-containing air from entering the quartz tube 5 and changing the B2O3 concentration on the surface of the boron plus plate 10, and the inside of the quartz tube 5 is sealed with a chamber door 7. The nitrogen flow prevents moisture from entering. The silicon wafers 11 arranged in a cassette are passed from the cassette storage part 4 through the wafer transport part in the clean tunnel 1, placed on the wafer support stand 6, and placed directly below the boron plus plate 10 in the quartz tube 5.

FIG. 3 is a process sequence of the present invention.

Once the silicon wafer 11 is placed in the quartz tube 5 and sealed by the chamber door 7, the temperature is raised to 700 to 800°C in about 5 seconds while drawing a vacuum to several tens of mTorr, and the boron plus plate 10 and the silicon wafer 11 are heated to 700 to 800°C in about 5 seconds. The temperature is maintained for several tens of seconds until the in-plane temperature becomes uniform, and then the temperature is raised to a predetermined diffusion temperature of 900 to 1100° C. in several seconds, and heat treatment is performed until a predetermined diffusion layer is obtained. When the heat treatment is completed, the vacuum is stopped, nitrogen is poured, and at the same time the temperature is lowered to about 700° C., held for several tens of seconds, and then rapidly cooled to room temperature. The silicon wafer 11 that has been diffused passes through the wafer transport section and is placed into a cassette set in the other cassette storage section 4 . This operation is repeated to process all silicon wafers 11 lined up in the cassette.

(Embodiment 2) FIG. 4 is a longitudinal sectional view showing an apparatus according to a second embodiment of the present invention. The lamp annealing device includes a chamber door 7, a door drive section 8. Tungsten halogen lamp9. Silicon wafer support pin 12. PBN board support pin 13. A quartz plate 15 that separates the lamp section and the wafer processing chamber 14. It consists of vacuum equipment, etc.

Since the wafer processing chamber 14 is always covered with a PBN plate with a thickness of 6, it is sealed with a chamber door 7 and nitrogen is flowed to prevent moisture from entering the chamber. PBN board 1, thickness 6, is not affected by moisture in the untreated state. Therefore, an activation process is performed each time the PBN plate is used as a diffusion source. FIG. 5 is a process flow of the present invention. Before putting the silicon wafer 1111 to be processed into the wafer processing chamber 14, dry oxygen is flowed into the wafer processing chamber 14, and the PBN plate is subjected to activation heat treatment for 6 hours at about 1100 to 1300°C depending on the diffusion time. After the activation process is completed, the silicon wafers 11 arranged in the cassette are placed in the wafer processing chamber 14 by a wafer transfer device, and the chamber door 7 is closed and hermetically sealed. Number of wafer processing chambers 14 + mT
700-800℃ in about 5 seconds while applying vacuum to orr
The temperature was raised to a certain degree, and held for several tens of seconds until the thickness of the silicon wafer 11 and the PBN plate 1 became uniform at 6 degrees.Then, the temperature was further raised to a predetermined diffusion temperature of 900 to 1100°C in a few seconds until a predetermined diffusion layer was obtained. Heat treatment in vacuum. Once the heat treatment is complete, stop the vacuum and simultaneously flow nitrogen to about 700°C.
Cool down to room temperature, hold for several tens of seconds, and rapidly cool to room temperature. The processed silicon wafer 11 is stored in the other cassette by a wafer transfer device. Further, activation processing to diffusion are repeated alternately to process all wafers arranged in the cassette.

[Effects of the Invention] As explained above, the present invention uses a vacuum-compatible lamp annealing device instead of a conventional diffusion furnace as a device for heat treating a solid diffusion source such as a boron plus plate or a PBN plate for forming an impurity diffusion layer. By using a high-temperature, short-time heat treatment using a device, it is possible to form a shallow impurity diffusion layer with a high surface concentration.
In order to uniformly heat the boron plus plate or silicon wafer at a low temperature of about 0 to 800 degrees Celsius and then gradually raise the temperature to a predetermined diffusion temperature, and to prevent the solid diffusion source from deteriorating due to atmospheric humidity, a chamber is used. It is possible to obtain a uniform and reproducible impurity diffusion layer by methods such as creating a clean tunnel in front of the PBN plate or using the activation of the PBN plate for boron diffusion each time.

[Brief explanation of the drawing]

FIG. 1 is a plan view showing an apparatus according to a first embodiment of the present invention, FIG. 2 is a longitudinal cross-sectional view of the same, FIG. The figure is a vertical cross-sectional view showing an apparatus according to a second embodiment of the present invention, FIG. 5 is a process flow diagram according to a second example of the present invention, and FIG. 6 is a vertical cross-sectional view showing a conventional example. . 1...Clean tunnel 2...Nitrogen piping 3...
Chamber part 4...Cassette storage part 5...Quartz tube 6...Wafer support stand 7...Chamber door 8...Door drive part 9...Tungsten halogen lamp 10...Boron plus plate 11 ...Silicon wafer 12...Silicon wafer support pin 13...PBN plate support pin 14...Wafer processing chamber 15...Quartz plate 16...PBN plate 1
7...Quartz hearth tube

Claims (1)

[Claims] (1) In the method of forming an impurity diffusion layer using a solid diffusion source, the solid diffusion source and the silicon wafer are simultaneously rapidly heated in vacuum using a lamp annealing device, and the temperature is gradually increased in two or more stages to the desired temperature. and diffuse impurities into the silicon wafer in the vacuum, and when the desired impurity diffusion layer is obtained, the semiconductor device is cooled and at the same time nitrogen is flowed to exhaust the impurities. Production method.