JPH01130199U - - Google Patents
Info
- Publication number
- JPH01130199U JPH01130199U JP2554588U JP2554588U JPH01130199U JP H01130199 U JPH01130199 U JP H01130199U JP 2554588 U JP2554588 U JP 2554588U JP 2554588 U JP2554588 U JP 2554588U JP H01130199 U JPH01130199 U JP H01130199U
- Authority
- JP
- Japan
- Prior art keywords
- shift register
- buzzer
- power supply
- supply vcc
- potential difference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Control Of Amplification And Gain Control (AREA)
Description
第１図は本考案になる音量調節装置の一実施例
を示すブロツク図、第２図は本考案の他の実施例
を示すブロツク図、第３図は本考案の更に別の実
施例を示すブロツク図、第４図は従来の音量調節
手段を示すブロツク図、である。図において、
１はブザー、４，４ａ，４ｂはシフトレジスタ
、５は抵抗器、６はスピーカ、４１は出力端子、
５１は共通端子、をそれぞれ表す。
FIG. 1 is a block diagram showing one embodiment of the volume control device of the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIG. 3 is a block diagram showing yet another embodiment of the present invention. FIG. 4 is a block diagram showing a conventional volume control means. In the figure, 1 is a buzzer, 4, 4a, 4b are shift registers, 5 is a resistor, 6 is a speaker, 41 is an output terminal,
51 represents a common terminal, respectively.
Claims (1)
レジスタ４と、一端がそれぞれ該シフトレジスタ
４の出力端子４１に接続され、他端が互いに接続
されて共通端子５１を形成する複数の抵抗器５と
、該共通端子５１と電源Ｖｃｃとの間に設けられ
たブザー１とを具え、 該シフトレジスタ４に入力された音量データに
よつて、電源Ｖｃｃとの間に電位差のある１個乃
至２個以上の出力端子４１が生じ、電源Ｖｃｃか
ら電位差のある該出力端子４１に流れる電流によ
つて、該ブザー１が鳴るように構成してなること
を特徴とするブザーの音量調節装置。[Claims for Utility Model Registration] A shift register 4 that outputs multiple bits of data in parallel, one end of which is connected to the output terminal 41 of the shift register 4, and the other ends of which are connected to each other to form a common terminal 51. A buzzer 1 is provided between the common terminal 51 and the power supply Vcc, and a potential difference between the shift register 4 and the power supply Vcc is determined by the volume data input to the shift register 4. The volume of the buzzer is characterized in that the buzzer 1 is configured to sound when one or more output terminals 41 are generated and a current flows from the power supply Vcc to the output terminals 41 having a potential difference. Regulator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2554588U JPH01130199U (en) | 1988-02-26 | 1988-02-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2554588U JPH01130199U (en) | 1988-02-26 | 1988-02-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01130199U true JPH01130199U (en) | 1989-09-05 |
Family
ID=31246372
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2554588U Pending JPH01130199U (en) | 1988-02-26 | 1988-02-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01130199U (en) |
-
1988
- 1988-02-26 JP JP2554588U patent/JPH01130199U/ja active Pending
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