JPH011331A - Digital-analog conversion circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is a D/A converter that manipulates the duty ratio of a rectangular wave signal in correspondence with a digital quantity and performs digital-to-analog conversion in the form of the average value of the signal. Regarding the A conversion circuit.

[Conventional technology]

Conventionally, various methods have been adopted as methods for converting digital quantities into analog signals. Among these, for applications such as moving-coil type analog meters, which do not require average value indication and fast response times, the circuit configuration shown in Figure 3 is recommended because the circuit configuration is relatively simple and inexpensive. The so-called chopper method is used. In the figure, 11 is a timer counter, 12 is a switching element, and 13 is a filter. In this chopper method,
As shown in the timing chart of FIG. 4, a rectangular wave signal Vin with a predetermined amplitude va and a duty ratio corresponding to the digital value to be converted is smoothed by the filter 13 to obtain the desired analog signal No. 43 (2). ut is obtained in the form of an average value. In other words, the potential ■ with respect to the period T of the rectangular wave
Assuming that the duty ratio during the period of 8 is α, the average value of the output voltage at that time is V. ut is the average value of the output voltage.Equation (1) is the average value of the output voltage. This indicates that ut is proportional to the duty ratio α of the rectangular wave. Managing the duty ratio, or time, in a digital circuit can be easily achieved by counting clocks with stable frequencies, such as the output frequency of a crystal oscillator. By manipulating the duty ratio α of
A D/A conversion circuit can be configured.

[Problem that the invention seeks to solve]

However, this method has the following problems.

That is, if we consider the case where a transistor is used as a switching element that actually generates a rectangular wave in the circuit shown in Fig. 3, while the transistor is off, the input voltage vin is It is supplied to the subsequent stage via the resistor R, while the transistor is turned on and the rectangular wave output in Figure 4 should be (1-α)・T.
Even during this period, the transistor's output saturation voltage (collector-emitter voltage in this case) remains.

Furthermore, even when an analog switch is used as a switching element, as shown in the circuit shown in Figure 5(b), there is an on-resistance, so the output voltage does not become zero when the switch is turned on, and the load resistance R and the on-off The voltage divided by the resistor r is output. As a result, the actual D/A conversion circuit shown in FIG. 3 no longer satisfies equation (1).

That is, as shown in FIG. 6, if the output residual voltage is v5 and the actual output amplitude is va', then the average value of the output voltage is V. ut is = V, +α・Va′ ・・・・・・(
2) The result is that the offset voltage V5 is added to the apparent average increased voltage α·■3'. Therefore, even if the duty ratio α is set to 0, the output average voltage will not become 0. For this reason, in the past, the output side was actively offset
It was necessary to adjust the offset voltage by adding pressure to cancel out the offset voltage vs.

In addition, in the conventional method, the amplitude va of the rectangular wave output is a constant, and the duty ratio α is also a positive number of 0''!, so as is clear from equation (2), the average of the resulting output voltage The range of the value V.ut is ■, ≦Vout≦V,
+V,': When va'>o...(3
) or Vs + Va'ball Vout≦V, :va'<0 When 0... (4) As it is, it is impossible to convert the digital value obtained by taking the positive and negative direct 9 to an analog quantity. .

Therefore, in the past, in response to such a request, a negative or positive offset voltage was added to the output signal, and a constant offset ff was added to the duty ratio α corresponding to the digital amount.
By adding i, D/A conversion for bipolar digital ff1K was realized. That is, the offset voltage and digital offset amount are respectively Voffse
ty (as 1offset・Rewriting equation (2), the average value of the output voltage V.ut is ■out ””
Vs + (α+αoffset)・va' V
offset=α−Va′+V,+αoffset”
Va' Voffset・・・・・・(5) Therefore, s Vs+cfoffseMVa'
If αoffs6t yVoffset is chosen so that Voffset=0 and α+αoffset≧0, then V
out can be either positive or negative in proportion to the bipolar digital quantity α. − Generally, the offset digital amount α
. Let ff5et be a constant and use variable resistors etc. to calculate equation (5)
Offset voltage V to satisfy. ff5et must be adjusted.

From the above, offset adjustment is indispensable in this type of D/A conversion circuit.Moreover, the application target is offset error compensation in unipolar D/A conversion, or zero compensation in bipolar D/A conversion. Depending on the potential adjustment,
There was a problem in that the offset specifications were different. In addition, since this problem is derived from each individual D/A conversion circuit, if multiple D/A conversion circuits are provided, the above offset adjustment element is provided for each valley circuit, and the adjustment is also carried out. The problem was that it had to be done.

Therefore, it is an object of the present invention to provide a D/A conversion circuit that can eliminate offset errors without providing an offset adjustment element in the circuit, and can convert a bipolar digital quantity into an equivalent analog quantity.

[Means for solving problems]

a first signal generating means for generating a rectangular wave signal having a predetermined period, amplitude, and duty ratio; and a rectangular wave signal having the same period and amplitude as the rectangular wave signal of the first signal generating means and its duty ratio; are variably second signal generating means; A signal subtraction means calculates the difference between each output signal of the second signal generation means, and the difference between the average value of the output signal of the first signal generation means and the average value of the output signal of the second signal generation means becomes a desired analog quantity. An arithmetic sterilization means for determining the duty ratio of the second signal generation means is provided.

[Effect]

The difference E1-EO between the average output voltage EO for the duty ratio α0 in the circuit expressed by equation (2) and the average output voltage E1 for the duty ratio α1 in the same circuit is the average of the subtraction circuit configured using an operational amplifier. The output voltage is El-Eo = (Vs + α1・V2') -' (v, +α0・■8') = (α1-α0)・va' (6)
Therefore, it does not depend on the output residual voltage V. Moreover, the duty ratio α0. If α1 is chosen appropriately, α
Since 1-α0 can take positive and negative values, the offset voltage ■ as shown in equation (5). Positive and negative output voltages that do not include offset errors can be obtained without providing ff5et.

This invention focuses on this point, and the difference in average output voltage between a rectangular wave signal that operates at a predetermined constant period and duty ratio and a rectangular wave signal that operates at the same period and amplitude. By utilizing the fact that the duty ratio is proportional to the deviation of the duty ratio and converting the digital signal into voltage (analog amount) by manipulating the deviation of the duty ratio according to the digital amount to be converted, it is possible to convert the polarity without offset error. D
/A conversion circuit.

〔Example〕

FIG. 1 is a block diagram showing an embodiment in which the present invention is applied to two digital-to-analog conversion circuits, and FIG. 2 is a waveform diagram showing its operating waveforms.

In FIG. 1, a counter 1A receives a predetermined count value N,
is counted, and its output signal So is alternately turned on and off. The counters 1B and 1C each receive a count fii! set via a path 3 from an arithmetic processing unit CPU2 such as a microcomputer in synchronization with the rising edge of the output signal So of the counter 1A. N1 and N
2 count operation is started, and the outputs S+ and N2k are outputted from the start to the end of counting. The counters 1A to 1C (Dllthl forces 5O-82 are applied to the analog switches 4A to 4C, respectively. The analog switches 4A to 4C are connected to the negative reference voltage -VRef- while the signal S o-82 is at the 'High' level. Therefore, the analog switch 4A applies the positive and negative reference voltages +Vne (+ and - VRef- is applied to the subsequent circuit, and while the signal SO is at °Low' level, only the positive reference voltage +VRer+ is applied to the subsequent circuit for the period required for one counter to count the count value No. The circuit is applied to the operational amplifier 5A, and its inverted output is applied to the operational amplifiers 5B and 5C.Similarly,
The analog switches 4B and 4C operate while the output signals S1 and N2 of the counters are at the °H3gh' level, that is, the counters 1B and 1C are set to the count values N1 and N, respectively.
While returning to count 2, the positive and negative reference voltage terminals VR
ef1 and -VRef- are applied to the subsequent circuit, and while the signals S1 and N2 are still at Low' level, that is, the time required for the counter 1A to count the count number (2No-N1) or (2No-N2). During the period, only the positive reference voltage +VRef+ is applied to the subsequent circuit. The operational amplifiers 5B and 5C are connected to the analog switch 4, respectively.
The outputs of B and 4C, the output of operational amplifier 5A, and a positive reference voltage VRef+ are applied through a resistor, and an inverted output that is equal to the arithmetic sum thereof smoothed by the filter element is output.

Here, the time required to count the count values N O+ N 1 and N2 is t, respectively. , 1. , 12
Then, t o= No / F −・
・(7)”1=N1/F ・・
...(8) t2=N2/F
......(9). Therefore, in FIG. 1, the average output voltage VO of the operational amplifier 5A is the on-resistance of the analog switch 4A as r. Then, it can be obtained as ...(10). Similarly, the average output voltage V 1 + V 2 of the operational amplifiers 5B and 5C is as follows. Here, by using high-precision resistors, it is easy to select the resistance values equally, so Rap = Rap = Rzp -"
(13) RorJ=RIN=R2N
-(14) ROF= R10= RIF= R20
= R2F - (15). Mutual.
On-resistance r of analogs f. For rlp r2 as well, it would be practically possible to select the same directivity by using elements with uniform characteristics.In particular, as analog switches commercially available for such applications, it is possible to select the directivity equally. In an integrated circuit in which a switch is enclosed in a single pancage, the integrated circuit is formed on the same semiconductor wafer, so the deviation in on-resistance value between analog switches integrated in the same package is an absolute direct error. Usually, it is extremely small compared to . Therefore, ro'';f'1'; r2
song...(16), where Rp = Rap = Rlp = R2P
・”-(17)RN = RIIN = RAM =
R2N (18) RF=R
OF= Rho = R+y= R20= R2F...
・・・・・・ (19n [=rO=r1:r2 ・・・・・・
(20) and rearranging equations (11) and (12),...(22) is obtained. Therefore, V 1 + V 2 are each t
It is proportional to l-1 and 12-18. Therefore,
The count values Nt r N2 of the counters fB and 1C are converted into digital fiD1. If the following formulas (25) and (24) are chosen for D2, N1=
No + E ・Dl −・” (2
3) N2 = No + t・D2
=” (24) Here, 1.-1° and 1
2-1o can be rewritten as follows, 1, -16=Ih /F=” (
25) t2-io=ni・D2/F”=
・-C26), therefore, operational amplifiers 5B and 5C
The average output voltage V 1p V 2 of the digital flD1
It is proportional to eD2.

〔Effect of the invention〕

According to the present invention, in D/A conversion using a chopper method, a circuit is provided that outputs a reference rectangular wave signal, and the difference between the reference rectangular wave signal and a rectangular wave signal generated by a circuit having the same circuit constant is provided. By taking this, the offset error in the analog conversion amount caused by the output saturation voltage and on-resistance of the switching element, which are essential components in this type of circuit, can be canceled out without providing any adjustment elements on the circuit. In addition, even for one bipolar digital quantity, bipolar D/A conversion operation can be realized by making it correspond to the difference in duty ratio of two rectangular wave signals.

Moreover, whether the D/A conversion circuit according to the present invention operates as a unipolar conversion circuit or a bipolar conversion circuit is determined simply by how the duty ratio of the two rectangular wave signals is determined. Therefore, it is possible to construct a highly versatile D/A conversion circuit that does not depend on the type of conversion amount.

Furthermore, even if multiple D/A conversion circuits are installed, using the circuit shown in Figure 1 as an example, each D/A conversion circuit to be added has one counter, one analog switch, and one subtraction circuit using an operational amplifier. The above functions can be achieved just by adding it.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram of each part to explain its operation, and FIG. 3 is a schematic diagram showing a conventional example of a chime-flange type/A conversion circuit. Fig. 4 is a waveform diagram of each part to explain its operation, Fig. 5 is a circuit diagram showing a specific example of the switching element shown in Fig. 3, and the sixth factor is the fifth factor.
FIG. 6 is an operation waveform diagram illustrating a case where the output residual voltage of the switching element is taken into consideration. Code explanation IA, IB, IC...Counter, 2...
・Arithmetic processing family ft (CPU), 3...Bus, 4
A, 4B, 4C...Analog switch, 5A,
5B, 5C... operational amplifier, 11...
Timer counter, 12...Switching element, 1
3...Filter. Agent Patent Attorney Akio Namiki Agent Patent Attorney Kiyoshi Matsuzaki Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 (.) (b) Figure 61 &

Claims (1)

[Claims] First signal generating means for generating a rectangular wave signal having a predetermined period, amplitude, and duty ratio; and a rectangular wave signal having the same period and amplitude as the rectangular wave signal of the first signal generating means. second signal generating means that generates a variable duty ratio; signal subtracting means that calculates the difference between each output signal of the first and second signal generating means; and an average value of the output signal of the first signal generating means. and an arithmetic control means for determining the duty ratio of the second signal generating means so that the difference between the average value of the output signal of the second signal generating means and the average value of the output signal of the second signal generating means becomes a desired analog value. Analog conversion circuit.