JPH01133341A - Manufacture of semiconductor device and manufacturing equipment therefor - Google Patents

Abstract

PURPOSE:To form an SOI structure having large areas and high quality as well as a heterojunction or realize a three dimensions integrated circuit and a composite semiconductor integrated circuit where a plurality of kinds of semiconductor materials are used, by heat-treating two sheets of semiconductor single crystal substrates having a single crystal layer where one side face to be joined performs an epitaxial growth at a specific temperature in a clean atmosphere so as to join them, thereby removing the substrate acting as a bed by etching after leaving the single crystal layer which is formed by the epitaxial growth as it is. CONSTITUTION:This device makes the surfaces of an Si substrate 2 deposited by an oxide film 1 and of a sample where GaAs 3 performs a heteroepitaxial growth as a compound semiconductor on the Si substrate 4 face each other and these two surfaces are combined directly or after depositing amorphous silicon on GaAs 3. After that, the foregoing substrates are annealed for an hour at a temperature of 200-600 deg.C in a state that a wafer is pressed uniformly from the both sides. Then, the Si substrate 4 is removed by etching with a solution containing hydrofluoric and nitric acids. When there is any problem with respect to crystal property at the interface part of heteroepitaxial layer with GaAs and Si, an exposed face 31 of the GaAs film 3 is slightly etched with the solution containing ammonia, hydrogen peroxide and water and then a defect layer is removed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to three-dimensional integrated circuits, optical integrated circuits, Bi-0MO8
(a mixture of bipolar and 0MO8), etc., and its manufacturing apparatus, and is particularly suitable for manufacturing a composite semiconductor device by bonding two semiconductor single crystal substrates. and an apparatus for manufacturing the same.

[Conventional technology]

Conventional techniques for bonding two semiconductor single crystal substrates include, for example, Jikai No. 11H61-5544 and Japanese Patent Laid-Open No. 61-182240, in which the surfaces to be bonded are mirror-polished and heated at a temperature of 200°C or higher. It is described that bonding is performed by heat treatment.

[Problem that the invention seeks to solve]

The above-mentioned conventional technology mainly involves bonding two silicon (Si) single crystal substrates through an oxide insulating film, and when an element is formed on the 81 substrate above using this insulating film, adjacent The idea was to improve the dielectric separation between the connected elements, but no consideration was given to the problem of processing the bonded single-crystal semiconductor substrates themselves. In other words, the device was assembled onto the single-crystal substrate that was originally used.

In addition, among the conventional technologies, various SOI (Silico
The following problems can be raised regarding the non-In5lator technology.

(1) It is difficult to form a large-area, high-quality SOI single crystal using any of the currently known techniques.

(2) When forming an element on one substrate and then bonding another substrate to form a new element on the upper SOI layer, the process temperature should be adjusted to stabilize the existing element. The temperature must be as low as 600° C., which is a major constraint in forming the device.

Furthermore, the following problems can be raised regarding various heteroepitaxial techniques for forming different types of semiconductors, such as a silicon semiconductor element and a compound semiconductor element, on a semiconductor substrate.

(1) To enable good heteroepitaxy, values such as lattice constant and coefficient of thermal expansion must be approximately equal in the amount of materials, and therefore there are severe restrictions on the combination of materials.

(2) By the way, the current board bonding (joining) technology is S
The problem is limited to the bonding of L to L, and there is no known practical bonding of dissimilar semiconductor thin films using heteroepitaxy.

The present invention was made in order to solve the above-mentioned conventional problems, and its purpose is to further improve the bonding technology of two semiconductor single crystal substrates, thereby achieving a large area and high quality. An improved 1:5 manufacturing method for semiconductor devices and equipment for manufacturing the same, which enables the formation of SOI structures, heterojunctions, three-dimensional integrated circuits, and composite semiconductor integrated circuits using multiple types of semiconductor materials. It is about providing.

[Means for solving problems]

The above object of the present invention can be achieved by the following means.

That is, the features of the first manufacturing method of the present invention are as follows.

(1) Two semiconductor single-crystal substrates, at least one of which has a semiconductor single-crystal layer formed by epitaxial growth, are brought into close contact in a clean atmosphere and bonded by heat treatment at a temperature of at least 200°C. and a step of etching away the underlying semiconductor single crystal substrate, leaving behind the semiconductor single crystal layer formed by epitaxial growth of one of the bonded semiconductor single crystal substrates.

(2) One surface of the two semiconductor single crystal substrates to be bonded consists of a semiconductor single crystal substrate having a compound semiconductor single crystal layer formed by epitaxial growth, and the other surface to be bonded is an oxide insulating film. It is characterized by being made of a silicon single crystal substrate on which is formed.

(3) The semiconductor single crystal substrate having the compound semiconductor single crystal layer formed by the epitaxial growth is made of germanium or silicon single crystal.

The above heat treatment is performed at a temperature of 200°C or higher, but the upper limit varies depending on the material of the substrate, and generally the practical treatment temperature is when one substrate has a compound semiconductor layer and the other substrate is made of silicon single crystal. The temperature is 200-600℃,
200 to 1 when both substrates are made of silicon single crystal
000℃.

Next, the features of the invention of the second manufacturing method are as follows.

(1) Two semiconductor single crystal substrates each having a semiconductor single crystal layer on which at least one surface to be joined is formed by epitaxial growth and in which an active element is formed are pressed and heated through an adhesive. a step of etching away the base single crystal substrate of the bonded semiconductor single crystal substrates, leaving at least the semiconductor single crystal layer formed by the epitaxial growth and in which active elements are formed; It is characterized by having the following.

(2) The adhesive is made of a heat-resistant organic polymer resin or fluid silica, and the adhesive is applied to at least one surface of the two semiconductor single crystal substrates to be bonded, and the adhesive on the bonding surface is The method is characterized in that the two semiconductor single crystal substrates are bonded by solidifying the adhesive by heating under pressure that does not generate at least a board.

According to this invention, since bonding can be performed at a relatively low temperature (200 to 400 degrees Celsius), bonding can be performed without any deterioration of the characteristics of active elements provided in advance in a semiconductor single crystal layer formed by epitaxial growth. . Examples of heat-resistant organic polymer resins include polyimide resins,
Materials well known in the field of semiconductor manufacturing, such as epoxy resin, are used.

Further, as the semiconductor single crystal formed by epitaxial growth, it goes without saying that a compound semiconductor can be used as in the first invention.

Next, the features of the invention of the third manufacturing method are as follows.

(1) Two semiconductors in which at least one surface to be bonded is a semiconductor single crystal layer formed by epitaxial growth, and an amorphous silicon film, silicon oxide film, or polycrystalline silicon film is formed on that surface as a bonding layer of the bonding surface. Place the single crystal substrate in close contact with each other in a clean atmosphere for at least 2
a step of bonding by heat treatment under heating at 00° C.; and a step of etching away the underlying semiconductor single crystal substrate, leaving behind the semiconductor single crystal layer formed by epitaxial growth of one of the bonded semiconductor single crystal substrates. It is characterized by having

(2) The semiconductor single crystal layer formed by epitaxial growth on the surface of one of the two semiconductor single crystal substrates to be bonded is made of a compound semiconductor single crystal, and the other surface to be bonded is formed of an oxide insulating film. It is characterized by being made of a silicon single crystal substrate.

(3) The amorphous silicon film, silicon oxide film, or polycrystalline silicon film to be formed as a bonding layer on the semiconductor single crystal layer formed by the epitaxial growth is formed by a thin film formation method using the CVD method.

Next, the features of the invention of the fourth manufacturing method are as follows.

(1) A semiconductor single-crystal substrate having one surface to be bonded formed by epitaxial growth, an active element formed in that region, and a semiconductor single-crystal layer with an electrode pattern of the active element exposed on the surface; a step of preparing a semiconductor single crystal substrate on which an active element is also formed in the surface region to be bonded, and an electrode pattern of the active element is exposed on the surface; and the electrode patterns on the surfaces of the two substrates are a step of aligning the semiconductor single crystal substrates so that they face each other and bonding them under pressure and heat using an adhesive; forming active elements in the regions of the bonded semiconductor single crystal substrates that are formed by the epitaxial growth; a step of etching away the underlying semiconductor single crystal substrate while leaving behind the semiconductor single crystal layer; A step of providing a through hole reaching above the active element electrode pattern on the substrate, burying a wiring conductor layer in the through hole, electrically connecting the two electrode patterns, and forming an electrode exposed on the epitaxial layer. It is characterized by having the following.

(2) The surface of one of the two semiconductor single crystal substrates to be bonded consists of a germanium or silicon single crystal substrate having a compound semiconductor single crystal layer formed by epitaxial growth, and an active element is provided in the compound semiconductor layer region. It is characterized by the formation of

(3) The adhesive is made of a heat-resistant organic polymer resin or fluid silica, and the adhesive is applied in front of at least one of the two semiconductor single crystal substrates to be bonded, and the adhesive on the bonding surface is The method is characterized in that the two semiconductor single crystal substrates are bonded by solidifying the adhesive by heating under pressure that does not generate at least a board.

(4) The compound semiconductor single crystal layer formed by the above epitaxial growth is made of a GaAs system, and an optical element is formed thereon, and the other semiconductor single crystal substrate to be bonded is made of a silicon single crystal, and this surface The present invention is characterized in that an integrated circuit is formed in the region, the optical element and the integrated circuit are electrically connected by the wiring conductor through mutual electrode patterns, and electrodes are formed to be exposed on the optical element.

To summarize the manufacturing method of the present invention, in order to form a high-quality thin single crystal film by the bonding (bonding) method, it is necessary to use a single crystal substrate with a high etching rate for a specific etching solution. A small semiconductor material is epitaxially grown, then bonded to the other semiconductor single crystal substrate, and then the single crystal substrate underlying the epitaxially grown film is completely etched away, and more preferably, the surface of the epitaxially grown film from which the epitaxially grown film is removed is etched away. It is a light etching. In particular, when the epitaxially grown film is a heteroepitaxial film made of a material different from that of the base substrate, many crystal defects occur at the epitaxial interface. It is valid.

Finally, the features of the manufacturing apparatus invention are as follows.

(1) A stage that is movable in the two-dimensional direction of X-Y and that suction-supports the - side of the semiconductor single-crystal substrate, and a supporting body that suction-supports the other semiconductor single-crystal substrate that faces the stage are opposed to each other. a means for aligning the two semiconductor single crystal substrates with each other and applying a predetermined pressure to bond them; It is characterized by comprising means for heating to a certain temperature.

[For production]

(1) When forming an SOI structure or a heterostructure using the bonding method of the present invention, bulk crystals are bonded together, and the structure 1 is such that the interface portion where many crystal defects occur is etched away. No gender issues arise.

(2) When an IC with a three-dimensional structure is formed using the bonding method of the present invention, the elements of each layer are formed on separate semiconductor single crystal substrates (wafers) and then stacked in multiple layers, so it is difficult to form the elements of each layer. There is no interference between processes.

(3) In order to form an SOI structure or a heterostructure by the bonding method of the present invention, it is necessary to thin one of the bonded single crystal substrates (wafers), which is different from the above single crystal substrate. This can be achieved by making use of the difference in etch rate of the epitaxial layer formed thereon and leaving only the epitaxial layer with a low etch rate. Furthermore, to form a heterostructure, a heteroepitaxial layer formed on a specific single crystal substrate is transferred onto a desired semiconductor single crystal substrate by a bonding method.

Therefore, during heteroepitaxial growth, the lattice constant,
A single crystal substrate that is optimal for crystal growth with matched thermal expansion coefficients can be used, and a high quality epitaxial layer can be formed.

(4) In addition, when using the gluing method of the present invention, active elements are assembled in advance into respective single crystal substrates and the surfaces on which electrode pads of the active elements are formed are bonded to each other as bonding surfaces. As shown in ・, an insulating material such as fluid silica or heat-resistant organic polymer resin is used as a bonding agent, but when bonding, the bonding agent is spin-coated on at least one of the bonding surfaces, and these are overlapped, Pressure may be applied from both sides of the substrate while heating to solidify the bonding agent. The purpose of applying pressure is to prevent boards (holes) from forming when the bonding agent solidifies, and to bond the two substrates in parallel.

In the case of bonding bulk crystals as described in (1) above, no bonding agent is required, and bonding can be achieved by simply smoothing the bonding surfaces by mirror polishing. In this case, only heat treatment is required, and there is no need to apply pressure. Rather, it will cause unnecessary distortion to the board.
It is better not to apply pressure.

〔Example〕

Hereinafter, embodiments of the present invention will be shown and specifically explained with reference to the drawings.

FIG. 1 is a diagram explaining the principle of bonding two semiconductor single crystal substrates together, and shows the method for forming a single crystal thin film on an insulating film, that is, SO
This figure shows a method for forming an I structure.

FIG. 1(a) shows a Si film with an oxide film 1 of 0.4-thickness.
Substrate 2, FIG. 1(b), is a Si substrate 4 on which GaAs 3 is deposited as a compound semiconductor to a thickness of 5 pm using an ordinary MB.
E (Molecular Bears Epitax
It was grown by heteroepitaxial growth using method y). Next, as shown in Figure 1(c), the surfaces of these samples were made to face each other, and either directly or in order to improve adhesion, amorphous silicon (hereinafter referred to as a-8i) was applied.
0.1. on GaAsa. After depositing, glue together,
1 at a temperature of 200°C to 600°C with uniform pressure applied to the wafer from both sides (no pressure required for direct bonding).
Anneal for a time. Next, as shown in FIG. 1(d), Si
The substrate 4 is completely etched away using a mixed solution of hydrofluoric acid and nitric acid. If the crystallinity of the interface of the GaAs and Si heteroepitaxial layer shown in FIG. 1(b) is a problem, the interface with the GaAsABO3i substrate 4 may be removed after the step of FIG. 1(d). That is, the problem can be solved by lightly etching the exposed surface 31 of the GaAs film 3 with a mixture of ammonia, hydrogen peroxide, and water to remove the defective layer. Also, Figure 1 (
If a Ge substrate with a lattice constant close to that of GaAs is used instead of the Si substrate 4 in the step b), high quality GaAs/G can be obtained.
e crystals can be formed.

In this case as well, by using the process shown in FIG. 1(Q) above, the Ge substrate 4 can be bonded by bonding the three GaAs surfaces onto the Si substrate 2 via the oxide film 1.
It goes without saying that the Ge substrate 4 can be etched away and the GaAs layer 3 can be transferred onto the Si substrate 2 by the process shown in FIG. 1(d).

In the above embodiments, a method was described in which a GaAs epitaxial film formed on an SL substrate or a Ge substrate was transferred onto a Si substrate. It goes without saying that this method is also effective for forming other heterostructures.

In fact, instead of GaAs epitaxial film, A1GaAs
, even when using a compound semiconductor epitaxial film such as GaP, ZnS, InP, etc.

The same method could be applied.

FIG. 2 shows another embodiment in which two wafers are placed facing each other, aligned and bonded together. Figure 2 (
As shown in a), polyimide resin or fluid silica liquid 5 is applied to the Si wafer 2 as the other substrate on which an alignment target 7 (schematically shown in a plan view) is formed by ordinary photolithography and etching. Apply as thickly as necessary to flatten the surface. The other wafer is a Si substrate 4, on which GaAs3 is epitaxially grown to a desired thickness by a normal MBE method, and then a 0.5-thick SiO film 1 is deposited on it by normal CVD.
(Chemical Vapor Deposit
on), and an alignment target 6 (schematically shown in a plan view) is patterned thereon by photolithography. Then, the substrate at the lower periphery 8 of the target portion is removed by photolithography and etching techniques from the back side. Place these two wafers facing each other and
The alignment targets 6 and 7 are aligned through the n2 film 1 and glued together. That is, as shown in FIG. 2(b), using a bonding device 20 similar to a normal contact type mask aligner, the other wafer 2 is placed on a stage 22 movable in two dimensions of X-Y. Adsorbs and supports
One of the wafers 4 is suctioned and fixed to the opposing substrate support 23, and the two wafers 2.4'' are aligned using a microscope 21 through the substrate removal portion 8 for alignment.

After alignment is completed, pressure is applied from the back side of the wafer and one wafer is attached. Note that this joint W120 is configured such that pressure can be applied to the two wafers by moving the stage 22 and the support body 23 relatively upward, and although the drawing is omitted, A heating means is also provided so that the bonding surfaces of both wafers can be heated to a predetermined temperature.

By the above method, it becomes possible to precisely align and bond two opposing wafers together.

In Figure 3, two wafers are bonded together with the surfaces on which the electrodes of the semiconductor single-crystal substrates on which active elements are formed are facing each other, and wiring conductors are connected between the elements on the upper and lower substrates. 3A and 3B are process diagrams showing different embodiments of the present invention showing a method for forming a semiconductor device having a so-called three-dimensional structure electrically connected to each other. Figure 3 (,), (b)
A desired active element (not shown) and an electrode 9 (9L 9
2). FIG. 3(c) shows the above board 2.
．． Polyimide resin or fluid silica is spin-coated as an adhesive 5 on the active element formation surface of 4, and as shown in FIGS.
After bonding using the positioning method and bonding device described in b) and heat-treating at 350° C. for 1 hour under a pressure of mtokg/ca from both back sides of the substrate to solidify the adhesive 5 at the joint, the substrate 4 This figure shows the state after being removed by etching in the same process as in FIG. 1(d). Figure 3 (d
) shows an intermediate hole-opening process for wiring connection between the electrode 91 of the active element formed on the substrate 2 and the electrode 92 of the active element formed on the opposing GaAs epitaxial film 3. First, a normal CVD process is performed on the GaAs epitaxial film 3 after removing the substrate 4 shown in FIG. 3(C).
5,000 layers of Sin.
A hole reaching the diameter 2 is formed, and the insulating film 10 is formed on the side wall of the hole by the above-mentioned CVD method, and the periphery of the hole is completely covered with Sun, except for the exposed surface of the electrode 92.Then, the hole is etched by dry etching. Etching the bottom and lower electrode 91
Dig down to the exposed surface. FIG. 3(d) above shows this state. FIG. 3(e) shows the final state of both electrodes 91.
．． This is a diagram showing a state where 92 is wired and connected, and is similar to the above figure 3 (
The holes (through holes) leading to the electrodes 91 are formed in step d), and are filled in by depositing a wiring material 11, for example, by vapor deposition, and patterning of the electrodes 11 is formed on the upper Sin2 film surface by patterning by photolithography. Through zero or more steps, it becomes possible to form three-dimensional wiring between layers in the target multilayer integrated circuit.

Next, FIGS. 4 to 3 show further different embodiments in which a more specific semiconductor device is manufactured using the basic manufacturing process shown in FIGS. 1 to 3 above.

That is, FIG. 4(a) shows a Si wafer with a bipolar IC 12 formed on an n''-8i substrate 42, and FIG. 4(b)
A wafer in which n-8i13 was epitaxially grown on the n"-8t substrate 44 shown in FIG. This is a composite semiconductor device with a so-called Bi-CMO8 structure with wiring.In other words, FIG.
FIG. 4(d) shows a step corresponding to FIG. 3(c), and FIG. 4(d) shows a step corresponding to FIG. 3(e) after passing through FIG. 3(d). In the figure, reference numeral 1 indicates an insulating film (Sin in this case) formed on the IC section, 91 and 92 indicate electrodes (layers in this case), and 5 indicates an adhesive made of polyimide resin or fluid silica. , C1 indicates the interlayer wiring material (A11 in this case). In this manufacturing method, bipolar ICs are placed on one wafer in advance, and zero ICs are placed on the other wafer.
Since each MO8IC can be formed independently, restrictions on the heat treatment conditions of the process can be greatly relaxed, and the overall process can be shortened.

FIG. 5 shows a Si wafer 2 on which the IC shown in FIG. 5(a) is formed, and a compound semiconductor (for example, Ga The wafer 4 on which optical elements (for example, laser emitting elements, light receiving elements, etc.) are formed in the layer 16 is bonded to the wafer 4 in the same process as shown in FIG. (to remove crystal defects) and then wired three-dimensionally. In other words,
FIG. 5(Q) corresponds to FIG. 4(c), and FIG. 5(d) corresponds to FIG. 4(d). In this way, it becomes possible to realize a so-called OE IC in which 81 semiconductor devices are stacked in the lower layer and optical elements made of compound semiconductors are stacked in the upper layer. It goes without saying that even when not only an optical element but also a field effect transistor is formed in the compound semiconductor, a three-dimensional IC can be similarly formed by integrating it with a Si IC.

FIG. 6 shows GaAs being heteroepitaxially grown (growth layer 3) on the Si or Ge wafer 2 shown in FIG. 6(a) and the Si or Ge substrate shown in FIG. 6(b). The deposition surface of the wafer 4 on which amorphous silicon, (a-8i), or amorphous germanium (a-Ge) 18 was deposited by normal plasma CVD was placed facing the deposition surface, and the same method as in FIG. 1(c) was carried out. Combine.

It is heat-treated at 600° C. for 1 hour to increase the bonding strength and to form a-8L or a-Ge18 into a single crystal. Note that a-8i and a-Ge forming the adhesive layer are selected as a-8i when the substrate in FIG. 6(a) is Si.

In the case of Ge, a-Ge is used. Then, as shown in FIG. 6(Q), the wafer 4, which is the substrate thereof, is removed by etching, leaving the epitaxial growth layer 3 behind.

If the wafer 4 is a Si substrate, it can be easily etched away using a mixed solution of hydrofluoric acid and nitric acid. moreover,
In order to remove the crystal defect layer 19 generated at the interface with the substrate 4, the surface layer of the epitaxial layer (GaAs layer) 3 is etched away using a mixed solution of ammonia, hydrogen peroxide, and water. Thus, as shown in FIG. 6(d), Si or G
In cases where a high quality GaAs single crystal layer 3 can be formed on the e-substrate 2, a GaAs thin film epitaxially formed on a Si substrate or a Ge substrate is used as the substrate 4, and a GaAs thin film epitaxially formed on a Si substrate or a Ge substrate as the substrate 2 is used. The transfer method was explained. It goes without saying that this method is also effective for forming other heterostructures.

In fact, instead of GaAs as the epitaxial layer 3, A
It has been confirmed that the same method can be applied even when using other compound semiconductors such as QGa/ks, GaP, ZnS, and InP.

〔Effect of the invention〕

According to the present invention, whether Bi-0MO8 or 0EIC, two wafers formed in advance in separate processes are integrated by gluing them together, so each elemental active element is free from restrictions from other processes. It can be formed using the optimal process without undergoing any process.

In addition, compared to the conventional mainstream process of stacking single wafers, the process can be shortened and yield and production efficiency can be improved.

Furthermore, in the formation of a heterostructure using the present invention,
First, heteroepitaxy is performed on an optimal substrate, and then the epitaxial layer is transferred to the desired substrate using a bonding method, which makes it possible to reduce the limitations caused by material consistency to obtain high-quality epitaxial crystals. It is. Further, after the epitaxial layer is transferred to another substrate by bonding, the crystal defect layer near the original heterojunction of the epitaxial layer can be etched away, leaving only the good quality crystal portion.

[Brief explanation of the drawing]

Figures 1 (a), (b), (c), and (d) are explanatory diagrams of the principle of an embodiment of the present invention, and Figures 2 (a) and (b) are diagrams showing how two wafers are aligned. 3 (a), (b), (Q
), (d), and (e) are process diagrams showing further different embodiments of the present invention, in which two wafers on which active elements are previously provided are bonded together using an adhesive to form an integral structure. Figure 4 (a), (b). (c) and (d) are process diagrams when the present invention is applied to realize the Bi-0MO8 structure, and Fig. 5 (a), (b), and (Q)
, (d) are process diagrams when the present invention is applied to realize a three-dimensional IC in which an optical element is formed using a compound semiconductor on a Si IC, and FIGS. 6(a), (b), (c), (d
) is a-8i or a-Ge as a bonding layer for gluing.
FIG. 3 is a process diagram showing a further different embodiment of the present invention in which the method is used. In the figure, 1...Sun, film or insulating film 2...Si substrate 3...GaAs epitaxial layer 4...Si or Ge substrate 5...polyimide resin or fluid silica 6.7...
・Alignment target 8... substrate etch removed part

Claims (1)

[Claims] 1. Two semiconductor single-crystal substrates, at least one of which has a semiconductor single-crystal layer formed by epitaxial growth, are brought together in a clean atmosphere and heated at at least 200°C. It is characterized by comprising a step of bonding by heat treatment; and a step of etching away the underlying semiconductor single crystal substrate, leaving behind a semiconductor single crystal layer formed by epitaxial growth of one of the bonded semiconductor single crystal substrates. A method for manufacturing a semiconductor device. 2. The semiconductor device according to claim 1, wherein the surface of the other of the two semiconductor single crystal substrates to be bonded is a silicon single crystal substrate on which an oxide insulating film is formed. Production method. 3. Claim 1 or 3, characterized in that one of the two semiconductor single crystal substrates has a surface to be bonded to a semiconductor single crystal substrate having a compound semiconductor single crystal layer formed by epitaxial growth. 2. The method for manufacturing a semiconductor device according to item 2. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the semiconductor single crystal substrate having the compound semiconductor single crystal layer formed by the epitaxial growth is made of germanium or silicon single crystal. 5. Two semiconductor single-crystal substrates, at least one of which has a semiconductor single-crystal layer formed by epitaxial growth and in which active elements are formed, are pressed together with an adhesive and heated under heat. a step of etching away the base single crystal substrate of the bonded semiconductor single crystal substrates, leaving at least the semiconductor single crystal layer formed by the epitaxial growth and in which active elements are formed; A method for manufacturing a semiconductor device, comprising: 6. One surface of the two semiconductor single crystal substrates to be bonded is made of a germanium or silicon single crystal substrate having a compound semiconductor single crystal layer formed by epitaxial growth, and the other surface to be bonded is an oxide insulating surface. 6. The method of manufacturing a semiconductor device according to claim 5, comprising a silicon single crystal substrate on which a film is formed. 7. The adhesive is made of a heat-resistant organic polymer resin or fluid silica, and the adhesive is applied to at least one surface of the two semiconductor single crystal substrates to be bonded, and the adhesive on the bonding surface is coated with the adhesive. The semiconductor device according to claim 5 or 6, characterized in that the two semiconductor single crystal substrates are bonded by solidifying the adhesive by heating under pressure that does not cause board formation. Production method. 8. At least one of the surfaces to be bonded is a semiconductor single crystal layer formed by epitaxial growth, and the surface thereof is formed with an amorphous silicon film, a silicon oxide film, or a polycrystalline silicon film as a bonding layer of the bonding surface. The crystal substrate is brought into close contact with the crystal substrate in a clean atmosphere for at least 20 minutes.
A step of bonding by heat treatment under heating at 0° C.; and a step of etching away the underlying semiconductor single crystal substrate, leaving behind the semiconductor single crystal layer formed by epitaxial growth of the one of the bonded semiconductor single crystal substrates. A method for manufacturing a semiconductor device, comprising: 9. The semiconductor single crystal layer formed by epitaxial growth on the surface of one of the two semiconductor single crystal substrates to be bonded is made of a compound semiconductor single crystal, and the surface of the other semiconductor substrate to be bonded is formed of an oxide insulating film. 9. The method of manufacturing a semiconductor device according to claim 8, wherein the semiconductor device is made of a silicon single crystal substrate. 10. The method of manufacturing a semiconductor device according to claim 9, wherein the substrate of the semiconductor single crystal layer formed by the epitaxial growth is made of germanium or silicon single crystal. 11. A patent claim characterized in that the amorphous silicon film, silicon oxide film, or polycrystalline silicon film formed as a bonding layer on the semiconductor single crystal layer formed by the epitaxial growth is formed by a thin film formation method using a CVD method. A method for manufacturing a semiconductor device according to item 8. 12. A semiconductor single-crystal substrate having one surface to be bonded formed by epitaxial growth, an active element formed in that region, and a semiconductor single-crystal layer with an electrode pattern of the active element exposed on the surface; a semiconductor single crystal substrate on which an active element is also formed in the surface area to be bonded, and an electrode pattern of the active element is exposed on the surface; a step of aligning the semiconductor single crystal substrates so that they face each other and joining them under pressure and heat using an adhesive; active elements are formed in the regions of the semiconductor single crystal substrates formed by the epitaxial growth; etching away the base semiconductor single crystal substrate while leaving the semiconductor single crystal layer; A step of providing a through hole reaching above the active element electrode pattern on the substrate, embedding a wiring conductor layer in the through hole, electrically connecting both the electrode patterns, and forming an electrode exposed on the epitaxial layer. A method for manufacturing a semiconductor device, comprising: 13. The surface of one of the two semiconductor single crystal substrates to be bonded is a germanium or silicon single crystal substrate having a compound semiconductor single crystal layer formed by epitaxial growth, and an active element is provided in the compound semiconductor layer region. 13. The method of manufacturing a semiconductor device according to claim 12, wherein: 14. The adhesive is made of a heat-resistant organic polymer resin or fluid silica, and the adhesive is applied before at least one of the two semiconductor single crystal substrates to be bonded, and the adhesive on the bonding surface is coated with the adhesive. The semiconductor device according to claim 12 or 13, characterized in that the two semiconductor single crystal substrates are bonded by solidifying the adhesive by heating under pressure that does not cause board formation. Production method. 15. The compound semiconductor single crystal layer formed by the above epitaxial growth is made of GaAs, and an optical element is formed thereon, and the other semiconductor single crystal substrate to be bonded is made of silicon single crystal, and an integrated circuit is formed on this surface area. The optical element and the integrated circuit are electrically connected by the wiring conductor through mutual electrode patterns, and electrodes are formed to be exposed on the optical element. A method for manufacturing a semiconductor device according to item 13 or 14. 16. A stage that is movable in the two-dimensional direction of X-Y and that suction-supports one semiconductor single-crystal substrate, and a supporting body that suction-supports the other semiconductor single-crystal substrate opposite thereto, are relatively means arranged to be movable up and down, aligning the two semiconductor single crystal substrates with each other and bonding them by applying a predetermined pressure, and heating at least the bonding surfaces of the two semiconductor single crystal substrates to a predetermined temperature. 1. An apparatus for manufacturing a semiconductor device, comprising: means for heating.