JPH049385B2 - - Google Patents

Abstract

PURPOSE:To shorten the time required for manufacturing a multilayer semiconductor device by repeating a process in which a transparent substrate is fast stuck and joined on the active layer of an n-th layer, a support substrate is removed, the back of the active layer of the n-th layer and the surface of the active layer of a (n-1)th layer are aligned oppositely and fast stuck and coupled and a support substrate under the active layer of the (n-1)th layer is removed. CONSTITUTION:The surface of the active layer 71 of an n-th layer formed on a support substrate 70 and a transparent substrate 72 are fast stuck by a transparent material. The support substrate 70 is removed. The active layer 71 of the n-th layer and the active layer 61 of a (n-1)th layer are aligned mutually by conforming positioning patterns 709 in the active layer 71 to positioning patterns 609 in the active layer 61. Positioning is completed, metallic bumps for the active layer 61 of the (n-1)th layer and vertical wirings for the active layer 71 of the n layer are fast stuck mutually, and a circuit in the active layer 71 of the n layer and a circuit in the active layer 61 of the (n-1)th layer are connected mutually. A support substrate 60 is removed from the active layer 61, and the laminating process of the active layer 61 of the (n-1)th layer is completed. The same applies to the next step. Lastly, the active layer of a first layer is laminated while a support substrate is left as it is.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device. More specifically, active layers in which functional elements such as transistors and conductive wires (hereinafter referred to as wiring) connecting these are integrated are stacked in n layers (n is an integer of 2 or more), and each is integrated in a different active layer. The present invention relates to a method of manufacturing a semiconductor device in which functional elements and circuits are organically connected to each other.

FIG. 1 shows an example of the structure of a multilayer semiconductor device. In the figure, 10 is a supporting substrate such as a semiconductor or an insulator, 11 is a first active layer formed on the supporting substrate 10, and 21, 31, 41, 51, 6
1 and 71 are the second layer, third layer, fourth layer,...
...the (n-2)th layer, the (n-1)th layer, the nth active layer, 12 the substrate of the package on which the multilayer semiconductor device 1 is mounted, 13 the bonding pad, 1
4 is a bonding wire. Next, the manufacturing sequence of a conventionally well-known multilayer semiconductor device will be briefly explained using the same figure.

First, a first active layer 11 consisting of functional elements such as transistors and wiring is formed on the surface of a supporting substrate 10 made of semiconductor or the like using a well-known integrated circuit forming process. At this time, a process for bonding with the second layer active layer 21 to be created next is also performed. Next, an insulating film, a semiconductor film, etc. are sequentially formed on the first active layer 11. The most typical example of the semiconductor film is a silicon single crystal film obtained by recrystallizing a polysilicon film by laser annealing or electron beam annealing. Next, after integrating functional elements such as transistors using the semiconductor film, these are connected to form the second active layer 21.
shall be. In this case, as necessary, the functional elements and circuits formed in the first active layer 11 and the second active layer 21 are coupled to each other, and the functional elements and circuits formed in the third active layer 31 to be formed next are Processes for bonding with circuit elements are also performed. Hereinafter, using a process similar to the process for creating the second active layer 21, the third layer, fourth layer, . . . (n-2)th layer,
(n-1)th layer, nth active layer 31, 41,...
51, 61, and 71 are sequentially created to form a multilayer semiconductor device 1.

Semiconductor devices manufactured in this way have not only a two-dimensional expansion but also a three-dimensional expansion in the vertical direction, so compared to well-known integrated circuits that only have a two-dimensional expansion, the semiconductor devices have higher integration density, functionality, signal processing ability, etc. is excellent. However, since all the processes for creating each active layer are performed layer by layer and then stacked up, as the number of active layers increases, the time required to create the device (TAT) increases. This results in extremely serious problems such as increased yield and decreased yield. The present invention provides a method for manufacturing a semiconductor device that solves these drawbacks. According to the present invention, a plurality of active layers in which circuit elements such as transistors and conductive wires interconnecting these are integrated are laminated, and the circuit elements of each active layer are organically coupled to each other between the layers. A method for manufacturing a semiconductor device forming a multi-layered semiconductor device, the method comprising:
Support substrate made of semiconductor or insulator
(n is an integer of 2 or more) are prepared, and at least one active layer (hereinafter referred to as the first layer, second layer, ... n-th layer active layer) is formed on the surface of each support substrate, Next, after adhering and bonding a transparent substrate on the n-th active layer with a transparent adhesive material, the support substrate under the n-th active layer is removed, and the back surface of the n-th active layer and the After the surfaces of the active layers of the (n-1) layer are faced to each other and both active layers are aligned with each other using an alignment pattern, the connecting portion provided on the active layer of the n-th layer and the layer of the (n-1) layer are aligned. The connecting portions provided on the active layers of
After removing the supporting substrate under the active layer of the layers, the (n-2)th layer, ... the third layer, the second active layer, and the (n-1)th active layer are removed. The above steps performed on the first active layer are then repeated, and then the steps other than the step of removing the supporting substrate are performed on the first active layer. A method for manufacturing a semiconductor device is obtained.

Further, according to the present invention, a plurality of active layers in which circuit elements such as transistors and conductive wires interconnecting these are integrated are laminated, and the circuit elements of each active layer are organically coupled to each other between the layers. In this method, n supporting substrates (n is an integer of 2 or more) made of semiconductors, insulators, etc. are prepared, and at least one layer is applied to the surface of each supporting substrate. Form one active layer (hereinafter referred to as the first layer, second layer, ... nth active layer), and then adhere and bond a transparent substrate on the nth active layer using a transparent adhesive material. After that, the support substrate under the n-th active layer is removed, the back surface of the n-th active layer and the surface of the (n-1)-th active layer are made to face each other, and both active layers are aligned in a pattern. After aligning their positions with each other using After removing the support substrate under the (n-1) active layer, the (n-1) ) repeating the process applied to the active layer of the first layer, and then removing the supporting substrate in the process applied to the active layer of the first layer and the (n-1) layer. A method for manufacturing a semiconductor device is characterized in that a plurality of n-layer laminates are formed in parallel by performing a step other than the step of performing a step other than the step of performing a step, and then the plurality of laminates are stacked. can get.

The present invention will be explained in detail below using the drawings. FIG. 2 shows an example of a semiconductor device manufactured by the manufacturing method of the present invention. In the figure, support substrate 1
0, first layer active layer 11, package substrate 1
2. Elements that are the same as in FIG. 1, such as the second active layer 21, are indicated using the same numbers. Note that the first and second active layers 11 and 21 shown in the figure
is a silicon single crystal film obtained by using a semiconductor such as silicon as a support substrate, sequentially depositing an insulating film such as silicon dioxide and a polysilicon film on this, and then recrystallizing the polysilicon by laser annealing or the like. , that is, an example created using SOI (Silicon on Insulator) is shown.

Reference numeral 101 is an insulating film made of silicon dioxide or the like deposited on the support substrate 10 by a vapor phase growth (CVD) method or the like. 104, 105, 106 are drain regions of field effect transistors (hereinafter referred to as FETs);
In the source region and the channel region, using the above semiconductor layer such as silicon formed on the insulating film 101,
Formed by a well-known process. 107 is a gate electrode of the FET, and 102 is an insulating film of silicon dioxide or the like deposited by CVD or the like after forming the gate electrode 107. 108 is the drain region 10
4. After opening a hole for wiring in the insulating film 102 on the source region 105, a metal wiring made of aluminum or the like is deposited by sputtering or the like, and then patterned by photolithography. Reference numeral 109 denotes a pattern (alignment pattern) for aligning the active layers 11 and 21 of the first and second layers, and here, as an example, a case is shown in which they are formed simultaneously with the metal wiring 108 from the same material. 103 is an insulating film made of silicon dioxide or the like formed by a CVD method, 110 is a vertical wiring made of aluminum or other metal inserted into a hole made by opening the insulating film 103, and 112 is a vertical wiring formed on the vertical wiring 110. It is a bump made of metal such as gold. 113 is a transparent heat dissipating material such as artificial diamond that has excellent insulation and thermal conductivity. Although the heat dissipation material is not necessarily required, it is an extremely effective means when the amount of heat generated by the active layer is large. Here, the components of the first active layer 11 are summarized as 101, 102, 103, 104, 105,
106, 107, 108, 109, 110, 11
2,113 etc. Similarly, the second active layer 21
Also, insulating films 201, 202, such as silicon dioxide,
203, FET (204, 205, 206, 20
7,), metal wiring 208, vertical wiring 210, 21
1. Consists of metal bumps 212, transparent heat dissipation material 213, etc.

The active layers 11 and 21 configured as described above are aligned by matching the alignment pattern 209 with the alignment pattern 109 through the transparent heat dissipating materials 113, 213 and the transparent insulating films 103, 201, 202, 203. It is done by letting Also, the first layer, the second layer
Interconnection of the functional elements formed in the active layers 11, 12 of the layers is obtained by joining vertical interconnects, e.g. 211, and metal bumps, e.g. 112, by means such as diffusion welding.

3 to 6 show the method for manufacturing a semiconductor device according to the present invention in the order of steps, and the same elements as those shown in FIG. 1 are designated by the same numbers as in FIG. 1. be.

First, an active layer is formed on the surface of the n
The process starts by preparing two supporting substrates. Next, the support substrate on which the n-th active layer 71 is formed is removed. For this purpose, first, as shown in FIG. 3, the surface of the n-th active layer 71 formed on a supporting substrate 70 such as a semiconductor and a transparent substrate 72 such as glass or sapphire are coated with a transparent material such as wax. Bring it into close contact. In the figure, reference numeral 71 denotes an n-th active layer consisting of an insulating film, a heat dissipating material, functional elements and wiring, an alignment pattern 709, and the like.

The next step is to remove the support substrate 70. If the support substrate is made of silicon, for example, polishing with an alkaline or ammonia solution, etching with a mixture of HNO ₃ , HF and CH ₃ COOH, or a combination of these two methods is performed. removed due to such reasons.

The next step is shown in FIG. 15 is a support substrate 60
This is a stage on which the (n-1)th active layer 61 formed above is placed, and is equipped with a heating device 16 such as a heater. The stage also has a well-known suction function in order to fix the support substrate 60 in a predetermined position. 17, the transparent substrate 72 is attached to the nth
A movable device that holds the active layer 71 of the layer with the active layer facing downward, and is equipped with a well-known suction function for fixing a transparent substrate, etc., a well-known alignment function, a well-known function for applying pressure to the transparent substrate, etc. There is. Therefore, while moving the movable device 17 back and forth, left and right,
Alignment pattern 709 provided in the active layer 17 of the layer
By matching the alignment pattern 609 provided in the (n-1)th active layer 61, the nth and (n-1)th active layers can be aligned with each other.

After the alignment is completed, as shown in FIG.
112) in the figure and the vertical wiring provided in the n-th active layer 71 (for example, 211 in FIG. 2) are brought into close contact with each other. At this time, by the heating device 16 in advance,
The metal bump and the vertical wiring are heated to about 350 degrees Celsius, for example. At the same time, by controlling the movable device and applying a pressure of, for example, about 50 kg/mm ² in the direction of arrow 18, the metal bumps such as gold and vertical wirings such as aluminum are diffusion welded. Therefore, the circuit in the n-th active layer 71 and the (n-th)
1) The circuits in the active layer 61 of the layer are connected together.
Next, the supporting substrate 60 is attached to the (n-1)th active layer 61.
By removing the active layer 61 from the active layer 61, the stacking process of the (n-1)th active layer 61 is completed. Note that the support substrate 60
The removal of the support substrate 70 can be performed in the same manner as the removal of the support substrate 70 described above.

The next step is the (nth
This is a step of laminating the (n-2)th active layer 51 under the active layer 61 of the -1) layer. In this case too,
No. (n-1) explained using FIGS. 3 to 5
The method of laminating the active layer of the layers is carried out in exactly the same way.
Hereafter, the (n-3)th layer...the third layer and the second active layer were laminated, the corresponding support substrate was removed each time, and finally the first active layer and the support substrate were left. By stacking them as they are, a semiconductor device 1 as shown in FIG. 1 is formed.

The method for manufacturing a multilayer semiconductor device, ie, the stacking method, has been described above in detail. According to the present invention, since the first, second, ... n-th active layers are simultaneously created in parallel, the time required to create a conventionally well-known multilayer semiconductor device is reduced. The time required to create a multilayer semiconductor device according to the present invention is significantly reduced. Furthermore, active layers made of semiconductors made of different materials such as silicon and gallium arsenide, or active layers formed using different manufacturing processes such as FETs and bipolar transistors can be laminated freely, allowing for multifunctionality and optimization of functions. , the degree of freedom in design also increases. Further, since active layers with no failures can be selected by conducting circuit tests in advance and then stacking them, it is possible to realize semiconductor devices with extremely high yields. Therefore, productivity is greatly improved. In addition, the alignment pattern provided in the transparent insulating film can be freely seen after removing the opaque support substrate.
Layer-to-layer alignment is easily achieved using conventional methods. Therefore, there are advantages such as not requiring a large-scale device such as a back alignment device.

Note that in the method for manufacturing a semiconductor device of the present invention,
When laminating an active layer or removing a supporting substrate, there are no restrictions on the sizes of the active layer, supporting substrate, transparent substrate, etc. Also, the types of materials used in the above explanation (semiconductor materials, insulating materials, metal materials, heat dissipation materials,
Adhesive materials, etching solutions, etc.), manufacturing conditions (temperature, pressure, film thickness, etc.), or individual manufacturing methods (etching, poling, diffusion welding, etc.) are just examples, and the effects of the present invention may not be achieved. If so, it is not limited to the matters listed above. In the above explanation, the active layer formed using SOI was explained as an example, but it is not limited to this, and it is possible to use a wide range of general materials, such as cases where the active layer is formed on the surface of a semiconductor substrate, or cases where the active layer is formed on the surface of a semiconductor substrate. The active layer formed on the epitaxial semiconductor film of , and the active layer formed on the Si film of SOS are also applicable. Further, the simple circuit configuration used in the above description is also an example, and the present invention is not limited to this.

In addition, in the above embodiment, n sheets were initially prepared in which only one active layer was formed on the support substrate, but it is not necessary to be limited to this. Alternatively, a plurality of active layers may be formed in advance using a method.

Furthermore, although the above embodiments have shown the case where three or more active layers are laminated, the present invention can of course be applied to the case where there are two active layers.

Further, in the embodiment described above, the n-layer laminate obtained by laminating n active layers one by one was used as a completed semiconductor device, but there is no need to be limited by this understanding. That is, in the present invention, (n+1) layers, (n+2) layers, etc. may be further laminated on this n-layer laminate.

Alternatively, a plurality of n-layer laminates may be made in parallel, and finally they may be laminated in the same manner as in the previous embodiment. Conversely, when considering an n-layer laminate as a completed semiconductor device, for example, three n/3-layer laminates are manufactured in parallel, and finally these three are laminated to form an n-layer semiconductor device. may be completed.

[Brief explanation of drawings]

FIG. 1 is a schematic sectional view of a structural example of a multilayer semiconductor device, FIG. 2 is a schematic sectional view of a structural example of a multilayer semiconductor device using SOI, and FIGS. 3 to 6 illustrate the manufacturing method of the present invention. For illustrative purposes, these are schematic cross-sectional views showing the structure of a multilayer semiconductor device in the order of its steps. 1 to 6, 1 is a multilayer semiconductor device, 10, 50, 60, and 70 are supporting substrates;
1, 21, 31, 41, 51, 61, and 71 are the first layer, second layer, third layer, fourth layer, and (n-th layer), respectively.
2) layer, (n-1)th layer, nth layer active layer, 12
13 is the substrate of the package, 13 is the bonding pad, 14 is the bonding wire, 15 is the stage, 16 is the heating device, 17 is the movable device, 18 is the direction of pressure, 72 is the transparent substrate, 109, 209, 5
09,609,709 are alignment patterns.
In Figure 2, 101, 102, 103, 20
1, 202, 203 are insulating films, 104, 204 are drain regions, 105, 205 are source regions, 1
06, 206 is a channel region, 107, 207 is a gate, 108, 208 is a wiring, 110, 21
0 and 211 are vertical wirings, 112 and 212 are metal bumps, and 113 and 213 are heat dissipation materials.

Claims (1)

[Claims] 1. A plurality of active layers in which circuit elements such as transistors and conductive wires interconnecting these are integrated, and the circuit elements of each active layer are organically coupled to each other between the layers. In this method, n supporting substrates (n is an integer of 2 or more) made of a semiconductor or an insulator are prepared, and each supporting substrate is coated with At least one active layer (hereinafter referred to as the first layer, second layer, ... nth active layer) is formed, and then a transparent substrate is tightly adhered to the nth active layer using a transparent adhesive material. After bonding, the supporting substrate under the n-th active layer is removed, the back surface of the n-th active layer and the surface of the (n-1)th active layer are made to face each other, and both active layers are aligned. After aligning the positions with each other using a pattern, the connection part provided in the n-th active layer and the connection part provided in the (n-1)th active layer are brought into close contact with each other, and the two are bonded, Next, after removing the support substrate under the (n-1)th active layer,
-2) layer...The above process applied to the (n-1) active layer is repeated for the third layer and the second active layer, and then the first active layer is A method of manufacturing a semiconductor device, comprising performing a step other than the step of removing the supporting substrate among the steps performed on the (n-1)th active layer. 2. A multi-layer semiconductor in which a plurality of active layers are laminated, in which circuit elements such as transistors and conductive wires that interconnect them are integrated, and the circuit elements in each active layer are organically bonded to each other between the layers. A method for manufacturing a semiconductor device forming a device, in which n support substrates (n is an integer of 2 or more) made of a semiconductor or an insulator are prepared, and at least one active layer ( (hereinafter referred to as the first layer, second layer, ... nth active layer), and then a transparent substrate is closely adhered and bonded on the nth active layer with a transparent adhesive material, and then The supporting substrate under the active layer of the layer is removed, the back surface of the n-th active layer is made to face the surface of the (n-1)th active layer, and both active layers are positioned relative to each other using an alignment pattern. After alignment, the connection portion provided on the n-th active layer and the connection portion provided on the (n-1)th active layer are brought into close contact with each other to bond them together, and then 1) After removing the supporting substrate under the active layer of the layer, the (nth
-2) layer...The above process applied to the (n-1) active layer is repeated for the third layer and the second active layer, and then the first active layer is A plurality of n-layer laminates are formed in parallel by performing the steps other than the step of removing the supporting substrate among the steps performed on the active layer of the (n-1)th layer. 1. A method for manufacturing a semiconductor device, comprising: manufacturing a semiconductor device, and then stacking a plurality of laminates.